]> git.zerfleddert.de Git - proxmark3-svn/blame_incremental - armsrc/fpgaloader.h
FIX: first attempt to clean up EM4x50 commands.
[proxmark3-svn] / armsrc / fpgaloader.h
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CommitLineData
1//-----------------------------------------------------------------------------
2// Jonathan Westhues, April 2006
3// iZsh <izsh at fail0verflow.com>, 2014
4//
5// This code is licensed to you under the terms of the GNU GPL, version 2 or,
6// at your option, any later version. See the LICENSE.txt file for the text of
7// the license.
8//-----------------------------------------------------------------------------
9// Routines to load the FPGA image, and then to configure the FPGA's major
10// mode once it is configured.
11//-----------------------------------------------------------------------------
12#ifndef __FPGALOADER_H
13#define __FPGALOADER_H
14
15#include "common.h" // standard definitions
16#include "proxmark3.h" // common area
17//#include "util.h"
18#include "string.h"
19#include "BigBuf.h" // bigbuf mem
20#include "zlib.h" // uncompress
21
22void FpgaSendCommand(uint16_t cmd, uint16_t v);
23void FpgaWriteConfWord(uint8_t v);
24void FpgaDownloadAndGo(int bitstream_version);
25void FpgaGatherVersion(int bitstream_version, char *dst, int len);
26void FpgaSetupSscExt(uint8_t clearPCER);
27void FpgaSetupSsc(void);
28void SetupSpi(int mode);
29bool FpgaSetupSscDma(uint8_t *buf, int len);
30void Fpga_print_status();
31#define FpgaDisableSscDma(void) AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
32#define FpgaEnableSscDma(void) AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;
33void SetAdcMuxFor(uint32_t whichGpio);
34
35// definitions for multiple FPGA config files support
36#define FPGA_BITSTREAM_MAX 2 // the total number of FPGA bitstreams (configs)
37#define FPGA_BITSTREAM_ERR 0
38#define FPGA_BITSTREAM_LF 1
39#define FPGA_BITSTREAM_HF 2
40
41// Definitions for the FPGA commands.
42#define FPGA_CMD_SET_CONFREG (1<<12)
43#define FPGA_CMD_SET_DIVISOR (2<<12)
44#define FPGA_CMD_SET_USER_BYTE1 (3<<12)
45// Definitions for the FPGA configuration word.
46// LF
47#define FPGA_MAJOR_MODE_LF_ADC (0<<5)
48#define FPGA_MAJOR_MODE_LF_EDGE_DETECT (1<<5)
49#define FPGA_MAJOR_MODE_LF_PASSTHRU (2<<5)
50// HF
51#define FPGA_MAJOR_MODE_HF_READER_TX (0<<5)
52#define FPGA_MAJOR_MODE_HF_READER_RX_XCORR (1<<5)
53#define FPGA_MAJOR_MODE_HF_SIMULATOR (2<<5)
54#define FPGA_MAJOR_MODE_HF_ISO14443A (3<<5)
55#define FPGA_MAJOR_MODE_HF_SNOOP (4<<5)
56// BOTH
57#define FPGA_MAJOR_MODE_OFF (7<<5)
58// Options for LF_ADC
59#define FPGA_LF_ADC_READER_FIELD (1<<0)
60// Options for LF_EDGE_DETECT
61#define FPGA_CMD_SET_EDGE_DETECT_THRESHOLD FPGA_CMD_SET_USER_BYTE1
62#define FPGA_LF_EDGE_DETECT_READER_FIELD (1<<0)
63#define FPGA_LF_EDGE_DETECT_TOGGLE_MODE (1<<1)
64// Options for the HF reader, tx to tag
65#define FPGA_HF_READER_TX_SHALLOW_MOD (1<<0)
66// Options for the HF reader, correlating against rx from tag
67#define FPGA_HF_READER_RX_XCORR_848_KHZ (1<<0)
68#define FPGA_HF_READER_RX_XCORR_SNOOP (1<<1)
69#define FPGA_HF_READER_RX_XCORR_QUARTER_FREQ (1<<2)
70// Options for the HF simulated tag, how to modulate
71#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0) // 0000
72#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0) // 0001
73#define FPGA_HF_SIMULATOR_MODULATE_212K (2<<0) // 0010
74#define FPGA_HF_SIMULATOR_MODULATE_424K (4<<0) // 0100
75#define FPGA_HF_SIMULATOR_MODULATE_424K_8BIT 0x5 // 0101
76// no 848K
77
78// Options for ISO14443A
79#define FPGA_HF_ISO14443A_SNIFFER (0<<0)
80#define FPGA_HF_ISO14443A_TAGSIM_LISTEN (1<<0)
81#define FPGA_HF_ISO14443A_TAGSIM_MOD (2<<0)
82#define FPGA_HF_ISO14443A_READER_LISTEN (3<<0)
83#define FPGA_HF_ISO14443A_READER_MOD (4<<0)
84
85#endif
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