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1 //-----------------------------------------------------------------------------
2// Merlok - June 2011, 2012
3// Gerhard de Koning Gans - May 2008
4// Hagen Fritsch - June 2010
5//
6// This code is licensed to you under the terms of the GNU GPL, version 2 or,
7// at your option, any later version. See the LICENSE.txt file for the text of
8// the license.
9//-----------------------------------------------------------------------------
10// Routines to support ISO 14443 type A.
11//-----------------------------------------------------------------------------
12
13#include "proxmark3.h"
14#include "apps.h"
15#include "util.h"
16#include "string.h"
17#include "cmd.h"
18#include "iso14443crc.h"
19#include "iso14443a.h"
20#include "crapto1.h"
21#include "mifareutil.h"
22#include "BigBuf.h"
23#include "parity.h"
24
25static uint32_t iso14a_timeout;
26int rsamples = 0;
27uint8_t trigger = 0;
28// the block number for the ISO14443-4 PCB
29static uint8_t iso14_pcb_blocknum = 0;
30
31//
32// ISO14443 timing:
33//
34// minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
35#define REQUEST_GUARD_TIME (7000/16 + 1)
36// minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
37#define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
38// bool LastCommandWasRequest = FALSE;
39
40//
41// Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
42//
43// When the PM acts as reader and is receiving tag data, it takes
44// 3 ticks delay in the AD converter
45// 16 ticks until the modulation detector completes and sets curbit
46// 8 ticks until bit_to_arm is assigned from curbit
47// 8*16 ticks for the transfer from FPGA to ARM
48// 4*16 ticks until we measure the time
49// - 8*16 ticks because we measure the time of the previous transfer
50#define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
51
52// When the PM acts as a reader and is sending, it takes
53// 4*16 ticks until we can write data to the sending hold register
54// 8*16 ticks until the SHR is transferred to the Sending Shift Register
55// 8 ticks until the first transfer starts
56// 8 ticks later the FPGA samples the data
57// 1 tick to assign mod_sig_coil
58#define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
59
60// When the PM acts as tag and is receiving it takes
61// 2 ticks delay in the RF part (for the first falling edge),
62// 3 ticks for the A/D conversion,
63// 8 ticks on average until the start of the SSC transfer,
64// 8 ticks until the SSC samples the first data
65// 7*16 ticks to complete the transfer from FPGA to ARM
66// 8 ticks until the next ssp_clk rising edge
67// 4*16 ticks until we measure the time
68// - 8*16 ticks because we measure the time of the previous transfer
69#define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
70
71// The FPGA will report its internal sending delay in
72uint16_t FpgaSendQueueDelay;
73// the 5 first bits are the number of bits buffered in mod_sig_buf
74// the last three bits are the remaining ticks/2 after the mod_sig_buf shift
75#define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
76
77// When the PM acts as tag and is sending, it takes
78// 4*16 ticks until we can write data to the sending hold register
79// 8*16 ticks until the SHR is transferred to the Sending Shift Register
80// 8 ticks until the first transfer starts
81// 8 ticks later the FPGA samples the data
82// + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
83// + 1 tick to assign mod_sig_coil
84#define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
85
86// When the PM acts as sniffer and is receiving tag data, it takes
87// 3 ticks A/D conversion
88// 14 ticks to complete the modulation detection
89// 8 ticks (on average) until the result is stored in to_arm
90// + the delays in transferring data - which is the same for
91// sniffing reader and tag data and therefore not relevant
92#define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
93
94// When the PM acts as sniffer and is receiving reader data, it takes
95// 2 ticks delay in analogue RF receiver (for the falling edge of the
96// start bit, which marks the start of the communication)
97// 3 ticks A/D conversion
98// 8 ticks on average until the data is stored in to_arm.
99// + the delays in transferring data - which is the same for
100// sniffing reader and tag data and therefore not relevant
101#define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
102
103//variables used for timing purposes:
104//these are in ssp_clk cycles:
105static uint32_t NextTransferTime;
106static uint32_t LastTimeProxToAirStart;
107static uint32_t LastProxToAirDuration;
108
109
110
111// CARD TO READER - manchester
112// Sequence D: 11110000 modulation with subcarrier during first half
113// Sequence E: 00001111 modulation with subcarrier during second half
114// Sequence F: 00000000 no modulation with subcarrier
115// READER TO CARD - miller
116// Sequence X: 00001100 drop after half a period
117// Sequence Y: 00000000 no drop
118// Sequence Z: 11000000 drop at start
119#define SEC_D 0xf0
120#define SEC_E 0x0f
121#define SEC_F 0x00
122#define SEC_X 0x0c
123#define SEC_Y 0x00
124#define SEC_Z 0xc0
125
126void iso14a_set_trigger(bool enable) {
127 trigger = enable;
128}
129
130
131void iso14a_set_timeout(uint32_t timeout) {
132 iso14a_timeout = timeout;
133 if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106);
134}
135
136
137void iso14a_set_ATS_timeout(uint8_t *ats) {
138
139 uint8_t tb1;
140 uint8_t fwi;
141 uint32_t fwt;
142
143 if (ats[0] > 1) { // there is a format byte T0
144 if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
145 if ((ats[1] & 0x10) == 0x10) { // there is an interface byte TA(1) preceding TB(1)
146 tb1 = ats[3];
147 } else {
148 tb1 = ats[2];
149 }
150 fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI)
151 fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc
152
153 iso14a_set_timeout(fwt/(8*16));
154 }
155 }
156}
157
158
159//-----------------------------------------------------------------------------
160// Generate the parity value for a byte sequence
161//
162//-----------------------------------------------------------------------------
163void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par)
164{
165 uint16_t paritybit_cnt = 0;
166 uint16_t paritybyte_cnt = 0;
167 uint8_t parityBits = 0;
168
169 for (uint16_t i = 0; i < iLen; i++) {
170 // Generate the parity bits
171 parityBits |= ((oddparity8(pbtCmd[i])) << (7-paritybit_cnt));
172 if (paritybit_cnt == 7) {
173 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
174 parityBits = 0; // and advance to next Parity Byte
175 paritybyte_cnt++;
176 paritybit_cnt = 0;
177 } else {
178 paritybit_cnt++;
179 }
180 }
181
182 // save remaining parity bits
183 par[paritybyte_cnt] = parityBits;
184
185}
186
187void AppendCrc14443a(uint8_t* data, int len)
188{
189 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
190}
191
192void AppendCrc14443b(uint8_t* data, int len)
193{
194 ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1);
195}
196
197
198//=============================================================================
199// ISO 14443 Type A - Miller decoder
200//=============================================================================
201// Basics:
202// This decoder is used when the PM3 acts as a tag.
203// The reader will generate "pauses" by temporarily switching of the field.
204// At the PM3 antenna we will therefore measure a modulated antenna voltage.
205// The FPGA does a comparison with a threshold and would deliver e.g.:
206// ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
207// The Miller decoder needs to identify the following sequences:
208// 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
209// 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
210// 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
211// Note 1: the bitstream may start at any time. We therefore need to sync.
212// Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
213//-----------------------------------------------------------------------------
214static tUart Uart;
215
216// Lookup-Table to decide if 4 raw bits are a modulation.
217// We accept the following:
218// 0001 - a 3 tick wide pause
219// 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
220// 0111 - a 2 tick wide pause shifted left
221// 1001 - a 2 tick wide pause shifted right
222const bool Mod_Miller_LUT[] = {
223 FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE,
224 FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE
225};
226#define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
227#define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
228
229void UartReset()
230{
231 Uart.state = STATE_UNSYNCD;
232 Uart.bitCount = 0;
233 Uart.len = 0; // number of decoded data bytes
234 Uart.parityLen = 0; // number of decoded parity bytes
235 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
236 Uart.parityBits = 0; // holds 8 parity bits
237 Uart.startTime = 0;
238 Uart.endTime = 0;
239
240 Uart.byteCntMax = 0;
241 Uart.posCnt = 0;
242 Uart.syncBit = 9999;
243}
244
245void UartInit(uint8_t *data, uint8_t *parity)
246{
247 Uart.output = data;
248 Uart.parity = parity;
249 Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits
250 UartReset();
251}
252
253// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
254static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
255{
256
257 Uart.fourBits = (Uart.fourBits << 8) | bit;
258
259 if (Uart.state == STATE_UNSYNCD) { // not yet synced
260
261 Uart.syncBit = 9999; // not set
262
263 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
264 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
265 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
266
267 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
268 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
269 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
270 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
271 //
272#define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
273#define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
274
275 if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7;
276 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6;
277 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5;
278 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4;
279 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3;
280 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2;
281 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1;
282 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0;
283
284 if (Uart.syncBit != 9999) { // found a sync bit
285 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
286 Uart.startTime -= Uart.syncBit;
287 Uart.endTime = Uart.startTime;
288 Uart.state = STATE_START_OF_COMMUNICATION;
289 }
290
291 } else {
292
293 if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) {
294 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error
295 UartReset();
296 } else { // Modulation in first half = Sequence Z = logic "0"
297 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
298 UartReset();
299 } else {
300 Uart.bitCount++;
301 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
302 Uart.state = STATE_MILLER_Z;
303 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
304 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
305 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
306 Uart.parityBits <<= 1; // make room for the parity bit
307 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
308 Uart.bitCount = 0;
309 Uart.shiftReg = 0;
310 if((Uart.len&0x0007) == 0) { // every 8 data bytes
311 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
312 Uart.parityBits = 0;
313 }
314 }
315 }
316 }
317 } else {
318 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
319 Uart.bitCount++;
320 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
321 Uart.state = STATE_MILLER_X;
322 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
323 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
324 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
325 Uart.parityBits <<= 1; // make room for the new parity bit
326 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
327 Uart.bitCount = 0;
328 Uart.shiftReg = 0;
329 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
330 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
331 Uart.parityBits = 0;
332 }
333 }
334 } else { // no modulation in both halves - Sequence Y
335 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
336 Uart.state = STATE_UNSYNCD;
337 Uart.bitCount--; // last "0" was part of EOC sequence
338 Uart.shiftReg <<= 1; // drop it
339 if(Uart.bitCount > 0) { // if we decoded some bits
340 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
341 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
342 Uart.parityBits <<= 1; // add a (void) parity bit
343 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits
344 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
345 return TRUE;
346 } else if (Uart.len & 0x0007) { // there are some parity bits to store
347 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits
348 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
349 }
350 if (Uart.len) {
351 return TRUE; // we are finished with decoding the raw data sequence
352 } else {
353 UartReset(); // Nothing received - start over
354 }
355 }
356 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
357 UartReset();
358 } else { // a logic "0"
359 Uart.bitCount++;
360 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
361 Uart.state = STATE_MILLER_Y;
362 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
363 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
364 Uart.parityBits <<= 1; // make room for the parity bit
365 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
366 Uart.bitCount = 0;
367 Uart.shiftReg = 0;
368 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
369 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
370 Uart.parityBits = 0;
371 }
372 }
373 }
374 }
375 }
376
377 }
378
379 return FALSE; // not finished yet, need more data
380}
381
382
383
384//=============================================================================
385// ISO 14443 Type A - Manchester decoder
386//=============================================================================
387// Basics:
388// This decoder is used when the PM3 acts as a reader.
389// The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
390// at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
391// ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
392// The Manchester decoder needs to identify the following sequences:
393// 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
394// 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
395// 8 ticks unmodulated: Sequence F = end of communication
396// 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
397// Note 1: the bitstream may start at any time. We therefore need to sync.
398// Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
399static tDemod Demod;
400
401// Lookup-Table to decide if 4 raw bits are a modulation.
402// We accept three or four "1" in any position
403const bool Mod_Manchester_LUT[] = {
404 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
405 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
406};
407
408#define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
409#define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
410
411
412void DemodReset()
413{
414 Demod.state = DEMOD_UNSYNCD;
415 Demod.len = 0; // number of decoded data bytes
416 Demod.parityLen = 0;
417 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
418 Demod.parityBits = 0; //
419 Demod.collisionPos = 0; // Position of collision bit
420 Demod.twoBits = 0xffff; // buffer for 2 Bits
421 Demod.highCnt = 0;
422 Demod.startTime = 0;
423 Demod.endTime = 0;
424
425 //
426 Demod.bitCount = 0;
427 Demod.syncBit = 0xFFFF;
428 Demod.samples = 0;
429}
430
431void DemodInit(uint8_t *data, uint8_t *parity)
432{
433 Demod.output = data;
434 Demod.parity = parity;
435 DemodReset();
436}
437
438// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
439static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
440{
441
442 Demod.twoBits = (Demod.twoBits << 8) | bit;
443
444 if (Demod.state == DEMOD_UNSYNCD) {
445
446 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
447 if (Demod.twoBits == 0x0000) {
448 Demod.highCnt++;
449 } else {
450 Demod.highCnt = 0;
451 }
452 } else {
453 Demod.syncBit = 0xFFFF; // not set
454 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
455 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
456 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
457 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
458 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
459 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
460 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
461 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
462 if (Demod.syncBit != 0xFFFF) {
463 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
464 Demod.startTime -= Demod.syncBit;
465 Demod.bitCount = offset; // number of decoded data bits
466 Demod.state = DEMOD_MANCHESTER_DATA;
467 }
468 }
469
470 } else {
471
472 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
473 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
474 if (!Demod.collisionPos) {
475 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
476 }
477 } // modulation in first half only - Sequence D = 1
478 Demod.bitCount++;
479 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
480 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
481 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
482 Demod.parityBits <<= 1; // make room for the parity bit
483 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
484 Demod.bitCount = 0;
485 Demod.shiftReg = 0;
486 if((Demod.len&0x0007) == 0) { // every 8 data bytes
487 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
488 Demod.parityBits = 0;
489 }
490 }
491 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
492 } else { // no modulation in first half
493 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
494 Demod.bitCount++;
495 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
496 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
497 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
498 Demod.parityBits <<= 1; // make room for the new parity bit
499 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
500 Demod.bitCount = 0;
501 Demod.shiftReg = 0;
502 if ((Demod.len&0x0007) == 0) { // every 8 data bytes
503 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
504 Demod.parityBits = 0;
505 }
506 }
507 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
508 } else { // no modulation in both halves - End of communication
509 if(Demod.bitCount > 0) { // there are some remaining data bits
510 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
511 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
512 Demod.parityBits <<= 1; // add a (void) parity bit
513 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
514 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
515 return TRUE;
516 } else if (Demod.len & 0x0007) { // there are some parity bits to store
517 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
518 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
519 }
520 if (Demod.len) {
521 return TRUE; // we are finished with decoding the raw data sequence
522 } else { // nothing received. Start over
523 DemodReset();
524 }
525 }
526 }
527 }
528 return FALSE; // not finished yet, need more data
529}
530
531//=============================================================================
532// Finally, a `sniffer' for ISO 14443 Type A
533// Both sides of communication!
534//=============================================================================
535
536//-----------------------------------------------------------------------------
537// Record the sequence of commands sent by the reader to the tag, with
538// triggering so that we start recording at the point that the tag is moved
539// near the reader.
540//-----------------------------------------------------------------------------
541void RAMFUNC SniffIso14443a(uint8_t param) {
542 // param:
543 // bit 0 - trigger from first card answer
544 // bit 1 - trigger from first reader 7-bit request
545 LEDsoff();
546
547 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
548
549 // Allocate memory from BigBuf for some buffers
550 // free all previous allocations first
551 BigBuf_free();
552
553 // init trace buffer
554 clear_trace();
555 set_tracing(TRUE);
556
557 // The command (reader -> tag) that we're receiving.
558 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
559 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
560
561 // The response (tag -> reader) that we're receiving.
562 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
563 uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE);
564
565 // The DMA buffer, used to stream samples from the FPGA
566 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
567
568 uint8_t *data = dmaBuf;
569 uint8_t previous_data = 0;
570 int maxDataLen = 0;
571 int dataLen = 0;
572 bool TagIsActive = FALSE;
573 bool ReaderIsActive = FALSE;
574
575 // Set up the demodulator for tag -> reader responses.
576 DemodInit(receivedResponse, receivedResponsePar);
577
578 // Set up the demodulator for the reader -> tag commands
579 UartInit(receivedCmd, receivedCmdPar);
580
581 // Setup and start DMA.
582 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
583
584 // We won't start recording the frames that we acquire until we trigger;
585 // a good trigger condition to get started is probably when we see a
586 // response from the tag.
587 // triggered == FALSE -- to wait first for card
588 bool triggered = !(param & 0x03);
589
590 // And now we loop, receiving samples.
591 for(uint32_t rsamples = 0; TRUE; ) {
592
593 if(BUTTON_PRESS()) {
594 DbpString("cancelled by button");
595 break;
596 }
597
598 LED_A_ON();
599 WDT_HIT();
600
601 int register readBufDataP = data - dmaBuf;
602 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
603 if (readBufDataP <= dmaBufDataP){
604 dataLen = dmaBufDataP - readBufDataP;
605 } else {
606 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
607 }
608 // test for length of buffer
609 if(dataLen > maxDataLen) {
610 maxDataLen = dataLen;
611 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
612 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
613 break;
614 }
615 }
616 if(dataLen < 1) continue;
617
618 // primary buffer was stopped( <-- we lost data!
619 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
620 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
621 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
622 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
623 }
624 // secondary buffer sets as primary, secondary buffer was stopped
625 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
626 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
627 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
628 }
629
630 LED_A_OFF();
631
632 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
633
634 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
635 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
636 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
637 LED_C_ON();
638
639 // check - if there is a short 7bit request from reader
640 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
641
642 if(triggered) {
643 if (!LogTrace(receivedCmd,
644 Uart.len,
645 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
646 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
647 Uart.parity,
648 TRUE)) break;
649 }
650 /* And ready to receive another command. */
651 UartReset();
652 /* And also reset the demod code, which might have been */
653 /* false-triggered by the commands from the reader. */
654 DemodReset();
655 LED_B_OFF();
656 }
657 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
658 }
659
660 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
661 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
662 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
663 LED_B_ON();
664
665 if (!LogTrace(receivedResponse,
666 Demod.len,
667 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
668 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
669 Demod.parity,
670 FALSE)) break;
671
672 if ((!triggered) && (param & 0x01)) triggered = TRUE;
673
674 // And ready to receive another response.
675 DemodReset();
676 // And reset the Miller decoder including itS (now outdated) input buffer
677 UartInit(receivedCmd, receivedCmdPar);
678
679 LED_C_OFF();
680 }
681 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
682 }
683 }
684
685 previous_data = *data;
686 rsamples++;
687 data++;
688 if(data == dmaBuf + DMA_BUFFER_SIZE) {
689 data = dmaBuf;
690 }
691 } // main cycle
692
693 FpgaDisableSscDma();
694 LEDsoff();
695
696 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
697 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]);
698
699 set_tracing(FALSE);
700}
701
702//-----------------------------------------------------------------------------
703// Prepare tag messages
704//-----------------------------------------------------------------------------
705static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
706{
707 ToSendReset();
708
709 // Correction bit, might be removed when not needed
710 ToSendStuffBit(0);
711 ToSendStuffBit(0);
712 ToSendStuffBit(0);
713 ToSendStuffBit(0);
714 ToSendStuffBit(1); // 1
715 ToSendStuffBit(0);
716 ToSendStuffBit(0);
717 ToSendStuffBit(0);
718
719 // Send startbit
720 ToSend[++ToSendMax] = SEC_D;
721 LastProxToAirDuration = 8 * ToSendMax - 4;
722
723 for(uint16_t i = 0; i < len; i++) {
724 uint8_t b = cmd[i];
725
726 // Data bits
727 for(uint16_t j = 0; j < 8; j++) {
728 if(b & 1) {
729 ToSend[++ToSendMax] = SEC_D;
730 } else {
731 ToSend[++ToSendMax] = SEC_E;
732 }
733 b >>= 1;
734 }
735
736 // Get the parity bit
737 if (parity[i>>3] & (0x80>>(i&0x0007))) {
738 ToSend[++ToSendMax] = SEC_D;
739 LastProxToAirDuration = 8 * ToSendMax - 4;
740 } else {
741 ToSend[++ToSendMax] = SEC_E;
742 LastProxToAirDuration = 8 * ToSendMax;
743 }
744 }
745
746 // Send stopbit
747 ToSend[++ToSendMax] = SEC_F;
748
749 // Convert from last byte pos to length
750 ToSendMax++;
751}
752
753static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
754{
755 uint8_t par[MAX_PARITY_SIZE];
756
757 GetParity(cmd, len, par);
758 CodeIso14443aAsTagPar(cmd, len, par);
759}
760
761
762static void Code4bitAnswerAsTag(uint8_t cmd)
763{
764 int i;
765
766 ToSendReset();
767
768 // Correction bit, might be removed when not needed
769 ToSendStuffBit(0);
770 ToSendStuffBit(0);
771 ToSendStuffBit(0);
772 ToSendStuffBit(0);
773 ToSendStuffBit(1); // 1
774 ToSendStuffBit(0);
775 ToSendStuffBit(0);
776 ToSendStuffBit(0);
777
778 // Send startbit
779 ToSend[++ToSendMax] = SEC_D;
780
781 uint8_t b = cmd;
782 for(i = 0; i < 4; i++) {
783 if(b & 1) {
784 ToSend[++ToSendMax] = SEC_D;
785 LastProxToAirDuration = 8 * ToSendMax - 4;
786 } else {
787 ToSend[++ToSendMax] = SEC_E;
788 LastProxToAirDuration = 8 * ToSendMax;
789 }
790 b >>= 1;
791 }
792
793 // Send stopbit
794 ToSend[++ToSendMax] = SEC_F;
795
796 // Convert from last byte pos to length
797 ToSendMax++;
798}
799
800//-----------------------------------------------------------------------------
801// Wait for commands from reader
802// Stop when button is pressed
803// Or return TRUE when command is captured
804//-----------------------------------------------------------------------------
805static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
806{
807 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
808 // only, since we are receiving, not transmitting).
809 // Signal field is off with the appropriate LED
810 LED_D_OFF();
811 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
812
813 // Now run a `software UART' on the stream of incoming samples.
814 UartInit(received, parity);
815
816 // clear RXRDY:
817 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
818
819 for(;;) {
820 WDT_HIT();
821
822 if(BUTTON_PRESS()) return FALSE;
823
824 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
825 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
826 if(MillerDecoding(b, 0)) {
827 *len = Uart.len;
828 return TRUE;
829 }
830 }
831 }
832}
833
834static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
835int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
836int EmSend4bit(uint8_t resp);
837int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
838int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
839int EmSendCmd(uint8_t *resp, uint16_t respLen);
840int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
841bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
842 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
843
844static uint8_t* free_buffer_pointer;
845
846typedef struct {
847 uint8_t* response;
848 size_t response_n;
849 uint8_t* modulation;
850 size_t modulation_n;
851 uint32_t ProxToAirDuration;
852} tag_response_info_t;
853
854bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
855 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
856 // This will need the following byte array for a modulation sequence
857 // 144 data bits (18 * 8)
858 // 18 parity bits
859 // 2 Start and stop
860 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
861 // 1 just for the case
862 // ----------- +
863 // 166 bytes, since every bit that needs to be send costs us a byte
864 //
865
866
867 // Prepare the tag modulation bits from the message
868 CodeIso14443aAsTag(response_info->response,response_info->response_n);
869
870 // Make sure we do not exceed the free buffer space
871 if (ToSendMax > max_buffer_size) {
872 Dbprintf("Out of memory, when modulating bits for tag answer:");
873 Dbhexdump(response_info->response_n,response_info->response,false);
874 return false;
875 }
876
877 // Copy the byte array, used for this modulation to the buffer position
878 memcpy(response_info->modulation,ToSend,ToSendMax);
879
880 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
881 response_info->modulation_n = ToSendMax;
882 response_info->ProxToAirDuration = LastProxToAirDuration;
883
884 return true;
885}
886
887
888// "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
889// Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
890// 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
891// -> need 273 bytes buffer
892// 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370
893// 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits
894#define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453
895
896bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
897 // Retrieve and store the current buffer index
898 response_info->modulation = free_buffer_pointer;
899
900 // Determine the maximum size we can use from our buffer
901 size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE;
902
903 // Forward the prepare tag modulation function to the inner function
904 if (prepare_tag_modulation(response_info, max_buffer_size)) {
905 // Update the free buffer offset
906 free_buffer_pointer += ToSendMax;
907 return true;
908 } else {
909 return false;
910 }
911}
912
913//-----------------------------------------------------------------------------
914// Main loop of simulated tag: receive commands from reader, decide what
915// response to send, and send it.
916//-----------------------------------------------------------------------------
917void SimulateIso14443aTag(int tagType, int flags, byte_t* data)
918{
919 uint32_t counters[] = {0,0,0};
920 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
921 // This can be used in a reader-only attack.
922 // (it can also be retrieved via 'hf 14a list', but hey...
923 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
924 uint8_t ar_nr_collected = 0;
925
926 uint8_t sak;
927
928 // PACK response to PWD AUTH for EV1/NTAG
929 uint8_t response8[4] = {0,0,0,0};
930
931 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
932 uint8_t response1[2] = {0,0};
933
934 switch (tagType) {
935 case 1: { // MIFARE Classic
936 // Says: I am Mifare 1k - original line
937 response1[0] = 0x04;
938 response1[1] = 0x00;
939 sak = 0x08;
940 } break;
941 case 2: { // MIFARE Ultralight
942 // Says: I am a stupid memory tag, no crypto
943 response1[0] = 0x44;
944 response1[1] = 0x00;
945 sak = 0x00;
946 } break;
947 case 3: { // MIFARE DESFire
948 // Says: I am a DESFire tag, ph33r me
949 response1[0] = 0x04;
950 response1[1] = 0x03;
951 sak = 0x20;
952 } break;
953 case 4: { // ISO/IEC 14443-4
954 // Says: I am a javacard (JCOP)
955 response1[0] = 0x04;
956 response1[1] = 0x00;
957 sak = 0x28;
958 } break;
959 case 5: { // MIFARE TNP3XXX
960 // Says: I am a toy
961 response1[0] = 0x01;
962 response1[1] = 0x0f;
963 sak = 0x01;
964 } break;
965 case 6: { // MIFARE Mini
966 // Says: I am a Mifare Mini, 320b
967 response1[0] = 0x44;
968 response1[1] = 0x00;
969 sak = 0x09;
970 } break;
971 case 7: { // NTAG?
972 // Says: I am a NTAG,
973 response1[0] = 0x44;
974 response1[1] = 0x00;
975 sak = 0x00;
976 // PACK
977 response8[0] = 0x80;
978 response8[1] = 0x80;
979 ComputeCrc14443(CRC_14443_A, response8, 2, &response8[2], &response8[3]);
980 // uid not supplied then get from emulator memory
981 if (data[0]==0) {
982 uint16_t start = 4 * (0+12);
983 uint8_t emdata[8];
984 emlGetMemBt( emdata, start, sizeof(emdata));
985 memcpy(data, emdata, 3); //uid bytes 0-2
986 memcpy(data+3, emdata+4, 4); //uid bytes 3-7
987 flags |= FLAG_7B_UID_IN_DATA;
988 }
989 } break;
990 default: {
991 Dbprintf("Error: unkown tagtype (%d)",tagType);
992 return;
993 } break;
994 }
995
996 // The second response contains the (mandatory) first 24 bits of the UID
997 uint8_t response2[5] = {0x00};
998
999 // Check if the uid uses the (optional) part
1000 uint8_t response2a[5] = {0x00};
1001
1002 if (flags & FLAG_7B_UID_IN_DATA) {
1003 response2[0] = 0x88;
1004 response2[1] = data[0];
1005 response2[2] = data[1];
1006 response2[3] = data[2];
1007
1008 response2a[0] = data[3];
1009 response2a[1] = data[4];
1010 response2a[2] = data[5];
1011 response2a[3] = data[6]; //??
1012 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1013
1014 // Configure the ATQA and SAK accordingly
1015 response1[0] |= 0x40;
1016 sak |= 0x04;
1017 } else {
1018 memcpy(response2, data, 4);
1019 //num_to_bytes(uid_1st,4,response2);
1020 // Configure the ATQA and SAK accordingly
1021 response1[0] &= 0xBF;
1022 sak &= 0xFB;
1023 }
1024
1025 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1026 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1027
1028 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1029 uint8_t response3[3] = {0x00};
1030 response3[0] = sak;
1031 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1032
1033 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1034 uint8_t response3a[3] = {0x00};
1035 response3a[0] = sak & 0xFB;
1036 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1037
1038 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1039 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1040 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1041 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1042 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1043 // TC(1) = 0x02: CID supported, NAD not supported
1044 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
1045
1046 // Prepare GET_VERSION (different for UL EV-1 / NTAG)
1047 //uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
1048 //uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
1049
1050 // Prepare CHK_TEARING
1051 //uint8_t response9[] = {0xBD,0x90,0x3f};
1052
1053 #define TAG_RESPONSE_COUNT 10
1054 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
1055 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
1056 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
1057 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1058 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
1059 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
1060 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1061 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1062 //{ .response = response7_NTAG, .response_n = sizeof(response7_NTAG)}, // EV1/NTAG GET_VERSION response
1063 { .response = response8, .response_n = sizeof(response8) } // EV1/NTAG PACK response
1064 //{ .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response
1065 };
1066
1067 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1068 // Such a response is less time critical, so we can prepare them on the fly
1069 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1070 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1071 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1072 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1073 tag_response_info_t dynamic_response_info = {
1074 .response = dynamic_response_buffer,
1075 .response_n = 0,
1076 .modulation = dynamic_modulation_buffer,
1077 .modulation_n = 0
1078 };
1079
1080 // We need to listen to the high-frequency, peak-detected path.
1081 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1082
1083 BigBuf_free_keep_EM();
1084
1085 // allocate buffers:
1086 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1087 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
1088 free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE);
1089
1090 // clear trace
1091 clear_trace();
1092 set_tracing(TRUE);
1093
1094 // Prepare the responses of the anticollision phase
1095 // there will be not enough time to do this at the moment the reader sends it REQA
1096 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++)
1097 prepare_allocated_tag_modulation(&responses[i]);
1098
1099 int len = 0;
1100
1101 // To control where we are in the protocol
1102 int order = 0;
1103 int lastorder;
1104
1105 // Just to allow some checks
1106 int happened = 0;
1107 int happened2 = 0;
1108 int cmdsRecvd = 0;
1109
1110 cmdsRecvd = 0;
1111 tag_response_info_t* p_response;
1112
1113 LED_A_ON();
1114 for(;;) {
1115 // Clean receive command buffer
1116 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1117 DbpString("Button press");
1118 break;
1119 }
1120
1121 p_response = NULL;
1122
1123 // Okay, look at the command now.
1124 lastorder = order;
1125 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1126 p_response = &responses[0]; order = 1;
1127 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1128 p_response = &responses[0]; order = 6;
1129 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1130 p_response = &responses[1]; order = 2;
1131 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1132 p_response = &responses[2]; order = 20;
1133 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1134 p_response = &responses[3]; order = 3;
1135 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1136 p_response = &responses[4]; order = 30;
1137 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1138 uint8_t block = receivedCmd[1];
1139 // if Ultralight or NTAG (4 byte blocks)
1140 if ( tagType == 7 || tagType == 2 ) {
1141 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1142 uint16_t start = 4 * (block+12);
1143 uint8_t emdata[MAX_MIFARE_FRAME_SIZE];
1144 emlGetMemBt( emdata, start, 16);
1145 AppendCrc14443a(emdata, 16);
1146 EmSendCmdEx(emdata, sizeof(emdata), false);
1147 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1148 p_response = NULL;
1149 } else { // all other tags (16 byte block tags)
1150 EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
1151 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1152 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1153 p_response = NULL;
1154 }
1155 } else if(receivedCmd[0] == 0x3A) { // Received a FAST READ (ranged read)
1156
1157 uint8_t emdata[MAX_FRAME_SIZE];
1158 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1159 int start = (receivedCmd[1]+12) * 4;
1160 int len = (receivedCmd[2] - receivedCmd[1] + 1) * 4;
1161 emlGetMemBt( emdata, start, len);
1162 AppendCrc14443a(emdata, len);
1163 EmSendCmdEx(emdata, len+2, false);
1164 p_response = NULL;
1165
1166 } else if(receivedCmd[0] == 0x3C && tagType == 7) { // Received a READ SIGNATURE --
1167 // ECC data, taken from a NTAG215 amiibo token. might work. LEN: 32, + 2 crc
1168 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1169 uint16_t start = 4 * 4;
1170 uint8_t emdata[34];
1171 emlGetMemBt( emdata, start, 32);
1172 AppendCrc14443a(emdata, 32);
1173 EmSendCmdEx(emdata, sizeof(emdata), false);
1174 //uint8_t data[] = {0x56,0x06,0xa6,0x4f,0x43,0x32,0x53,0x6f,
1175 // 0x43,0xda,0x45,0xd6,0x61,0x38,0xaa,0x1e,
1176 // 0xcf,0xd3,0x61,0x36,0xca,0x5f,0xbb,0x05,
1177 // 0xce,0x21,0x24,0x5b,0xa6,0x7a,0x79,0x07,
1178 // 0x00,0x00};
1179 //AppendCrc14443a(data, sizeof(data)-2);
1180 //EmSendCmdEx(data,sizeof(data),false);
1181 p_response = NULL;
1182 } else if (receivedCmd[0] == 0x39 && tagType == 7) { // Received a READ COUNTER --
1183 uint8_t index = receivedCmd[1];
1184 uint8_t data[] = {0x00,0x00,0x00,0x14,0xa5};
1185 if ( counters[index] > 0) {
1186 num_to_bytes(counters[index], 3, data);
1187 AppendCrc14443a(data, sizeof(data)-2);
1188 }
1189 EmSendCmdEx(data,sizeof(data),false);
1190 p_response = NULL;
1191 } else if (receivedCmd[0] == 0xA5 && tagType == 7) { // Received a INC COUNTER --
1192 // number of counter
1193 uint8_t counter = receivedCmd[1];
1194 uint32_t val = bytes_to_num(receivedCmd+2,4);
1195 counters[counter] = val;
1196
1197 // send ACK
1198 uint8_t ack[] = {0x0a};
1199 EmSendCmdEx(ack,sizeof(ack),false);
1200 p_response = NULL;
1201
1202 } else if(receivedCmd[0] == 0x3E && tagType == 7) { // Received a CHECK_TEARING_EVENT --
1203 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1204 uint8_t emdata[3];
1205 uint8_t counter=0;
1206 if (receivedCmd[1]<3) counter = receivedCmd[1];
1207 emlGetMemBt( emdata, 10+counter, 1);
1208 AppendCrc14443a(emdata, sizeof(emdata)-2);
1209 EmSendCmdEx(emdata, sizeof(emdata), false);
1210 p_response = NULL;
1211 //p_response = &responses[9];
1212
1213 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1214
1215 if (tracing) {
1216 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1217 }
1218 p_response = NULL;
1219 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1220
1221 if ( tagType == 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
1222 uint8_t emdata[10];
1223 emlGetMemBt( emdata, 0, 8 );
1224 AppendCrc14443a(emdata, sizeof(emdata)-2);
1225 EmSendCmdEx(emdata, sizeof(emdata), false);
1226 p_response = NULL;
1227 //p_response = &responses[7];
1228 } else {
1229 p_response = &responses[5]; order = 7;
1230 }
1231 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1232 if (tagType == 1 || tagType == 2) { // RATS not supported
1233 EmSend4bit(CARD_NACK_NA);
1234 p_response = NULL;
1235 } else {
1236 p_response = &responses[6]; order = 70;
1237 }
1238 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1239 if (tracing) {
1240 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1241 }
1242 uint32_t nonce = bytes_to_num(response5,4);
1243 uint32_t nr = bytes_to_num(receivedCmd,4);
1244 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1245 //Dbprintf("Auth attempt {nonce}{nr}{ar}: %08x %08x %08x", nonce, nr, ar);
1246
1247 if(flags & FLAG_NR_AR_ATTACK )
1248 {
1249 if(ar_nr_collected < 2){
1250 // Avoid duplicates... probably not necessary, nr should vary.
1251 //if(ar_nr_responses[3] != nr){
1252 ar_nr_responses[ar_nr_collected*5] = 0;
1253 ar_nr_responses[ar_nr_collected*5+1] = 0;
1254 ar_nr_responses[ar_nr_collected*5+2] = nonce;
1255 ar_nr_responses[ar_nr_collected*5+3] = nr;
1256 ar_nr_responses[ar_nr_collected*5+4] = ar;
1257 ar_nr_collected++;
1258 //}
1259 }
1260
1261 if(ar_nr_collected > 1 ) {
1262
1263 if (MF_DBGLEVEL >= 2) {
1264 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
1265 Dbprintf("../tools/mfkey/mfkey32 %07x%08x %08x %08x %08x %08x %08x",
1266 ar_nr_responses[0], // UID1
1267 ar_nr_responses[1], // UID2
1268 ar_nr_responses[2], // NT
1269 ar_nr_responses[3], // AR1
1270 ar_nr_responses[4], // NR1
1271 ar_nr_responses[8], // AR2
1272 ar_nr_responses[9] // NR2
1273 );
1274 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
1275 ar_nr_responses[0], // UID1
1276 ar_nr_responses[1], // UID2
1277 ar_nr_responses[2], // NT1
1278 ar_nr_responses[3], // AR1
1279 ar_nr_responses[4], // NR1
1280 ar_nr_responses[7], // NT2
1281 ar_nr_responses[8], // AR2
1282 ar_nr_responses[9] // NR2
1283 );
1284 }
1285 uint8_t len = ar_nr_collected*5*4;
1286 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,len,0,&ar_nr_responses,len);
1287 ar_nr_collected = 0;
1288 memset(ar_nr_responses, 0x00, len);
1289 }
1290 }
1291 } else if (receivedCmd[0] == 0x1a ) // ULC authentication
1292 {
1293
1294 }
1295 else if (receivedCmd[0] == 0x1b) // NTAG / EV-1 authentication
1296 {
1297 if ( tagType == 7 ) {
1298 uint16_t start = 13; //first 4 blocks of emu are [getversion answer - check tearing - pack - 0x00]
1299 uint8_t emdata[4];
1300 emlGetMemBt( emdata, start, 2);
1301 AppendCrc14443a(emdata, 2);
1302 EmSendCmdEx(emdata, sizeof(emdata), false);
1303 p_response = NULL;
1304 //p_response = &responses[8]; // PACK response
1305 uint32_t pwd = bytes_to_num(receivedCmd+1,4);
1306
1307 if ( MF_DBGLEVEL >= 3) Dbprintf("Auth attempt: %08x", pwd);
1308 }
1309 } else {
1310 // Check for ISO 14443A-4 compliant commands, look at left nibble
1311 switch (receivedCmd[0]) {
1312 case 0x02:
1313 case 0x03: { // IBlock (command no CID)
1314 dynamic_response_info.response[0] = receivedCmd[0];
1315 dynamic_response_info.response[1] = 0x90;
1316 dynamic_response_info.response[2] = 0x00;
1317 dynamic_response_info.response_n = 3;
1318 } break;
1319 case 0x0B:
1320 case 0x0A: { // IBlock (command CID)
1321 dynamic_response_info.response[0] = receivedCmd[0];
1322 dynamic_response_info.response[1] = 0x00;
1323 dynamic_response_info.response[2] = 0x90;
1324 dynamic_response_info.response[3] = 0x00;
1325 dynamic_response_info.response_n = 4;
1326 } break;
1327
1328 case 0x1A:
1329 case 0x1B: { // Chaining command
1330 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1331 dynamic_response_info.response_n = 2;
1332 } break;
1333
1334 case 0xaa:
1335 case 0xbb: {
1336 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1337 dynamic_response_info.response_n = 2;
1338 } break;
1339
1340 case 0xBA: { // ping / pong
1341 dynamic_response_info.response[0] = 0xAB;
1342 dynamic_response_info.response[1] = 0x00;
1343 dynamic_response_info.response_n = 2;
1344 } break;
1345
1346 case 0xCA:
1347 case 0xC2: { // Readers sends deselect command
1348 dynamic_response_info.response[0] = 0xCA;
1349 dynamic_response_info.response[1] = 0x00;
1350 dynamic_response_info.response_n = 2;
1351 } break;
1352
1353 default: {
1354 // Never seen this command before
1355 if (tracing) {
1356 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1357 }
1358 Dbprintf("Received unknown command (len=%d):",len);
1359 Dbhexdump(len,receivedCmd,false);
1360 // Do not respond
1361 dynamic_response_info.response_n = 0;
1362 } break;
1363 }
1364
1365 if (dynamic_response_info.response_n > 0) {
1366 // Copy the CID from the reader query
1367 dynamic_response_info.response[1] = receivedCmd[1];
1368
1369 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1370 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1371 dynamic_response_info.response_n += 2;
1372
1373 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1374 Dbprintf("Error preparing tag response");
1375 if (tracing) {
1376 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1377 }
1378 break;
1379 }
1380 p_response = &dynamic_response_info;
1381 }
1382 }
1383
1384 // Count number of wakeups received after a halt
1385 if(order == 6 && lastorder == 5) { happened++; }
1386
1387 // Count number of other messages after a halt
1388 if(order != 6 && lastorder == 5) { happened2++; }
1389
1390 if(cmdsRecvd > 999) {
1391 DbpString("1000 commands later...");
1392 break;
1393 }
1394 cmdsRecvd++;
1395
1396 if (p_response != NULL) {
1397 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1398 // do the tracing for the previous reader request and this tag answer:
1399 uint8_t par[MAX_PARITY_SIZE];
1400 GetParity(p_response->response, p_response->response_n, par);
1401
1402 EmLogTrace(Uart.output,
1403 Uart.len,
1404 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1405 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1406 Uart.parity,
1407 p_response->response,
1408 p_response->response_n,
1409 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1410 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1411 par);
1412 }
1413
1414 if (!tracing) {
1415 Dbprintf("Trace Full. Simulation stopped.");
1416 break;
1417 }
1418 }
1419
1420 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1421 set_tracing(FALSE);
1422 BigBuf_free_keep_EM();
1423 LED_A_OFF();
1424
1425 if (MF_DBGLEVEL >= 4){
1426 Dbprintf("-[ Wake ups after halt [%d]", happened);
1427 Dbprintf("-[ Messages after halt [%d]", happened2);
1428 Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd);
1429 }
1430}
1431
1432
1433// prepare a delayed transfer. This simply shifts ToSend[] by a number
1434// of bits specified in the delay parameter.
1435void PrepareDelayedTransfer(uint16_t delay)
1436{
1437 uint8_t bitmask = 0;
1438 uint8_t bits_to_shift = 0;
1439 uint8_t bits_shifted = 0;
1440
1441 delay &= 0x07;
1442 if (delay) {
1443 for (uint16_t i = 0; i < delay; i++) {
1444 bitmask |= (0x01 << i);
1445 }
1446 ToSend[ToSendMax++] = 0x00;
1447 for (uint16_t i = 0; i < ToSendMax; i++) {
1448 bits_to_shift = ToSend[i] & bitmask;
1449 ToSend[i] = ToSend[i] >> delay;
1450 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1451 bits_shifted = bits_to_shift;
1452 }
1453 }
1454}
1455
1456
1457//-------------------------------------------------------------------------------------
1458// Transmit the command (to the tag) that was placed in ToSend[].
1459// Parameter timing:
1460// if NULL: transfer at next possible time, taking into account
1461// request guard time and frame delay time
1462// if == 0: transfer immediately and return time of transfer
1463// if != 0: delay transfer until time specified
1464//-------------------------------------------------------------------------------------
1465static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
1466{
1467
1468 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1469
1470 uint32_t ThisTransferTime = 0;
1471
1472 if (timing) {
1473 if(*timing == 0) { // Measure time
1474 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1475 } else {
1476 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1477 }
1478 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1479 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1480 LastTimeProxToAirStart = *timing;
1481 } else {
1482 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1483 while(GetCountSspClk() < ThisTransferTime);
1484 LastTimeProxToAirStart = ThisTransferTime;
1485 }
1486
1487 // clear TXRDY
1488 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1489
1490 uint16_t c = 0;
1491 for(;;) {
1492 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1493 AT91C_BASE_SSC->SSC_THR = cmd[c];
1494 c++;
1495 if(c >= len) {
1496 break;
1497 }
1498 }
1499 }
1500
1501 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1502}
1503
1504
1505//-----------------------------------------------------------------------------
1506// Prepare reader command (in bits, support short frames) to send to FPGA
1507//-----------------------------------------------------------------------------
1508void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity)
1509{
1510 int i, j;
1511 int last;
1512 uint8_t b;
1513
1514 ToSendReset();
1515
1516 // Start of Communication (Seq. Z)
1517 ToSend[++ToSendMax] = SEC_Z;
1518 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1519 last = 0;
1520
1521 size_t bytecount = nbytes(bits);
1522 // Generate send structure for the data bits
1523 for (i = 0; i < bytecount; i++) {
1524 // Get the current byte to send
1525 b = cmd[i];
1526 size_t bitsleft = MIN((bits-(i*8)),8);
1527
1528 for (j = 0; j < bitsleft; j++) {
1529 if (b & 1) {
1530 // Sequence X
1531 ToSend[++ToSendMax] = SEC_X;
1532 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1533 last = 1;
1534 } else {
1535 if (last == 0) {
1536 // Sequence Z
1537 ToSend[++ToSendMax] = SEC_Z;
1538 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1539 } else {
1540 // Sequence Y
1541 ToSend[++ToSendMax] = SEC_Y;
1542 last = 0;
1543 }
1544 }
1545 b >>= 1;
1546 }
1547
1548 // Only transmit parity bit if we transmitted a complete byte
1549 if (j == 8 && parity != NULL) {
1550 // Get the parity bit
1551 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1552 // Sequence X
1553 ToSend[++ToSendMax] = SEC_X;
1554 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1555 last = 1;
1556 } else {
1557 if (last == 0) {
1558 // Sequence Z
1559 ToSend[++ToSendMax] = SEC_Z;
1560 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1561 } else {
1562 // Sequence Y
1563 ToSend[++ToSendMax] = SEC_Y;
1564 last = 0;
1565 }
1566 }
1567 }
1568 }
1569
1570 // End of Communication: Logic 0 followed by Sequence Y
1571 if (last == 0) {
1572 // Sequence Z
1573 ToSend[++ToSendMax] = SEC_Z;
1574 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1575 } else {
1576 // Sequence Y
1577 ToSend[++ToSendMax] = SEC_Y;
1578 last = 0;
1579 }
1580 ToSend[++ToSendMax] = SEC_Y;
1581
1582 // Convert to length of command:
1583 ToSendMax++;
1584}
1585
1586//-----------------------------------------------------------------------------
1587// Prepare reader command to send to FPGA
1588//-----------------------------------------------------------------------------
1589void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity)
1590{
1591 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1592}
1593
1594
1595//-----------------------------------------------------------------------------
1596// Wait for commands from reader
1597// Stop when button is pressed (return 1) or field was gone (return 2)
1598// Or return 0 when command is captured
1599//-----------------------------------------------------------------------------
1600static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
1601{
1602 *len = 0;
1603
1604 uint32_t timer = 0, vtime = 0;
1605 int analogCnt = 0;
1606 int analogAVG = 0;
1607
1608 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1609 // only, since we are receiving, not transmitting).
1610 // Signal field is off with the appropriate LED
1611 LED_D_OFF();
1612 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1613
1614 // Set ADC to read field strength
1615 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1616 AT91C_BASE_ADC->ADC_MR =
1617 ADC_MODE_PRESCALE(63) |
1618 ADC_MODE_STARTUP_TIME(1) |
1619 ADC_MODE_SAMPLE_HOLD_TIME(15);
1620 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1621 // start ADC
1622 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1623
1624 // Now run a 'software UART' on the stream of incoming samples.
1625 UartInit(received, parity);
1626
1627 // Clear RXRDY:
1628 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1629
1630 for(;;) {
1631 WDT_HIT();
1632
1633 if (BUTTON_PRESS()) return 1;
1634
1635 // test if the field exists
1636 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1637 analogCnt++;
1638 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1639 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1640 if (analogCnt >= 32) {
1641 if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1642 vtime = GetTickCount();
1643 if (!timer) timer = vtime;
1644 // 50ms no field --> card to idle state
1645 if (vtime - timer > 50) return 2;
1646 } else
1647 if (timer) timer = 0;
1648 analogCnt = 0;
1649 analogAVG = 0;
1650 }
1651 }
1652
1653 // receive and test the miller decoding
1654 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1655 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1656 if(MillerDecoding(b, 0)) {
1657 *len = Uart.len;
1658 return 0;
1659 }
1660 }
1661
1662 }
1663}
1664
1665
1666static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
1667{
1668 uint8_t b;
1669 uint16_t i = 0;
1670 uint32_t ThisTransferTime;
1671
1672 // Modulate Manchester
1673 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1674
1675 // include correction bit if necessary
1676 if (Uart.parityBits & 0x01) {
1677 correctionNeeded = TRUE;
1678 }
1679 if(correctionNeeded) {
1680 // 1236, so correction bit needed
1681 i = 0;
1682 } else {
1683 i = 1;
1684 }
1685
1686 // clear receiving shift register and holding register
1687 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1688 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1689 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1690 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1691
1692 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1693 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1694 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1695 if (AT91C_BASE_SSC->SSC_RHR) break;
1696 }
1697
1698 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1699
1700 // Clear TXRDY:
1701 AT91C_BASE_SSC->SSC_THR = SEC_F;
1702
1703 // send cycle
1704 for(; i < respLen; ) {
1705 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1706 AT91C_BASE_SSC->SSC_THR = resp[i++];
1707 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1708 }
1709
1710 if(BUTTON_PRESS()) break;
1711 }
1712
1713 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1714 uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3;
1715 for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
1716 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1717 AT91C_BASE_SSC->SSC_THR = SEC_F;
1718 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1719 i++;
1720 }
1721 }
1722
1723 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1724
1725 return 0;
1726}
1727
1728int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1729 Code4bitAnswerAsTag(resp);
1730 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1731 // do the tracing for the previous reader request and this tag answer:
1732 uint8_t par[1];
1733 GetParity(&resp, 1, par);
1734 EmLogTrace(Uart.output,
1735 Uart.len,
1736 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1737 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1738 Uart.parity,
1739 &resp,
1740 1,
1741 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1742 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1743 par);
1744 return res;
1745}
1746
1747int EmSend4bit(uint8_t resp){
1748 return EmSend4bitEx(resp, false);
1749}
1750
1751int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1752 CodeIso14443aAsTagPar(resp, respLen, par);
1753 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1754 // do the tracing for the previous reader request and this tag answer:
1755 EmLogTrace(Uart.output,
1756 Uart.len,
1757 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1758 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1759 Uart.parity,
1760 resp,
1761 respLen,
1762 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1763 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1764 par);
1765 return res;
1766}
1767
1768int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1769 uint8_t par[MAX_PARITY_SIZE];
1770 GetParity(resp, respLen, par);
1771 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1772}
1773
1774int EmSendCmd(uint8_t *resp, uint16_t respLen){
1775 uint8_t par[MAX_PARITY_SIZE];
1776 GetParity(resp, respLen, par);
1777 return EmSendCmdExPar(resp, respLen, false, par);
1778}
1779
1780int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1781 return EmSendCmdExPar(resp, respLen, false, par);
1782}
1783
1784bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1785 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1786{
1787 if (tracing) {
1788 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1789 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1790 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1791 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1792 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1793 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1794 reader_EndTime = tag_StartTime - exact_fdt;
1795 reader_StartTime = reader_EndTime - reader_modlen;
1796 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) {
1797 return FALSE;
1798 } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1799 } else {
1800 return TRUE;
1801 }
1802}
1803
1804//-----------------------------------------------------------------------------
1805// Wait a certain time for tag response
1806// If a response is captured return TRUE
1807// If it takes too long return FALSE
1808//-----------------------------------------------------------------------------
1809static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
1810{
1811 uint32_t c = 0x00;
1812
1813 // Set FPGA mode to "reader listen mode", no modulation (listen
1814 // only, since we are receiving, not transmitting).
1815 // Signal field is on with the appropriate LED
1816 LED_D_ON();
1817 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1818
1819 // Now get the answer from the card
1820 DemodInit(receivedResponse, receivedResponsePar);
1821
1822 // clear RXRDY:
1823 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1824
1825 for(;;) {
1826 WDT_HIT();
1827
1828 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1829 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1830 if(ManchesterDecoding(b, offset, 0)) {
1831 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1832 return TRUE;
1833 } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) {
1834 return FALSE;
1835 }
1836 }
1837 }
1838}
1839
1840void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
1841{
1842 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1843
1844 // Send command to tag
1845 TransmitFor14443a(ToSend, ToSendMax, timing);
1846 if(trigger)
1847 LED_A_ON();
1848
1849 // Log reader command in trace buffer
1850 if (tracing) {
1851 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1852 }
1853}
1854
1855void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
1856{
1857 ReaderTransmitBitsPar(frame, len*8, par, timing);
1858}
1859
1860void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
1861{
1862 // Generate parity and redirect
1863 uint8_t par[MAX_PARITY_SIZE];
1864 GetParity(frame, len/8, par);
1865 ReaderTransmitBitsPar(frame, len, par, timing);
1866}
1867
1868void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
1869{
1870 // Generate parity and redirect
1871 uint8_t par[MAX_PARITY_SIZE];
1872 GetParity(frame, len, par);
1873 ReaderTransmitBitsPar(frame, len*8, par, timing);
1874}
1875
1876int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
1877{
1878 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) return FALSE;
1879 if (tracing) {
1880 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1881 }
1882 return Demod.len;
1883}
1884
1885int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
1886{
1887 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE;
1888 if (tracing) {
1889 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1890 }
1891 return Demod.len;
1892}
1893
1894// performs iso14443a anticollision (optional) and card select procedure
1895// fills the uid and cuid pointer unless NULL
1896// fills the card info record unless NULL
1897// if anticollision is false, then the UID must be provided in uid_ptr[]
1898// and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
1899int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades) {
1900 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1901 uint8_t sel_all[] = { 0x93,0x20 };
1902 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1903 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1904 uint8_t resp[MAX_FRAME_SIZE]; // theoretically. A usual RATS will be much smaller
1905 uint8_t resp_par[MAX_PARITY_SIZE];
1906 byte_t uid_resp[4];
1907 size_t uid_resp_len;
1908
1909 uint8_t sak = 0x04; // cascade uid
1910 int cascade_level = 0;
1911 int len;
1912
1913 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1914 ReaderTransmitBitsPar(wupa, 7, NULL, NULL);
1915
1916 // Receive the ATQA
1917 if(!ReaderReceive(resp, resp_par)) return 0;
1918
1919 if(p_hi14a_card) {
1920 memcpy(p_hi14a_card->atqa, resp, 2);
1921 p_hi14a_card->uidlen = 0;
1922 memset(p_hi14a_card->uid,0,10);
1923 }
1924
1925 if (anticollision) {
1926 // clear uid
1927 if (uid_ptr) {
1928 memset(uid_ptr,0,10);
1929 }
1930 }
1931
1932 // check for proprietary anticollision:
1933 if ((resp[0] & 0x1F) == 0) {
1934 return 3;
1935 }
1936
1937 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1938 // which case we need to make a cascade 2 request and select - this is a long UID
1939 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1940 for(; sak & 0x04; cascade_level++) {
1941 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1942 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1943
1944 if (anticollision) {
1945 // SELECT_ALL
1946 ReaderTransmit(sel_all, sizeof(sel_all), NULL);
1947 if (!ReaderReceive(resp, resp_par)) return 0;
1948
1949 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1950 memset(uid_resp, 0, 4);
1951 uint16_t uid_resp_bits = 0;
1952 uint16_t collision_answer_offset = 0;
1953 // anti-collision-loop:
1954 while (Demod.collisionPos) {
1955 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1956 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1957 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1958 uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8);
1959 }
1960 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1961 uid_resp_bits++;
1962 // construct anticollosion command:
1963 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1964 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1965 sel_uid[2+i] = uid_resp[i];
1966 }
1967 collision_answer_offset = uid_resp_bits%8;
1968 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1969 if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0;
1970 }
1971 // finally, add the last bits and BCC of the UID
1972 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1973 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1974 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1975 }
1976
1977 } else { // no collision, use the response to SELECT_ALL as current uid
1978 memcpy(uid_resp, resp, 4);
1979 }
1980 } else {
1981 if (cascade_level < num_cascades - 1) {
1982 uid_resp[0] = 0x88;
1983 memcpy(uid_resp+1, uid_ptr+cascade_level*3, 3);
1984 } else {
1985 memcpy(uid_resp, uid_ptr+cascade_level*3, 4);
1986 }
1987 }
1988 uid_resp_len = 4;
1989
1990 // calculate crypto UID. Always use last 4 Bytes.
1991 if(cuid_ptr) {
1992 *cuid_ptr = bytes_to_num(uid_resp, 4);
1993 }
1994
1995 // Construct SELECT UID command
1996 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1997 memcpy(sel_uid+2, uid_resp, 4); // the UID received during anticollision, or the provided UID
1998 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1999 AppendCrc14443a(sel_uid, 7); // calculate and add CRC
2000 ReaderTransmit(sel_uid, sizeof(sel_uid), NULL);
2001
2002 // Receive the SAK
2003 if (!ReaderReceive(resp, resp_par)) return 0;
2004 sak = resp[0];
2005
2006 // Test if more parts of the uid are coming
2007 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
2008 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
2009 // http://www.nxp.com/documents/application_note/AN10927.pdf
2010 uid_resp[0] = uid_resp[1];
2011 uid_resp[1] = uid_resp[2];
2012 uid_resp[2] = uid_resp[3];
2013 uid_resp_len = 3;
2014 }
2015
2016 if(uid_ptr && anticollision) {
2017 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
2018 }
2019
2020 if(p_hi14a_card) {
2021 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
2022 p_hi14a_card->uidlen += uid_resp_len;
2023 }
2024 }
2025
2026 if(p_hi14a_card) {
2027 p_hi14a_card->sak = sak;
2028 p_hi14a_card->ats_len = 0;
2029 }
2030
2031 // non iso14443a compliant tag
2032 if( (sak & 0x20) == 0) return 2;
2033
2034 // Request for answer to select
2035 AppendCrc14443a(rats, 2);
2036 ReaderTransmit(rats, sizeof(rats), NULL);
2037
2038 if (!(len = ReaderReceive(resp, resp_par))) return 0;
2039
2040
2041 if(p_hi14a_card) {
2042 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
2043 p_hi14a_card->ats_len = len;
2044 }
2045
2046 // reset the PCB block number
2047 iso14_pcb_blocknum = 0;
2048
2049 // set default timeout based on ATS
2050 iso14a_set_ATS_timeout(resp);
2051
2052 return 1;
2053}
2054
2055void iso14443a_setup(uint8_t fpga_minor_mode) {
2056 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
2057 // Set up the synchronous serial port
2058 FpgaSetupSsc();
2059 // connect Demodulated Signal to ADC:
2060 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
2061
2062 // Signal field is on with the appropriate LED
2063 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
2064 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
2065 LED_D_ON();
2066 } else {
2067 LED_D_OFF();
2068 }
2069 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
2070
2071 // Start the timer
2072 StartCountSspClk();
2073
2074 DemodReset();
2075 UartReset();
2076 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
2077 iso14a_set_timeout(10*106); // 10ms default
2078}
2079
2080int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
2081 uint8_t parity[MAX_PARITY_SIZE];
2082 uint8_t real_cmd[cmd_len+4];
2083 real_cmd[0] = 0x0a; //I-Block
2084 // put block number into the PCB
2085 real_cmd[0] |= iso14_pcb_blocknum;
2086 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
2087 memcpy(real_cmd+2, cmd, cmd_len);
2088 AppendCrc14443a(real_cmd,cmd_len+2);
2089
2090 ReaderTransmit(real_cmd, cmd_len+4, NULL);
2091 size_t len = ReaderReceive(data, parity);
2092 uint8_t *data_bytes = (uint8_t *) data;
2093 if (!len)
2094 return 0; //DATA LINK ERROR
2095 // if we received an I- or R(ACK)-Block with a block number equal to the
2096 // current block number, toggle the current block number
2097 else if (len >= 4 // PCB+CID+CRC = 4 bytes
2098 && ((data_bytes[0] & 0xC0) == 0 // I-Block
2099 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
2100 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
2101 {
2102 iso14_pcb_blocknum ^= 1;
2103 }
2104
2105 return len;
2106}
2107
2108//-----------------------------------------------------------------------------
2109// Read an ISO 14443a tag. Send out commands and store answers.
2110//
2111//-----------------------------------------------------------------------------
2112void ReaderIso14443a(UsbCommand *c)
2113{
2114 iso14a_command_t param = c->arg[0];
2115 uint8_t *cmd = c->d.asBytes;
2116 size_t len = c->arg[1] & 0xffff;
2117 size_t lenbits = c->arg[1] >> 16;
2118 uint32_t timeout = c->arg[2];
2119 uint32_t arg0 = 0;
2120 byte_t buf[USB_CMD_DATA_SIZE];
2121 uint8_t par[MAX_PARITY_SIZE];
2122
2123 if(param & ISO14A_CONNECT) {
2124 clear_trace();
2125 }
2126
2127 set_tracing(TRUE);
2128
2129 if(param & ISO14A_REQUEST_TRIGGER) {
2130 iso14a_set_trigger(TRUE);
2131 }
2132
2133 if(param & ISO14A_CONNECT) {
2134 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
2135 if(!(param & ISO14A_NO_SELECT)) {
2136 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
2137 arg0 = iso14443a_select_card(NULL,card,NULL, true, 0);
2138 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
2139 }
2140 }
2141
2142 if(param & ISO14A_SET_TIMEOUT) {
2143 iso14a_set_timeout(timeout);
2144 }
2145
2146 if(param & ISO14A_APDU) {
2147 arg0 = iso14_apdu(cmd, len, buf);
2148 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2149 }
2150
2151 if(param & ISO14A_RAW) {
2152 if(param & ISO14A_APPEND_CRC) {
2153 if(param & ISO14A_TOPAZMODE) {
2154 AppendCrc14443b(cmd,len);
2155 } else {
2156 AppendCrc14443a(cmd,len);
2157 }
2158 len += 2;
2159 if (lenbits) lenbits += 16;
2160 }
2161 if(lenbits>0) { // want to send a specific number of bits (e.g. short commands)
2162 if(param & ISO14A_TOPAZMODE) {
2163 int bits_to_send = lenbits;
2164 uint16_t i = 0;
2165 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity
2166 bits_to_send -= 7;
2167 while (bits_to_send > 0) {
2168 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity
2169 bits_to_send -= 8;
2170 }
2171 } else {
2172 GetParity(cmd, lenbits/8, par);
2173 ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity
2174 }
2175 } else { // want to send complete bytes only
2176 if(param & ISO14A_TOPAZMODE) {
2177 uint16_t i = 0;
2178 ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy
2179 while (i < len) {
2180 ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy
2181 }
2182 } else {
2183 ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity
2184 }
2185 }
2186 arg0 = ReaderReceive(buf, par);
2187 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2188 }
2189
2190 if(param & ISO14A_REQUEST_TRIGGER) {
2191 iso14a_set_trigger(FALSE);
2192 }
2193
2194 if(param & ISO14A_NO_DISCONNECT) {
2195 return;
2196 }
2197
2198 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2199 set_tracing(FALSE);
2200 LEDsoff();
2201}
2202
2203
2204// Determine the distance between two nonces.
2205// Assume that the difference is small, but we don't know which is first.
2206// Therefore try in alternating directions.
2207int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
2208
2209 uint16_t i;
2210 uint32_t nttmp1, nttmp2;
2211
2212 if (nt1 == nt2) return 0;
2213
2214 nttmp1 = nt1;
2215 nttmp2 = nt2;
2216
2217 for (i = 1; i < 0xFFFF; i++) {
2218 nttmp1 = prng_successor(nttmp1, 1);
2219 if (nttmp1 == nt2) return i;
2220 nttmp2 = prng_successor(nttmp2, 1);
2221 if (nttmp2 == nt1) return -i;
2222 }
2223
2224 return(-99999); // either nt1 or nt2 are invalid nonces
2225}
2226
2227
2228//-----------------------------------------------------------------------------
2229// Recover several bits of the cypher stream. This implements (first stages of)
2230// the algorithm described in "The Dark Side of Security by Obscurity and
2231// Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2232// (article by Nicolas T. Courtois, 2009)
2233//-----------------------------------------------------------------------------
2234void ReaderMifare(bool first_try)
2235{
2236 // Mifare AUTH
2237 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2238 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2239 static uint8_t mf_nr_ar3;
2240
2241 uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE] = {0x00};
2242 uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE] = {0x00};
2243
2244 if (first_try)
2245 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2246
2247 // free eventually allocated BigBuf memory. We want all for tracing.
2248 BigBuf_free();
2249 clear_trace();
2250 set_tracing(TRUE);
2251
2252 byte_t nt_diff = 0;
2253 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2254 static byte_t par_low = 0;
2255 bool led_on = TRUE;
2256 uint8_t uid[10] = {0};
2257 uint32_t cuid;
2258
2259 uint32_t nt = 0;
2260 uint32_t previous_nt = 0;
2261 static uint32_t nt_attacked = 0;
2262 byte_t par_list[8] = {0x00};
2263 byte_t ks_list[8] = {0x00};
2264
2265 #define PRNG_SEQUENCE_LENGTH (1 << 16);
2266 static uint32_t sync_time = 0;
2267 static int32_t sync_cycles = 0;
2268 int catch_up_cycles = 0;
2269 int last_catch_up = 0;
2270 uint16_t elapsed_prng_sequences;
2271 uint16_t consecutive_resyncs = 0;
2272 int isOK = 0;
2273
2274 if (first_try) {
2275 mf_nr_ar3 = 0;
2276 sync_time = GetCountSspClk() & 0xfffffff8;
2277 sync_cycles = PRNG_SEQUENCE_LENGTH; //65536; //0x10000 // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2278 nt_attacked = 0;
2279 par[0] = 0;
2280 }
2281 else {
2282 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2283 mf_nr_ar3++;
2284 mf_nr_ar[3] = mf_nr_ar3;
2285 par[0] = par_low;
2286 }
2287
2288 LED_A_ON();
2289 LED_B_OFF();
2290 LED_C_OFF();
2291
2292
2293 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2294 #define MAX_SYNC_TRIES 32
2295 #define NUM_DEBUG_INFOS 8 // per strategy
2296 #define MAX_STRATEGY 3
2297 uint16_t unexpected_random = 0;
2298 uint16_t sync_tries = 0;
2299 int16_t debug_info_nr = -1;
2300 uint16_t strategy = 0;
2301 int32_t debug_info[MAX_STRATEGY][NUM_DEBUG_INFOS];
2302 uint32_t select_time;
2303 uint32_t halt_time;
2304
2305 for(uint16_t i = 0; TRUE; ++i) {
2306
2307 LED_C_ON();
2308 WDT_HIT();
2309
2310 // Test if the action was cancelled
2311 if(BUTTON_PRESS()) {
2312 isOK = -1;
2313 break;
2314 }
2315
2316 if (strategy == 2) {
2317 // test with additional hlt command
2318 halt_time = 0;
2319 int len = mifare_sendcmd_short(NULL, false, 0x50, 0x00, receivedAnswer, receivedAnswerPar, &halt_time);
2320 if (len && MF_DBGLEVEL >= 3) {
2321 Dbprintf("Unexpected response of %d bytes to hlt command (additional debugging).", len);
2322 }
2323 }
2324
2325 if (strategy == 3) {
2326 // test with FPGA power off/on
2327 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2328 SpinDelay(200);
2329 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2330 SpinDelay(100);
2331 }
2332
2333 if(!iso14443a_select_card(uid, NULL, &cuid, true, 0)) {
2334 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
2335 continue;
2336 }
2337 select_time = GetCountSspClk();
2338
2339 elapsed_prng_sequences = 1;
2340 if (debug_info_nr == -1) {
2341 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
2342 catch_up_cycles = 0;
2343
2344 // if we missed the sync time already, advance to the next nonce repeat
2345 while(GetCountSspClk() > sync_time) {
2346 elapsed_prng_sequences++;
2347 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
2348 }
2349
2350 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2351 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2352 } else {
2353 // collect some information on tag nonces for debugging:
2354 #define DEBUG_FIXED_SYNC_CYCLES PRNG_SEQUENCE_LENGTH
2355 if (strategy == 0) {
2356 // nonce distances at fixed time after card select:
2357 sync_time = select_time + DEBUG_FIXED_SYNC_CYCLES;
2358 } else if (strategy == 1) {
2359 // nonce distances at fixed time between authentications:
2360 sync_time = sync_time + DEBUG_FIXED_SYNC_CYCLES;
2361 } else if (strategy == 2) {
2362 // nonce distances at fixed time after halt:
2363 sync_time = halt_time + DEBUG_FIXED_SYNC_CYCLES;
2364 } else {
2365 // nonce_distances at fixed time after power on
2366 sync_time = DEBUG_FIXED_SYNC_CYCLES;
2367 }
2368 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2369 }
2370
2371 // Receive the (4 Byte) "random" nonce
2372 if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2373 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2374 continue;
2375 }
2376
2377 previous_nt = nt;
2378 nt = bytes_to_num(receivedAnswer, 4);
2379
2380 // Transmit reader nonce with fake par
2381 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2382
2383 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2384 int nt_distance = dist_nt(previous_nt, nt);
2385 if (nt_distance == 0) {
2386 nt_attacked = nt;
2387 } else {
2388 if (nt_distance == -99999) { // invalid nonce received
2389 unexpected_random++;
2390 if (unexpected_random > MAX_UNEXPECTED_RANDOM) {
2391 isOK = -3; // Card has an unpredictable PRNG. Give up
2392 break;
2393 } else {
2394 continue; // continue trying...
2395 }
2396 }
2397 if (++sync_tries > MAX_SYNC_TRIES) {
2398 if (strategy > MAX_STRATEGY || MF_DBGLEVEL < 3) {
2399 isOK = -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2400 break;
2401 } else { // continue for a while, just to collect some debug info
2402 ++debug_info_nr;
2403 debug_info[strategy][debug_info_nr] = nt_distance;
2404 if (debug_info_nr == NUM_DEBUG_INFOS) {
2405 ++strategy;
2406 debug_info_nr = 0;
2407 }
2408 continue;
2409 }
2410 }
2411 sync_cycles = (sync_cycles - nt_distance/elapsed_prng_sequences);
2412 if (sync_cycles <= 0) {
2413 sync_cycles += PRNG_SEQUENCE_LENGTH;
2414 }
2415 if (MF_DBGLEVEL >= 3) {
2416 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i, nt_distance, elapsed_prng_sequences, sync_cycles);
2417 }
2418 continue;
2419 }
2420 }
2421
2422 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2423 catch_up_cycles = -dist_nt(nt_attacked, nt);
2424 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2425 catch_up_cycles = 0;
2426 continue;
2427 }
2428 catch_up_cycles /= elapsed_prng_sequences;
2429 if (catch_up_cycles == last_catch_up) {
2430 ++consecutive_resyncs;
2431 }
2432 else {
2433 last_catch_up = catch_up_cycles;
2434 consecutive_resyncs = 0;
2435 }
2436 if (consecutive_resyncs < 3) {
2437 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2438 }
2439 else {
2440 sync_cycles = sync_cycles + catch_up_cycles;
2441 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2442 last_catch_up = 0;
2443 catch_up_cycles = 0;
2444 consecutive_resyncs = 0;
2445 }
2446 continue;
2447 }
2448
2449 consecutive_resyncs = 0;
2450
2451 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2452 if (ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2453 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2454
2455 if (nt_diff == 0)
2456 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2457
2458 led_on = !led_on;
2459 if(led_on) LED_B_ON(); else LED_B_OFF();
2460
2461 par_list[nt_diff] = SwapBits(par[0], 8);
2462 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2463
2464 // Test if the information is complete
2465 if (nt_diff == 0x07) {
2466 isOK = 1;
2467 break;
2468 }
2469
2470 nt_diff = (nt_diff + 1) & 0x07;
2471 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2472 par[0] = par_low;
2473 } else {
2474 if (nt_diff == 0 && first_try) {
2475 par[0]++;
2476 if (par[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2477 isOK = -2;
2478 break;
2479 }
2480 } else {
2481 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2482 }
2483 }
2484 }
2485
2486
2487 mf_nr_ar[3] &= 0x1F;
2488
2489 if (isOK == -4) {
2490 if (MF_DBGLEVEL >= 3) {
2491 for (uint16_t i = 0; i <= MAX_STRATEGY; ++i) {
2492 for(uint16_t j = 0; j < NUM_DEBUG_INFOS; ++j) {
2493 Dbprintf("collected debug info[%d][%d] = %d", i, j, debug_info[i][j]);
2494 }
2495 }
2496 }
2497 }
2498
2499 byte_t buf[28] = {0x00};
2500 memcpy(buf + 0, uid, 4);
2501 num_to_bytes(nt, 4, buf + 4);
2502 memcpy(buf + 8, par_list, 8);
2503 memcpy(buf + 16, ks_list, 8);
2504 memcpy(buf + 24, mf_nr_ar, 4);
2505
2506 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2507
2508 // Thats it...
2509 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2510 LEDsoff();
2511
2512 set_tracing(FALSE);
2513}
2514
2515/**
2516 *MIFARE 1K simulate.
2517 *
2518 *@param flags :
2519 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2520 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2521 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2522 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2523 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2524 */
2525void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2526{
2527 int cardSTATE = MFEMUL_NOFIELD;
2528 int _7BUID = 0;
2529 int vHf = 0; // in mV
2530 int res;
2531 uint32_t selTimer = 0;
2532 uint32_t authTimer = 0;
2533 uint16_t len = 0;
2534 uint8_t cardWRBL = 0;
2535 uint8_t cardAUTHSC = 0;
2536 uint8_t cardAUTHKEY = 0xff; // no authentication
2537// uint32_t cardRr = 0;
2538 uint32_t cuid = 0;
2539 //uint32_t rn_enc = 0;
2540 uint32_t ans = 0;
2541 uint32_t cardINTREG = 0;
2542 uint8_t cardINTBLOCK = 0;
2543 struct Crypto1State mpcs = {0, 0};
2544 struct Crypto1State *pcs;
2545 pcs = &mpcs;
2546 uint32_t numReads = 0;//Counts numer of times reader read a block
2547 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE];
2548 uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE];
2549 uint8_t response[MAX_MIFARE_FRAME_SIZE];
2550 uint8_t response_par[MAX_MIFARE_PARITY_SIZE];
2551
2552 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2553 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2554 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2555 uint8_t rSAK[] = {0x08, 0xb6, 0xdd}; // Mifare Classic
2556 //uint8_t rSAK[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
2557 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2558
2559 //uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01};
2560 uint8_t rAUTH_NT[] = {0x55, 0x41, 0x49, 0x92};
2561 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2562
2563 //Here, we collect UID1,UID2,NT,AR,NR,0,0,NT2,AR2,NR2
2564 // This can be used in a reader-only attack.
2565 // (it can also be retrieved via 'hf 14a list', but hey...
2566 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
2567 uint8_t ar_nr_collected = 0;
2568
2569 // Authenticate response - nonce
2570 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2571
2572 //-- Determine the UID
2573 // Can be set from emulator memory, incoming data
2574 // and can be 7 or 4 bytes long
2575 if (flags & FLAG_4B_UID_IN_DATA)
2576 {
2577 // 4B uid comes from data-portion of packet
2578 memcpy(rUIDBCC1,datain,4);
2579 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2580
2581 } else if (flags & FLAG_7B_UID_IN_DATA) {
2582 // 7B uid comes from data-portion of packet
2583 memcpy(&rUIDBCC1[1],datain,3);
2584 memcpy(rUIDBCC2, datain+3, 4);
2585 _7BUID = true;
2586 } else {
2587 // get UID from emul memory
2588 emlGetMemBt(receivedCmd, 7, 1);
2589 _7BUID = !(receivedCmd[0] == 0x00);
2590 if (!_7BUID) { // ---------- 4BUID
2591 emlGetMemBt(rUIDBCC1, 0, 4);
2592 } else { // ---------- 7BUID
2593 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2594 emlGetMemBt(rUIDBCC2, 3, 4);
2595 }
2596 }
2597
2598 // save uid.
2599 ar_nr_responses[0*5] = bytes_to_num(rUIDBCC1+1, 3);
2600 if ( _7BUID )
2601 ar_nr_responses[0*5+1] = bytes_to_num(rUIDBCC2, 4);
2602
2603 /*
2604 * Regardless of what method was used to set the UID, set fifth byte and modify
2605 * the ATQA for 4 or 7-byte UID
2606 */
2607 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2608 if (_7BUID) {
2609 rATQA[0] = 0x44;
2610 rUIDBCC1[0] = 0x88;
2611 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2612 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2613 }
2614
2615 if (MF_DBGLEVEL >= 1) {
2616 if (!_7BUID) {
2617 Dbprintf("4B UID: %02x%02x%02x%02x",
2618 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
2619 } else {
2620 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2621 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2622 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
2623 }
2624 }
2625
2626 // We need to listen to the high-frequency, peak-detected path.
2627 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2628
2629 // free eventually allocated BigBuf memory but keep Emulator Memory
2630 BigBuf_free_keep_EM();
2631
2632 // clear trace
2633 clear_trace();
2634 set_tracing(TRUE);
2635
2636
2637 bool finished = FALSE;
2638 while (!BUTTON_PRESS() && !finished && !usb_poll_validate_length()) {
2639 WDT_HIT();
2640
2641 // find reader field
2642 if (cardSTATE == MFEMUL_NOFIELD) {
2643 vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
2644 if (vHf > MF_MINFIELDV) {
2645 cardSTATE_TO_IDLE();
2646 LED_A_ON();
2647 }
2648 }
2649 if(cardSTATE == MFEMUL_NOFIELD) continue;
2650
2651 //Now, get data
2652 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2653 if (res == 2) { //Field is off!
2654 cardSTATE = MFEMUL_NOFIELD;
2655 LEDsoff();
2656 continue;
2657 } else if (res == 1) {
2658 break; //return value 1 means button press
2659 }
2660
2661 // REQ or WUP request in ANY state and WUP in HALTED state
2662 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2663 selTimer = GetTickCount();
2664 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2665 cardSTATE = MFEMUL_SELECT1;
2666
2667 // init crypto block
2668 LED_B_OFF();
2669 LED_C_OFF();
2670 crypto1_destroy(pcs);
2671 cardAUTHKEY = 0xff;
2672 continue;
2673 }
2674
2675 switch (cardSTATE) {
2676 case MFEMUL_NOFIELD:
2677 case MFEMUL_HALTED:
2678 case MFEMUL_IDLE:{
2679 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2680 break;
2681 }
2682 case MFEMUL_SELECT1:{
2683 // select all
2684 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2685 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2686 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2687 break;
2688 }
2689
2690 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2691 {
2692 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2693 }
2694 // select card
2695 if (len == 9 &&
2696 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2697 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
2698 cuid = bytes_to_num(rUIDBCC1, 4);
2699 if (!_7BUID) {
2700 cardSTATE = MFEMUL_WORK;
2701 LED_B_ON();
2702 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2703 break;
2704 } else {
2705 cardSTATE = MFEMUL_SELECT2;
2706 }
2707 }
2708 break;
2709 }
2710 case MFEMUL_AUTH1:{
2711 if( len != 8) {
2712 cardSTATE_TO_IDLE();
2713 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2714 break;
2715 }
2716
2717 uint32_t ar = bytes_to_num(receivedCmd, 4);
2718 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
2719
2720 //Collect AR/NR
2721 //if(ar_nr_collected < 2 && cardAUTHSC == 2){
2722 if(ar_nr_collected < 2) {
2723 if(ar_nr_responses[2] != ar) {
2724 // Avoid duplicates... probably not necessary, ar should vary.
2725 //ar_nr_responses[ar_nr_collected*5] = 0;
2726 //ar_nr_responses[ar_nr_collected*5+1] = 0;
2727 ar_nr_responses[ar_nr_collected*5+2] = nonce;
2728 ar_nr_responses[ar_nr_collected*5+3] = nr;
2729 ar_nr_responses[ar_nr_collected*5+4] = ar;
2730 ar_nr_collected++;
2731 }
2732 // Interactive mode flag, means we need to send ACK
2733 if(flags & FLAG_INTERACTIVE && ar_nr_collected == 2)
2734 finished = true;
2735 }
2736
2737 // --- crypto
2738 //crypto1_word(pcs, ar , 1);
2739 //cardRr = nr ^ crypto1_word(pcs, 0, 0);
2740
2741 //test if auth OK
2742 //if (cardRr != prng_successor(nonce, 64)){
2743
2744 //if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2745 // cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2746 // cardRr, prng_successor(nonce, 64));
2747 // Shouldn't we respond anything here?
2748 // Right now, we don't nack or anything, which causes the
2749 // reader to do a WUPA after a while. /Martin
2750 // -- which is the correct response. /piwi
2751 //cardSTATE_TO_IDLE();
2752 //LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2753 //break;
2754 //}
2755
2756 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2757
2758 num_to_bytes(ans, 4, rAUTH_AT);
2759 // --- crypto
2760 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2761 LED_C_ON();
2762 cardSTATE = MFEMUL_WORK;
2763 if (MF_DBGLEVEL >= 4) {
2764 Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2765 cardAUTHSC,
2766 cardAUTHKEY == 0 ? 'A' : 'B',
2767 GetTickCount() - authTimer
2768 );
2769 }
2770 break;
2771 }
2772 case MFEMUL_SELECT2:{
2773 if (!len) {
2774 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2775 break;
2776 }
2777 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2778 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2779 break;
2780 }
2781
2782 // select 2 card
2783 if (len == 9 &&
2784 (receivedCmd[0] == 0x95 &&
2785 receivedCmd[1] == 0x70 &&
2786 memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0) ) {
2787 EmSendCmd(rSAK, sizeof(rSAK));
2788 cuid = bytes_to_num(rUIDBCC2, 4);
2789 cardSTATE = MFEMUL_WORK;
2790 LED_B_ON();
2791 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2792 break;
2793 }
2794
2795 // i guess there is a command). go into the work state.
2796 if (len != 4) {
2797 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2798 break;
2799 }
2800 cardSTATE = MFEMUL_WORK;
2801 //goto lbWORK;
2802 //intentional fall-through to the next case-stmt
2803 }
2804
2805 case MFEMUL_WORK:{
2806 if (len == 0) {
2807 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2808 break;
2809 }
2810
2811 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2812
2813 // decrypt seqence
2814 if(encrypted_data)
2815 mf_crypto1_decrypt(pcs, receivedCmd, len);
2816
2817 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2818 authTimer = GetTickCount();
2819 cardAUTHSC = receivedCmd[1] / 4; // received block num
2820 cardAUTHKEY = receivedCmd[0] - 0x60;
2821 crypto1_destroy(pcs);//Added by martin
2822 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2823
2824 if (!encrypted_data) { // first authentication
2825 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2826
2827 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2828 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2829 } else { // nested authentication
2830 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2831 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2832 num_to_bytes(ans, 4, rAUTH_AT);
2833 }
2834
2835 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2836 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2837 cardSTATE = MFEMUL_AUTH1;
2838 break;
2839 }
2840
2841 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2842 // BUT... ACK --> NACK
2843 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2844 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2845 break;
2846 }
2847
2848 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2849 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2850 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2851 break;
2852 }
2853
2854 if(len != 4) {
2855 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2856 break;
2857 }
2858
2859 if(receivedCmd[0] == 0x30 // read block
2860 || receivedCmd[0] == 0xA0 // write block
2861 || receivedCmd[0] == 0xC0 // inc
2862 || receivedCmd[0] == 0xC1 // dec
2863 || receivedCmd[0] == 0xC2 // restore
2864 || receivedCmd[0] == 0xB0) { // transfer
2865 if (receivedCmd[1] >= 16 * 4) {
2866 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2867 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2868 break;
2869 }
2870
2871 if (receivedCmd[1] / 4 != cardAUTHSC) {
2872 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2873 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2874 break;
2875 }
2876 }
2877 // read block
2878 if (receivedCmd[0] == 0x30) {
2879 if (MF_DBGLEVEL >= 4) Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2880
2881 emlGetMem(response, receivedCmd[1], 1);
2882 AppendCrc14443a(response, 16);
2883 mf_crypto1_encrypt(pcs, response, 18, response_par);
2884 EmSendCmdPar(response, 18, response_par);
2885 numReads++;
2886 if(exitAfterNReads > 0 && numReads >= exitAfterNReads) {
2887 Dbprintf("%d reads done, exiting", numReads);
2888 finished = true;
2889 }
2890 break;
2891 }
2892 // write block
2893 if (receivedCmd[0] == 0xA0) {
2894 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2895 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2896 cardSTATE = MFEMUL_WRITEBL2;
2897 cardWRBL = receivedCmd[1];
2898 break;
2899 }
2900 // increment, decrement, restore
2901 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2902 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2903 if (emlCheckValBl(receivedCmd[1])) {
2904 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2905 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2906 break;
2907 }
2908 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2909 if (receivedCmd[0] == 0xC1)
2910 cardSTATE = MFEMUL_INTREG_INC;
2911 if (receivedCmd[0] == 0xC0)
2912 cardSTATE = MFEMUL_INTREG_DEC;
2913 if (receivedCmd[0] == 0xC2)
2914 cardSTATE = MFEMUL_INTREG_REST;
2915 cardWRBL = receivedCmd[1];
2916 break;
2917 }
2918 // transfer
2919 if (receivedCmd[0] == 0xB0) {
2920 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2921 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2922 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2923 else
2924 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2925 break;
2926 }
2927 // halt
2928 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2929 LED_B_OFF();
2930 LED_C_OFF();
2931 cardSTATE = MFEMUL_HALTED;
2932 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2933 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2934 break;
2935 }
2936 // RATS
2937 if (receivedCmd[0] == 0xe0) {//RATS
2938 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2939 break;
2940 }
2941 // command not allowed
2942 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2943 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2944 break;
2945 }
2946 case MFEMUL_WRITEBL2:{
2947 if (len == 18) {
2948 mf_crypto1_decrypt(pcs, receivedCmd, len);
2949 emlSetMem(receivedCmd, cardWRBL, 1);
2950 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2951 cardSTATE = MFEMUL_WORK;
2952 } else {
2953 cardSTATE_TO_IDLE();
2954 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2955 }
2956 break;
2957 }
2958
2959 case MFEMUL_INTREG_INC:{
2960 mf_crypto1_decrypt(pcs, receivedCmd, len);
2961 memcpy(&ans, receivedCmd, 4);
2962 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2963 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2964 cardSTATE_TO_IDLE();
2965 break;
2966 }
2967 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2968 cardINTREG = cardINTREG + ans;
2969 cardSTATE = MFEMUL_WORK;
2970 break;
2971 }
2972 case MFEMUL_INTREG_DEC:{
2973 mf_crypto1_decrypt(pcs, receivedCmd, len);
2974 memcpy(&ans, receivedCmd, 4);
2975 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2976 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2977 cardSTATE_TO_IDLE();
2978 break;
2979 }
2980 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2981 cardINTREG = cardINTREG - ans;
2982 cardSTATE = MFEMUL_WORK;
2983 break;
2984 }
2985 case MFEMUL_INTREG_REST:{
2986 mf_crypto1_decrypt(pcs, receivedCmd, len);
2987 memcpy(&ans, receivedCmd, 4);
2988 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2989 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2990 cardSTATE_TO_IDLE();
2991 break;
2992 }
2993 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2994 cardSTATE = MFEMUL_WORK;
2995 break;
2996 }
2997 }
2998 }
2999
3000 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
3001 LEDsoff();
3002
3003 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
3004 {
3005 //May just aswell send the collected ar_nr in the response aswell
3006 uint8_t len = ar_nr_collected*5*4;
3007 cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len);
3008 }
3009
3010 if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1 )
3011 {
3012 if(ar_nr_collected > 1 ) {
3013 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
3014 Dbprintf("../tools/mfkey/mfkey32 %06x%08x %08x %08x %08x %08x %08x",
3015 ar_nr_responses[0], // UID1
3016 ar_nr_responses[1], // UID2
3017 ar_nr_responses[2], // NT
3018 ar_nr_responses[3], // AR1
3019 ar_nr_responses[4], // NR1
3020 ar_nr_responses[8], // AR2
3021 ar_nr_responses[9] // NR2
3022 );
3023 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
3024 ar_nr_responses[0], // UID1
3025 ar_nr_responses[1], // UID2
3026 ar_nr_responses[2], // NT1
3027 ar_nr_responses[3], // AR1
3028 ar_nr_responses[4], // NR1
3029 ar_nr_responses[7], // NT2
3030 ar_nr_responses[8], // AR2
3031 ar_nr_responses[9] // NR2
3032 );
3033 } else {
3034 Dbprintf("Failed to obtain two AR/NR pairs!");
3035 if(ar_nr_collected > 0 ) {
3036 Dbprintf("Only got these: UID=%06x%08x, nonce=%08x, AR1=%08x, NR1=%08x",
3037 ar_nr_responses[0], // UID1
3038 ar_nr_responses[1], // UID2
3039 ar_nr_responses[2], // NT
3040 ar_nr_responses[3], // AR1
3041 ar_nr_responses[4] // NR1
3042 );
3043 }
3044 }
3045 }
3046 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen());
3047
3048 set_tracing(FALSE);
3049}
3050
3051
3052//-----------------------------------------------------------------------------
3053// MIFARE sniffer.
3054//
3055//-----------------------------------------------------------------------------
3056void RAMFUNC SniffMifare(uint8_t param) {
3057 // param:
3058 // bit 0 - trigger from first card answer
3059 // bit 1 - trigger from first reader 7-bit request
3060
3061 // C(red) A(yellow) B(green)
3062 LEDsoff();
3063 // init trace buffer
3064 clear_trace();
3065 set_tracing(TRUE);
3066
3067 // The command (reader -> tag) that we're receiving.
3068 // The length of a received command will in most cases be no more than 18 bytes.
3069 // So 32 should be enough!
3070 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00};
3071 uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE] = {0x00};
3072 // The response (tag -> reader) that we're receiving.
3073 uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE] = {0x00};
3074 uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE] = {0x00};
3075
3076 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
3077
3078 // free eventually allocated BigBuf memory
3079 BigBuf_free();
3080 // allocate the DMA buffer, used to stream samples from the FPGA
3081 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
3082 uint8_t *data = dmaBuf;
3083 uint8_t previous_data = 0;
3084 int maxDataLen = 0;
3085 int dataLen = 0;
3086 bool ReaderIsActive = FALSE;
3087 bool TagIsActive = FALSE;
3088
3089 // Set up the demodulator for tag -> reader responses.
3090 DemodInit(receivedResponse, receivedResponsePar);
3091
3092 // Set up the demodulator for the reader -> tag commands
3093 UartInit(receivedCmd, receivedCmdPar);
3094
3095 // Setup for the DMA.
3096 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
3097
3098 LED_D_OFF();
3099
3100 // init sniffer
3101 MfSniffInit();
3102
3103 // And now we loop, receiving samples.
3104 for(uint32_t sniffCounter = 0; TRUE; ) {
3105
3106 if(BUTTON_PRESS()) {
3107 DbpString("cancelled by button");
3108 break;
3109 }
3110
3111 LED_A_ON();
3112 WDT_HIT();
3113
3114 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
3115 // check if a transaction is completed (timeout after 2000ms).
3116 // if yes, stop the DMA transfer and send what we have so far to the client
3117 if (MfSniffSend(2000)) {
3118 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3119 sniffCounter = 0;
3120 data = dmaBuf;
3121 maxDataLen = 0;
3122 ReaderIsActive = FALSE;
3123 TagIsActive = FALSE;
3124 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
3125 }
3126 }
3127
3128 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
3129 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
3130
3131 if (readBufDataP <= dmaBufDataP) // we are processing the same block of data which is currently being transferred
3132 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
3133 else
3134 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
3135
3136 // test for length of buffer
3137 if(dataLen > maxDataLen) { // we are more behind than ever...
3138 maxDataLen = dataLen;
3139 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
3140 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
3141 break;
3142 }
3143 }
3144 if(dataLen < 1) continue;
3145
3146 // primary buffer was stopped ( <-- we lost data!
3147 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
3148 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
3149 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
3150 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
3151 }
3152 // secondary buffer sets as primary, secondary buffer was stopped
3153 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
3154 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
3155 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
3156 }
3157
3158 LED_A_OFF();
3159
3160 if (sniffCounter & 0x01) {
3161
3162 // no need to try decoding tag data if the reader is sending
3163 if(!TagIsActive) {
3164 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
3165 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
3166 LED_C_INV();
3167
3168 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
3169
3170 /* And ready to receive another command. */
3171 UartInit(receivedCmd, receivedCmdPar);
3172
3173 /* And also reset the demod code */
3174 DemodReset();
3175 }
3176 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
3177 }
3178
3179 // no need to try decoding tag data if the reader is sending
3180 if(!ReaderIsActive) {
3181 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
3182 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
3183 LED_C_INV();
3184
3185 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
3186
3187 // And ready to receive another response.
3188 DemodReset();
3189
3190 // And reset the Miller decoder including its (now outdated) input buffer
3191 UartInit(receivedCmd, receivedCmdPar);
3192 }
3193 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
3194 }
3195 }
3196
3197 previous_data = *data;
3198 sniffCounter++;
3199 data++;
3200
3201 if(data == dmaBuf + DMA_BUFFER_SIZE)
3202 data = dmaBuf;
3203
3204 } // main cycle
3205
3206 FpgaDisableSscDma();
3207 MfSniffEnd();
3208 LEDsoff();
3209 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
3210 set_tracing(FALSE);
3211}
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