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1 //-----------------------------------------------------------------------------
2 // Gerhard de Koning Gans - May 2008
3 // Hagen Fritsch - June 2010
4 // Gerhard de Koning Gans - May 2011
5 // Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support iClass.
12 //-----------------------------------------------------------------------------
13 // Based on ISO14443a implementation. Still in experimental phase.
14 // Contribution made during a security research at Radboud University Nijmegen
15 //
16 // Please feel free to contribute and extend iClass support!!
17 //-----------------------------------------------------------------------------
18 //
19 // FIX:
20 // ====
21 // We still have sometimes a demodulation error when snooping iClass communication.
22 // The resulting trace of a read-block-03 command may look something like this:
23 //
24 // + 22279: : 0c 03 e8 01
25 //
26 // ...with an incorrect answer...
27 //
28 // + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29 //
30 // We still left the error signalling bytes in the traces like 0xbb
31 //
32 // A correct trace should look like this:
33 //
34 // + 21112: : 0c 03 e8 01
35 // + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36 //
37 //-----------------------------------------------------------------------------
38
39 #include "proxmark3.h"
40 #include "apps.h"
41 #include "util.h"
42 #include "string.h"
43 #include "common.h"
44 #include "cmd.h"
45 // Needed for CRC in emulation mode;
46 // same construction as in ISO 14443;
47 // different initial value (CRC_ICLASS)
48 #include "iso14443crc.h"
49 #include "iso15693tools.h"
50 #include "protocols.h"
51 #include "optimized_cipher.h"
52
53 static int timeout = 4096;
54
55
56 static int SendIClassAnswer(uint8_t *resp, int respLen, int delay);
57
58 //-----------------------------------------------------------------------------
59 // The software UART that receives commands from the reader, and its state
60 // variables.
61 //-----------------------------------------------------------------------------
62 static struct {
63 enum {
64 STATE_UNSYNCD,
65 STATE_START_OF_COMMUNICATION,
66 STATE_RECEIVING
67 } state;
68 uint16_t shiftReg;
69 int bitCnt;
70 int byteCnt;
71 int byteCntMax;
72 int posCnt;
73 int nOutOfCnt;
74 int OutOfCnt;
75 int syncBit;
76 int samples;
77 int highCnt;
78 int swapper;
79 int counter;
80 int bitBuffer;
81 int dropPosition;
82 uint8_t *output;
83 } Uart;
84
85 static RAMFUNC int OutOfNDecoding(int bit)
86 {
87 //int error = 0;
88 int bitright;
89
90 if(!Uart.bitBuffer) {
91 Uart.bitBuffer = bit ^ 0xFF0;
92 return FALSE;
93 }
94 else {
95 Uart.bitBuffer <<= 4;
96 Uart.bitBuffer ^= bit;
97 }
98
99 /*if(Uart.swapper) {
100 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
101 Uart.byteCnt++;
102 Uart.swapper = 0;
103 if(Uart.byteCnt > 15) { return TRUE; }
104 }
105 else {
106 Uart.swapper = 1;
107 }*/
108
109 if(Uart.state != STATE_UNSYNCD) {
110 Uart.posCnt++;
111
112 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
113 bit = 0x00;
114 }
115 else {
116 bit = 0x01;
117 }
118 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
119 bitright = 0x00;
120 }
121 else {
122 bitright = 0x01;
123 }
124 if(bit != bitright) { bit = bitright; }
125
126
127 // So, now we only have to deal with *bit*, lets see...
128 if(Uart.posCnt == 1) {
129 // measurement first half bitperiod
130 if(!bit) {
131 // Drop in first half means that we are either seeing
132 // an SOF or an EOF.
133
134 if(Uart.nOutOfCnt == 1) {
135 // End of Communication
136 Uart.state = STATE_UNSYNCD;
137 Uart.highCnt = 0;
138 if(Uart.byteCnt == 0) {
139 // Its not straightforward to show single EOFs
140 // So just leave it and do not return TRUE
141 Uart.output[0] = 0xf0;
142 Uart.byteCnt++;
143 }
144 else {
145 return TRUE;
146 }
147 }
148 else if(Uart.state != STATE_START_OF_COMMUNICATION) {
149 // When not part of SOF or EOF, it is an error
150 Uart.state = STATE_UNSYNCD;
151 Uart.highCnt = 0;
152 //error = 4;
153 }
154 }
155 }
156 else {
157 // measurement second half bitperiod
158 // Count the bitslot we are in... (ISO 15693)
159 Uart.nOutOfCnt++;
160
161 if(!bit) {
162 if(Uart.dropPosition) {
163 if(Uart.state == STATE_START_OF_COMMUNICATION) {
164 //error = 1;
165 }
166 else {
167 //error = 7;
168 }
169 // It is an error if we already have seen a drop in current frame
170 Uart.state = STATE_UNSYNCD;
171 Uart.highCnt = 0;
172 }
173 else {
174 Uart.dropPosition = Uart.nOutOfCnt;
175 }
176 }
177
178 Uart.posCnt = 0;
179
180
181 if(Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
182 Uart.nOutOfCnt = 0;
183
184 if(Uart.state == STATE_START_OF_COMMUNICATION) {
185 if(Uart.dropPosition == 4) {
186 Uart.state = STATE_RECEIVING;
187 Uart.OutOfCnt = 256;
188 }
189 else if(Uart.dropPosition == 3) {
190 Uart.state = STATE_RECEIVING;
191 Uart.OutOfCnt = 4;
192 //Uart.output[Uart.byteCnt] = 0xdd;
193 //Uart.byteCnt++;
194 }
195 else {
196 Uart.state = STATE_UNSYNCD;
197 Uart.highCnt = 0;
198 }
199 Uart.dropPosition = 0;
200 }
201 else {
202 // RECEIVING DATA
203 // 1 out of 4
204 if(!Uart.dropPosition) {
205 Uart.state = STATE_UNSYNCD;
206 Uart.highCnt = 0;
207 //error = 9;
208 }
209 else {
210 Uart.shiftReg >>= 2;
211
212 // Swap bit order
213 Uart.dropPosition--;
214 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
215 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
216
217 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
218 Uart.bitCnt += 2;
219 Uart.dropPosition = 0;
220
221 if(Uart.bitCnt == 8) {
222 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
223 Uart.byteCnt++;
224 Uart.bitCnt = 0;
225 Uart.shiftReg = 0;
226 }
227 }
228 }
229 }
230 else if(Uart.nOutOfCnt == Uart.OutOfCnt) {
231 // RECEIVING DATA
232 // 1 out of 256
233 if(!Uart.dropPosition) {
234 Uart.state = STATE_UNSYNCD;
235 Uart.highCnt = 0;
236 //error = 3;
237 }
238 else {
239 Uart.dropPosition--;
240 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
241 Uart.byteCnt++;
242 Uart.bitCnt = 0;
243 Uart.shiftReg = 0;
244 Uart.nOutOfCnt = 0;
245 Uart.dropPosition = 0;
246 }
247 }
248
249 /*if(error) {
250 Uart.output[Uart.byteCnt] = 0xAA;
251 Uart.byteCnt++;
252 Uart.output[Uart.byteCnt] = error & 0xFF;
253 Uart.byteCnt++;
254 Uart.output[Uart.byteCnt] = 0xAA;
255 Uart.byteCnt++;
256 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
257 Uart.byteCnt++;
258 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
259 Uart.byteCnt++;
260 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
261 Uart.byteCnt++;
262 Uart.output[Uart.byteCnt] = 0xAA;
263 Uart.byteCnt++;
264 return TRUE;
265 }*/
266 }
267
268 }
269 else {
270 bit = Uart.bitBuffer & 0xf0;
271 bit >>= 4;
272 bit ^= 0x0F; // drops become 1s ;-)
273 if(bit) {
274 // should have been high or at least (4 * 128) / fc
275 // according to ISO this should be at least (9 * 128 + 20) / fc
276 if(Uart.highCnt == 8) {
277 // we went low, so this could be start of communication
278 // it turns out to be safer to choose a less significant
279 // syncbit... so we check whether the neighbour also represents the drop
280 Uart.posCnt = 1; // apparently we are busy with our first half bit period
281 Uart.syncBit = bit & 8;
282 Uart.samples = 3;
283 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
284 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
285 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
286 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
287 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
288 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
289 Uart.syncBit = 8;
290
291 // the first half bit period is expected in next sample
292 Uart.posCnt = 0;
293 Uart.samples = 3;
294 }
295 }
296 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
297
298 Uart.syncBit <<= 4;
299 Uart.state = STATE_START_OF_COMMUNICATION;
300 Uart.bitCnt = 0;
301 Uart.byteCnt = 0;
302 Uart.nOutOfCnt = 0;
303 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
304 Uart.dropPosition = 0;
305 Uart.shiftReg = 0;
306 //error = 0;
307 }
308 else {
309 Uart.highCnt = 0;
310 }
311 }
312 else {
313 if(Uart.highCnt < 8) {
314 Uart.highCnt++;
315 }
316 }
317 }
318
319 return FALSE;
320 }
321
322 //=============================================================================
323 // Manchester
324 //=============================================================================
325
326 static struct {
327 enum {
328 DEMOD_UNSYNCD,
329 DEMOD_START_OF_COMMUNICATION,
330 DEMOD_START_OF_COMMUNICATION2,
331 DEMOD_START_OF_COMMUNICATION3,
332 DEMOD_SOF_COMPLETE,
333 DEMOD_MANCHESTER_D,
334 DEMOD_MANCHESTER_E,
335 DEMOD_END_OF_COMMUNICATION,
336 DEMOD_END_OF_COMMUNICATION2,
337 DEMOD_MANCHESTER_F,
338 DEMOD_ERROR_WAIT
339 } state;
340 int bitCount;
341 int posCount;
342 int syncBit;
343 uint16_t shiftReg;
344 int buffer;
345 int buffer2;
346 int buffer3;
347 int buff;
348 int samples;
349 int len;
350 enum {
351 SUB_NONE,
352 SUB_FIRST_HALF,
353 SUB_SECOND_HALF,
354 SUB_BOTH
355 } sub;
356 uint8_t *output;
357 } Demod;
358
359 static RAMFUNC int ManchesterDecoding(int v)
360 {
361 int bit;
362 int modulation;
363 int error = 0;
364
365 bit = Demod.buffer;
366 Demod.buffer = Demod.buffer2;
367 Demod.buffer2 = Demod.buffer3;
368 Demod.buffer3 = v;
369
370 if(Demod.buff < 3) {
371 Demod.buff++;
372 return FALSE;
373 }
374
375 if(Demod.state==DEMOD_UNSYNCD) {
376 Demod.output[Demod.len] = 0xfa;
377 Demod.syncBit = 0;
378 //Demod.samples = 0;
379 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
380
381 if(bit & 0x08) {
382 Demod.syncBit = 0x08;
383 }
384
385 if(bit & 0x04) {
386 if(Demod.syncBit) {
387 bit <<= 4;
388 }
389 Demod.syncBit = 0x04;
390 }
391
392 if(bit & 0x02) {
393 if(Demod.syncBit) {
394 bit <<= 2;
395 }
396 Demod.syncBit = 0x02;
397 }
398
399 if(bit & 0x01 && Demod.syncBit) {
400 Demod.syncBit = 0x01;
401 }
402
403 if(Demod.syncBit) {
404 Demod.len = 0;
405 Demod.state = DEMOD_START_OF_COMMUNICATION;
406 Demod.sub = SUB_FIRST_HALF;
407 Demod.bitCount = 0;
408 Demod.shiftReg = 0;
409 Demod.samples = 0;
410 if(Demod.posCount) {
411 //if(trigger) LED_A_OFF(); // Not useful in this case...
412 switch(Demod.syncBit) {
413 case 0x08: Demod.samples = 3; break;
414 case 0x04: Demod.samples = 2; break;
415 case 0x02: Demod.samples = 1; break;
416 case 0x01: Demod.samples = 0; break;
417 }
418 // SOF must be long burst... otherwise stay unsynced!!!
419 if(!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
420 Demod.state = DEMOD_UNSYNCD;
421 }
422 }
423 else {
424 // SOF must be long burst... otherwise stay unsynced!!!
425 if(!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
426 Demod.state = DEMOD_UNSYNCD;
427 error = 0x88;
428 return FALSE;
429 }
430
431 // TODO: use this error value to print? Ask Holiman.
432 // 2016-01-08 iceman
433 }
434 error = 0;
435 }
436 }
437 else {
438 modulation = bit & Demod.syncBit;
439 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
440
441 Demod.samples += 4;
442
443 if(Demod.posCount==0) {
444 Demod.posCount = 1;
445 if(modulation) {
446 Demod.sub = SUB_FIRST_HALF;
447 }
448 else {
449 Demod.sub = SUB_NONE;
450 }
451 }
452 else {
453 Demod.posCount = 0;
454 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
455 if(Demod.state!=DEMOD_ERROR_WAIT) {
456 Demod.state = DEMOD_ERROR_WAIT;
457 Demod.output[Demod.len] = 0xaa;
458 error = 0x01;
459 }
460 }*/
461 //else if(modulation) {
462 if(modulation) {
463 if(Demod.sub == SUB_FIRST_HALF) {
464 Demod.sub = SUB_BOTH;
465 }
466 else {
467 Demod.sub = SUB_SECOND_HALF;
468 }
469 }
470 else if(Demod.sub == SUB_NONE) {
471 if(Demod.state == DEMOD_SOF_COMPLETE) {
472 Demod.output[Demod.len] = 0x0f;
473 Demod.len++;
474 Demod.state = DEMOD_UNSYNCD;
475 // error = 0x0f;
476 return TRUE;
477 }
478 else {
479 Demod.state = DEMOD_ERROR_WAIT;
480 error = 0x33;
481 }
482 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
483 Demod.state = DEMOD_ERROR_WAIT;
484 Demod.output[Demod.len] = 0xaa;
485 error = 0x01;
486 }*/
487 }
488
489 switch(Demod.state) {
490 case DEMOD_START_OF_COMMUNICATION:
491 if(Demod.sub == SUB_BOTH) {
492 //Demod.state = DEMOD_MANCHESTER_D;
493 Demod.state = DEMOD_START_OF_COMMUNICATION2;
494 Demod.posCount = 1;
495 Demod.sub = SUB_NONE;
496 }
497 else {
498 Demod.output[Demod.len] = 0xab;
499 Demod.state = DEMOD_ERROR_WAIT;
500 error = 0xd2;
501 }
502 break;
503 case DEMOD_START_OF_COMMUNICATION2:
504 if(Demod.sub == SUB_SECOND_HALF) {
505 Demod.state = DEMOD_START_OF_COMMUNICATION3;
506 }
507 else {
508 Demod.output[Demod.len] = 0xab;
509 Demod.state = DEMOD_ERROR_WAIT;
510 error = 0xd3;
511 }
512 break;
513 case DEMOD_START_OF_COMMUNICATION3:
514 if(Demod.sub == SUB_SECOND_HALF) {
515 // Demod.state = DEMOD_MANCHESTER_D;
516 Demod.state = DEMOD_SOF_COMPLETE;
517 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
518 //Demod.len++;
519 }
520 else {
521 Demod.output[Demod.len] = 0xab;
522 Demod.state = DEMOD_ERROR_WAIT;
523 error = 0xd4;
524 }
525 break;
526 case DEMOD_SOF_COMPLETE:
527 case DEMOD_MANCHESTER_D:
528 case DEMOD_MANCHESTER_E:
529 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
530 // 00001111 = 1 (0 in 14443)
531 if(Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
532 Demod.bitCount++;
533 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
534 Demod.state = DEMOD_MANCHESTER_D;
535 }
536 else if(Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
537 Demod.bitCount++;
538 Demod.shiftReg >>= 1;
539 Demod.state = DEMOD_MANCHESTER_E;
540 }
541 else if(Demod.sub == SUB_BOTH) {
542 Demod.state = DEMOD_MANCHESTER_F;
543 }
544 else {
545 Demod.state = DEMOD_ERROR_WAIT;
546 error = 0x55;
547 }
548 break;
549
550 case DEMOD_MANCHESTER_F:
551 // Tag response does not need to be a complete byte!
552 if(Demod.len > 0 || Demod.bitCount > 0) {
553 if(Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
554 Demod.shiftReg >>= (9 - Demod.bitCount); // right align data
555 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
556 Demod.len++;
557 }
558
559 Demod.state = DEMOD_UNSYNCD;
560 return TRUE;
561 }
562 else {
563 Demod.output[Demod.len] = 0xad;
564 Demod.state = DEMOD_ERROR_WAIT;
565 error = 0x03;
566 }
567 break;
568
569 case DEMOD_ERROR_WAIT:
570 Demod.state = DEMOD_UNSYNCD;
571 break;
572
573 default:
574 Demod.output[Demod.len] = 0xdd;
575 Demod.state = DEMOD_UNSYNCD;
576 break;
577 }
578
579 /*if(Demod.bitCount>=9) {
580 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
581 Demod.len++;
582
583 Demod.parityBits <<= 1;
584 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
585
586 Demod.bitCount = 0;
587 Demod.shiftReg = 0;
588 }*/
589 if(Demod.bitCount>=8) {
590 Demod.shiftReg >>= 1;
591 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
592 Demod.len++;
593 Demod.bitCount = 0;
594 Demod.shiftReg = 0;
595 }
596
597 if(error) {
598 Demod.output[Demod.len] = 0xBB;
599 Demod.len++;
600 Demod.output[Demod.len] = error & 0xFF;
601 Demod.len++;
602 Demod.output[Demod.len] = 0xBB;
603 Demod.len++;
604 Demod.output[Demod.len] = bit & 0xFF;
605 Demod.len++;
606 Demod.output[Demod.len] = Demod.buffer & 0xFF;
607 Demod.len++;
608 // Look harder ;-)
609 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
610 Demod.len++;
611 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
612 Demod.len++;
613 Demod.output[Demod.len] = 0xBB;
614 Demod.len++;
615 return TRUE;
616 }
617
618 }
619
620 } // end (state != UNSYNCED)
621
622 return FALSE;
623 }
624
625 //=============================================================================
626 // Finally, a `sniffer' for iClass communication
627 // Both sides of communication!
628 //=============================================================================
629
630 //-----------------------------------------------------------------------------
631 // Record the sequence of commands sent by the reader to the tag, with
632 // triggering so that we start recording at the point that the tag is moved
633 // near the reader.
634 //-----------------------------------------------------------------------------
635 void RAMFUNC SnoopIClass(void)
636 {
637 // We won't start recording the frames that we acquire until we trigger;
638 // a good trigger condition to get started is probably when we see a
639 // response from the tag.
640 //int triggered = FALSE; // FALSE to wait first for card
641
642 // The command (reader -> tag) that we're receiving.
643 // The length of a received command will in most cases be no more than 18 bytes.
644 // So 32 should be enough!
645 #define ICLASS_BUFFER_SIZE 32
646 uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE];
647 // The response (tag -> reader) that we're receiving.
648 uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE];
649
650 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
651
652 // free all BigBuf memory
653 BigBuf_free();
654 // The DMA buffer, used to stream samples from the FPGA
655 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
656
657 clear_trace();
658 set_tracing(TRUE);
659
660 iso14a_set_trigger(FALSE);
661
662 int lastRxCounter;
663 uint8_t *upTo;
664 int smpl;
665 int maxBehindBy = 0;
666
667 // Count of samples received so far, so that we can include timing
668 // information in the trace buffer.
669 int samples = 0;
670 rsamples = 0;
671
672 // Set up the demodulator for tag -> reader responses.
673 Demod.output = tagToReaderResponse;
674 Demod.len = 0;
675 Demod.state = DEMOD_UNSYNCD;
676
677 // Setup for the DMA.
678 FpgaSetupSsc();
679 upTo = dmaBuf;
680 lastRxCounter = DMA_BUFFER_SIZE;
681 // Setup and start DMA.
682 if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE) ){
683 if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
684 return;
685 }
686
687 // And the reader -> tag commands
688 memset(&Uart, 0, sizeof(Uart));
689 Uart.output = readerToTagCmd;
690 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
691 Uart.state = STATE_UNSYNCD;
692
693 // And put the FPGA in the appropriate mode
694 // Signal field is off with the appropriate LED
695 LED_D_OFF();
696 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
697 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
698
699 uint32_t time_0 = GetCountSspClk();
700 uint32_t time_start = 0;
701 uint32_t time_stop = 0;
702
703 int div = 0;
704 //int div2 = 0;
705 int decbyte = 0;
706 int decbyter = 0;
707
708 // And now we loop, receiving samples.
709 for(;;) {
710 LED_A_ON();
711 WDT_HIT();
712 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (DMA_BUFFER_SIZE-1);
713
714 if ( behindBy > maxBehindBy) {
715 maxBehindBy = behindBy;
716 if ( behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
717 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
718 goto done;
719 }
720 }
721 if( behindBy < 1) continue;
722
723 LED_A_OFF();
724 smpl = upTo[0];
725 upTo++;
726 lastRxCounter -= 1;
727 if (upTo - dmaBuf > DMA_BUFFER_SIZE) {
728 upTo -= DMA_BUFFER_SIZE;
729 lastRxCounter += DMA_BUFFER_SIZE;
730 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
731 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
732 }
733
734 //samples += 4;
735 samples += 1;
736
737 if(smpl & 0xF)
738 decbyte ^= (1 << (3 - div));
739
740
741 // FOR READER SIDE COMMUMICATION...
742
743 decbyter <<= 2;
744 decbyter ^= (smpl & 0x30);
745
746 ++div;
747
748 if (( div + 1) % 2 == 0) {
749 smpl = decbyter;
750 if ( OutOfNDecoding((smpl & 0xF0) >> 4)) {
751 rsamples = samples - Uart.samples;
752 time_stop = (GetCountSspClk()-time_0) << 4;
753 LED_C_ON();
754
755 //if(!LogTrace(Uart.output,Uart.byteCnt, rsamples, Uart.parityBits,TRUE)) break;
756 //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
757 if(tracing) {
758 uint8_t parity[MAX_PARITY_SIZE];
759 GetParity(Uart.output, Uart.byteCnt, parity);
760 LogTrace(Uart.output,Uart.byteCnt, time_start, time_stop, parity, TRUE);
761 }
762
763 /* And ready to receive another command. */
764 Uart.state = STATE_UNSYNCD;
765 /* And also reset the demod code, which might have been */
766 /* false-triggered by the commands from the reader. */
767 Demod.state = DEMOD_UNSYNCD;
768 LED_B_OFF();
769 Uart.byteCnt = 0;
770 } else {
771 time_start = (GetCountSspClk()-time_0) << 4;
772 }
773 decbyter = 0;
774 }
775
776 if(div > 3) {
777 smpl = decbyte;
778 if(ManchesterDecoding(smpl & 0x0F)) {
779 time_stop = (GetCountSspClk()-time_0) << 4;
780
781 rsamples = samples - Demod.samples;
782 LED_B_ON();
783
784 if(tracing) {
785 uint8_t parity[MAX_PARITY_SIZE];
786 GetParity(Demod.output, Demod.len, parity);
787 LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, FALSE);
788 }
789
790 // And ready to receive another response.
791 memset(&Demod, 0, sizeof(Demod));
792 Demod.output = tagToReaderResponse;
793 Demod.state = DEMOD_UNSYNCD;
794 LED_C_OFF();
795 } else {
796 time_start = (GetCountSspClk()-time_0) << 4;
797 }
798
799 div = 0;
800 decbyte = 0x00;
801 }
802
803 if (BUTTON_PRESS()) {
804 DbpString("cancelled_a");
805 goto done;
806 }
807 }
808
809 DbpString("COMMAND FINISHED");
810
811 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
812 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
813
814 done:
815 FpgaDisableSscDma();
816 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
817 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
818 LEDsoff();
819 set_tracing(FALSE);
820 }
821
822 void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
823 int i;
824 for(i = 0; i < 8; i++)
825 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
826 }
827
828 //-----------------------------------------------------------------------------
829 // Wait for commands from reader
830 // Stop when button is pressed
831 // Or return TRUE when command is captured
832 //-----------------------------------------------------------------------------
833 static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen)
834 {
835 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
836 // only, since we are receiving, not transmitting).
837 // Signal field is off with the appropriate LED
838 LED_D_OFF();
839 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
840
841 // Now run a `software UART' on the stream of incoming samples.
842 Uart.output = received;
843 Uart.byteCntMax = maxLen;
844 Uart.state = STATE_UNSYNCD;
845
846 for(;;) {
847 WDT_HIT();
848
849 if(BUTTON_PRESS()) return FALSE;
850
851 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
852 AT91C_BASE_SSC->SSC_THR = 0x00;
853 }
854 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
855 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
856
857 if(OutOfNDecoding(b & 0x0f)) {
858 *len = Uart.byteCnt;
859 return TRUE;
860 }
861 }
862 }
863 }
864
865 static uint8_t encode4Bits(const uint8_t b)
866 {
867 uint8_t c = b & 0xF;
868 // OTA, the least significant bits first
869 // The columns are
870 // 1 - Bit value to send
871 // 2 - Reversed (big-endian)
872 // 3 - Encoded
873 // 4 - Hex values
874
875 switch(c){
876 // 1 2 3 4
877 case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
878 case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
879 case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
880 case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
881 case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
882 case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
883 case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
884 case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
885 case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
886 case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
887 case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
888 case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
889 case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
890 case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
891 case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
892 default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
893
894 }
895 }
896
897 //-----------------------------------------------------------------------------
898 // Prepare tag messages
899 //-----------------------------------------------------------------------------
900 static void CodeIClassTagAnswer(const uint8_t *cmd, int len)
901 {
902
903 /*
904 * SOF comprises 3 parts;
905 * * An unmodulated time of 56.64 us
906 * * 24 pulses of 423.75 KHz (fc/32)
907 * * A logic 1, which starts with an unmodulated time of 18.88us
908 * followed by 8 pulses of 423.75kHz (fc/32)
909 *
910 *
911 * EOF comprises 3 parts:
912 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
913 * time of 18.88us.
914 * - 24 pulses of fc/32
915 * - An unmodulated time of 56.64 us
916 *
917 *
918 * A logic 0 starts with 8 pulses of fc/32
919 * followed by an unmodulated time of 256/fc (~18,88us).
920 *
921 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
922 * 8 pulses of fc/32 (also 18.88us)
923 *
924 * The mode FPGA_HF_SIMULATOR_MODULATE_424K_8BIT which we use to simulate tag,
925 * works like this.
926 * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us).
927 * - A 0-bit input to the FPGA becomes an unmodulated time of 18.88us
928 *
929 * In this mode the SOF can be written as 00011101 = 0x1D
930 * The EOF can be written as 10111000 = 0xb8
931 * A logic 1 is 01
932 * A logic 0 is 10
933 *
934 * */
935
936 int i;
937
938 ToSendReset();
939
940 // Send SOF
941 ToSend[++ToSendMax] = 0x1D;
942
943 for(i = 0; i < len; i++) {
944 uint8_t b = cmd[i];
945 ToSend[++ToSendMax] = encode4Bits(b & 0xF); //Least significant half
946 ToSend[++ToSendMax] = encode4Bits((b >>4) & 0xF);//Most significant half
947 }
948
949 // Send EOF
950 ToSend[++ToSendMax] = 0xB8;
951 //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end
952 // Convert from last byte pos to length
953 ToSendMax++;
954 }
955
956 // Only SOF
957 static void CodeIClassTagSOF()
958 {
959 //So far a dummy implementation, not used
960 //int lastProxToAirDuration =0;
961
962 ToSendReset();
963 // Send SOF
964 ToSend[++ToSendMax] = 0x1D;
965 // lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning
966
967 // Convert from last byte pos to length
968 ToSendMax++;
969 }
970 #define MODE_SIM_CSN 0
971 #define MODE_EXIT_AFTER_MAC 1
972 #define MODE_FULLSIM 2
973
974 int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf);
975 /**
976 * @brief SimulateIClass simulates an iClass card.
977 * @param arg0 type of simulation
978 * - 0 uses the first 8 bytes in usb data as CSN
979 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
980 * in the usb data. This mode collects MAC from the reader, in order to do an offline
981 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
982 * - Other : Uses the default CSN (031fec8af7ff12e0)
983 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
984 * @param arg2
985 * @param datain
986 */
987 void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain)
988 {
989 uint32_t simType = arg0;
990 uint32_t numberOfCSNS = arg1;
991 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
992
993 // Enable and clear the trace
994 clear_trace();
995 set_tracing(TRUE);
996
997 //Use the emulator memory for SIM
998 uint8_t *emulator = BigBuf_get_EM_addr();
999
1000 if(simType == 0) {
1001 // Use the CSN from commandline
1002 memcpy(emulator, datain, 8);
1003 doIClassSimulation(MODE_SIM_CSN,NULL);
1004 }else if(simType == 1)
1005 {
1006 //Default CSN
1007 uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1008 // Use the CSN from commandline
1009 memcpy(emulator, csn_crc, 8);
1010 doIClassSimulation(MODE_SIM_CSN,NULL);
1011 }
1012 else if(simType == 2)
1013 {
1014
1015 uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 };
1016 Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS);
1017 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1018 // in order to collect MAC's from the reader. This can later be used in an offlne-attack
1019 // in order to obtain the keys, as in the "dismantling iclass"-paper.
1020 int i = 0;
1021 for( ; i < numberOfCSNS && i*8+8 < USB_CMD_DATA_SIZE; i++)
1022 {
1023 // The usb data is 512 bytes, fitting 65 8-byte CSNs in there.
1024
1025 memcpy(emulator, datain+(i*8), 8);
1026 if(doIClassSimulation(MODE_EXIT_AFTER_MAC,mac_responses+i*8))
1027 {
1028 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
1029 return; // Button pressed
1030 }
1031 }
1032 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
1033
1034 }else if(simType == 3){
1035 //This is 'full sim' mode, where we use the emulator storage for data.
1036 doIClassSimulation(MODE_FULLSIM, NULL);
1037 }
1038 else{
1039 // We may want a mode here where we hardcode the csns to use (from proxclone).
1040 // That will speed things up a little, but not required just yet.
1041 Dbprintf("The mode is not implemented, reserved for future use");
1042 }
1043 Dbprintf("Done...");
1044 set_tracing(FALSE);
1045 }
1046 void AppendCrc(uint8_t* data, int len)
1047 {
1048 ComputeCrc14443(CRC_ICLASS,data,len,data+len,data+len+1);
1049 }
1050
1051 /**
1052 * @brief Does the actual simulation
1053 * @param csn - csn to use
1054 * @param breakAfterMacReceived if true, returns after reader MAC has been received.
1055 */
1056 int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
1057 {
1058 // free eventually allocated BigBuf memory
1059 BigBuf_free_keep_EM();
1060
1061 State cipher_state;
1062 // State cipher_state_reserve;
1063 uint8_t *csn = BigBuf_get_EM_addr();
1064 uint8_t *emulator = csn;
1065 uint8_t sof_data[] = { 0x0F} ;
1066 // CSN followed by two CRC bytes
1067 uint8_t anticoll_data[10] = { 0 };
1068 uint8_t csn_data[10] = { 0 };
1069 memcpy(csn_data,csn,sizeof(csn_data));
1070 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x",csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1071
1072 // Construct anticollision-CSN
1073 rotateCSN(csn_data,anticoll_data);
1074
1075 // Compute CRC on both CSNs
1076 ComputeCrc14443(CRC_ICLASS, anticoll_data, 8, &anticoll_data[8], &anticoll_data[9]);
1077 ComputeCrc14443(CRC_ICLASS, csn_data, 8, &csn_data[8], &csn_data[9]);
1078
1079 uint8_t diversified_key[8] = { 0 };
1080 // e-Purse
1081 uint8_t card_challenge_data[8] = { 0x00 };
1082 if(simulationMode == MODE_FULLSIM)
1083 {
1084 //The diversified key should be stored on block 3
1085 //Get the diversified key from emulator memory
1086 memcpy(diversified_key, emulator+(8*3),8);
1087
1088 //Card challenge, a.k.a e-purse is on block 2
1089 memcpy(card_challenge_data,emulator + (8 * 2) , 8);
1090 //Precalculate the cipher state, feeding it the CC
1091 cipher_state = opt_doTagMAC_1(card_challenge_data,diversified_key);
1092
1093 }
1094
1095 int exitLoop = 0;
1096 // Reader 0a
1097 // Tag 0f
1098 // Reader 0c
1099 // Tag anticoll. CSN
1100 // Reader 81 anticoll. CSN
1101 // Tag CSN
1102
1103 uint8_t *modulated_response;
1104 int modulated_response_size = 0;
1105 uint8_t* trace_data = NULL;
1106 int trace_data_size = 0;
1107
1108
1109 // Respond SOF -- takes 1 bytes
1110 uint8_t *resp_sof = BigBuf_malloc(2);
1111 int resp_sof_Len;
1112
1113 // Anticollision CSN (rotated CSN)
1114 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
1115 uint8_t *resp_anticoll = BigBuf_malloc(28);
1116 int resp_anticoll_len;
1117
1118 // CSN
1119 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
1120 uint8_t *resp_csn = BigBuf_malloc(30);
1121 int resp_csn_len;
1122
1123 // e-Purse
1124 // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
1125 uint8_t *resp_cc = BigBuf_malloc(20);
1126 int resp_cc_len;
1127
1128 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1129 int len;
1130
1131 // Prepare card messages
1132 ToSendMax = 0;
1133
1134 // First card answer: SOF
1135 CodeIClassTagSOF();
1136 memcpy(resp_sof, ToSend, ToSendMax); resp_sof_Len = ToSendMax;
1137
1138 // Anticollision CSN
1139 CodeIClassTagAnswer(anticoll_data, sizeof(anticoll_data));
1140 memcpy(resp_anticoll, ToSend, ToSendMax); resp_anticoll_len = ToSendMax;
1141
1142 // CSN
1143 CodeIClassTagAnswer(csn_data, sizeof(csn_data));
1144 memcpy(resp_csn, ToSend, ToSendMax); resp_csn_len = ToSendMax;
1145
1146 // e-Purse
1147 CodeIClassTagAnswer(card_challenge_data, sizeof(card_challenge_data));
1148 memcpy(resp_cc, ToSend, ToSendMax); resp_cc_len = ToSendMax;
1149
1150 //This is used for responding to READ-block commands or other data which is dynamically generated
1151 //First the 'trace'-data, not encoded for FPGA
1152 uint8_t *data_generic_trace = BigBuf_malloc(8 + 2);//8 bytes data + 2byte CRC is max tag answer
1153 //Then storage for the modulated data
1154 //Each bit is doubled when modulated for FPGA, and we also have SOF and EOF (2 bytes)
1155 uint8_t *data_response = BigBuf_malloc( (8+2) * 2 + 2);
1156
1157 // Start from off (no field generated)
1158 //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1159 //SpinDelay(200);
1160 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1161 SpinDelay(100);
1162 StartCountSspClk();
1163 // We need to listen to the high-frequency, peak-detected path.
1164 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1165 FpgaSetupSsc();
1166
1167 // To control where we are in the protocol
1168 int cmdsRecvd = 0;
1169 uint32_t time_0 = GetCountSspClk();
1170 uint32_t t2r_time =0;
1171 uint32_t r2t_time =0;
1172
1173 LED_A_ON();
1174 bool buttonPressed = false;
1175 uint8_t response_delay = 1;
1176 while(!exitLoop) {
1177 response_delay = 1;
1178 LED_B_OFF();
1179 //Signal tracer
1180 // Can be used to get a trigger for an oscilloscope..
1181 LED_C_OFF();
1182
1183 if(!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
1184 buttonPressed = true;
1185 break;
1186 }
1187 r2t_time = GetCountSspClk();
1188 //Signal tracer
1189 LED_C_ON();
1190
1191 // Okay, look at the command now.
1192 if(receivedCmd[0] == ICLASS_CMD_ACTALL ) {
1193 // Reader in anticollission phase
1194 modulated_response = resp_sof; modulated_response_size = resp_sof_Len; //order = 1;
1195 trace_data = sof_data;
1196 trace_data_size = sizeof(sof_data);
1197 } else if(receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) {
1198 // Reader asks for anticollission CSN
1199 modulated_response = resp_anticoll; modulated_response_size = resp_anticoll_len; //order = 2;
1200 trace_data = anticoll_data;
1201 trace_data_size = sizeof(anticoll_data);
1202 //DbpString("Reader requests anticollission CSN:");
1203 } else if(receivedCmd[0] == ICLASS_CMD_SELECT) {
1204 // Reader selects anticollission CSN.
1205 // Tag sends the corresponding real CSN
1206 modulated_response = resp_csn; modulated_response_size = resp_csn_len; //order = 3;
1207 trace_data = csn_data;
1208 trace_data_size = sizeof(csn_data);
1209 //DbpString("Reader selects anticollission CSN:");
1210 } else if(receivedCmd[0] == ICLASS_CMD_READCHECK_KD) {
1211 // Read e-purse (88 02)
1212 modulated_response = resp_cc; modulated_response_size = resp_cc_len; //order = 4;
1213 trace_data = card_challenge_data;
1214 trace_data_size = sizeof(card_challenge_data);
1215 LED_B_ON();
1216 } else if(receivedCmd[0] == ICLASS_CMD_CHECK) {
1217 // Reader random and reader MAC!!!
1218 if(simulationMode == MODE_FULLSIM)
1219 {
1220 //NR, from reader, is in receivedCmd +1
1221 opt_doTagMAC_2(cipher_state,receivedCmd+1,data_generic_trace,diversified_key);
1222
1223 trace_data = data_generic_trace;
1224 trace_data_size = 4;
1225 CodeIClassTagAnswer(trace_data , trace_data_size);
1226 memcpy(data_response, ToSend, ToSendMax);
1227 modulated_response = data_response;
1228 modulated_response_size = ToSendMax;
1229 response_delay = 0;//We need to hurry here...
1230 //exitLoop = true;
1231 }else
1232 { //Not fullsim, we don't respond
1233 // We do not know what to answer, so lets keep quiet
1234 modulated_response = resp_sof; modulated_response_size = 0;
1235 trace_data = NULL;
1236 trace_data_size = 0;
1237 if (simulationMode == MODE_EXIT_AFTER_MAC){
1238 // dbprintf:ing ...
1239 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x"
1240 ,csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1241 Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len,
1242 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1243 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1244 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1245 if (reader_mac_buf != NULL)
1246 {
1247 memcpy(reader_mac_buf,receivedCmd+1,8);
1248 }
1249 exitLoop = true;
1250 }
1251 }
1252
1253 } else if(receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
1254 // Reader ends the session
1255 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
1256 trace_data = NULL;
1257 trace_data_size = 0;
1258 } else if(simulationMode == MODE_FULLSIM && receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4){
1259 //Read block
1260 uint16_t blk = receivedCmd[1];
1261 //Take the data...
1262 memcpy(data_generic_trace, emulator+(blk << 3),8);
1263 //Add crc
1264 AppendCrc(data_generic_trace, 8);
1265 trace_data = data_generic_trace;
1266 trace_data_size = 10;
1267 CodeIClassTagAnswer(trace_data , trace_data_size);
1268 memcpy(data_response, ToSend, ToSendMax);
1269 modulated_response = data_response;
1270 modulated_response_size = ToSendMax;
1271 }else if(receivedCmd[0] == ICLASS_CMD_UPDATE && simulationMode == MODE_FULLSIM)
1272 {//Probably the reader wants to update the nonce. Let's just ignore that for now.
1273 // OBS! If this is implemented, don't forget to regenerate the cipher_state
1274 //We're expected to respond with the data+crc, exactly what's already in the receivedcmd
1275 //receivedcmd is now UPDATE 1b | ADDRESS 1b| DATA 8b| Signature 4b or CRC 2b|
1276
1277 //Take the data...
1278 memcpy(data_generic_trace, receivedCmd+2,8);
1279 //Add crc
1280 AppendCrc(data_generic_trace, 8);
1281 trace_data = data_generic_trace;
1282 trace_data_size = 10;
1283 CodeIClassTagAnswer(trace_data , trace_data_size);
1284 memcpy(data_response, ToSend, ToSendMax);
1285 modulated_response = data_response;
1286 modulated_response_size = ToSendMax;
1287 }
1288 else if(receivedCmd[0] == ICLASS_CMD_PAGESEL)
1289 {//Pagesel
1290 //Pagesel enables to select a page in the selected chip memory and return its configuration block
1291 //Chips with a single page will not answer to this command
1292 // It appears we're fine ignoring this.
1293 //Otherwise, we should answer 8bytes (block) + 2bytes CRC
1294 }
1295 else {
1296 //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
1297 // Never seen this command before
1298 Dbprintf("Unhandled command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1299 len,
1300 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1301 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1302 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1303 // Do not respond
1304 modulated_response = resp_sof;
1305 modulated_response_size = 0; //order = 0;
1306 trace_data = NULL;
1307 trace_data_size = 0;
1308 }
1309
1310 if(cmdsRecvd > 100) {
1311 //DbpString("100 commands later...");
1312 //break;
1313 }
1314 else {
1315 cmdsRecvd++;
1316 }
1317 /**
1318 A legit tag has about 380us delay between reader EOT and tag SOF.
1319 **/
1320 if(modulated_response_size > 0) {
1321 SendIClassAnswer(modulated_response, modulated_response_size, response_delay);
1322 t2r_time = GetCountSspClk();
1323 }
1324
1325 if (tracing) {
1326 uint8_t parity[MAX_PARITY_SIZE];
1327 GetParity(receivedCmd, len, parity);
1328 LogTrace(receivedCmd,len, (r2t_time-time_0)<< 4, (r2t_time-time_0) << 4, parity, TRUE);
1329
1330 if (trace_data != NULL) {
1331 GetParity(trace_data, trace_data_size, parity);
1332 LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, FALSE);
1333 }
1334 if(!tracing)
1335 DbpString("Trace full");
1336
1337 }
1338 }
1339
1340 LEDsoff();
1341
1342 if(buttonPressed)
1343 DbpString("Button pressed");
1344
1345 return buttonPressed;
1346 }
1347
1348 static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
1349 {
1350 int i = 0, d=0;//, u = 0, d = 0;
1351 uint8_t b = 0;
1352
1353 //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
1354 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K_8BIT);
1355
1356 AT91C_BASE_SSC->SSC_THR = 0x00;
1357 FpgaSetupSsc();
1358 while(!BUTTON_PRESS()) {
1359 if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
1360 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1361 }
1362 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){
1363 b = 0x00;
1364 if(d < delay) {
1365 d++;
1366 }
1367 else {
1368 if( i < respLen){
1369 b = resp[i];
1370 //Hack
1371 //b = 0xAC;
1372 }
1373 i++;
1374 }
1375 AT91C_BASE_SSC->SSC_THR = b;
1376 }
1377
1378 // if (i > respLen +4) break;
1379 if (i > respLen +1) break;
1380 }
1381
1382 return 0;
1383 }
1384
1385 /// THE READER CODE
1386
1387 //-----------------------------------------------------------------------------
1388 // Transmit the command (to the tag) that was placed in ToSend[].
1389 //-----------------------------------------------------------------------------
1390 static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait)
1391 {
1392 int c;
1393 volatile uint32_t r;
1394 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1395 AT91C_BASE_SSC->SSC_THR = 0x00;
1396 FpgaSetupSsc();
1397
1398 if (wait) {
1399 if(*wait < 10) *wait = 10;
1400
1401 for(c = 0; c < *wait;) {
1402 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1403 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1404 c++;
1405 }
1406 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1407 r = AT91C_BASE_SSC->SSC_RHR;
1408 (void)r;
1409 }
1410 WDT_HIT();
1411 }
1412 }
1413
1414
1415 uint8_t sendbyte;
1416 bool firstpart = TRUE;
1417 c = 0;
1418 for(;;) {
1419 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1420
1421 // DOUBLE THE SAMPLES!
1422 if(firstpart) {
1423 sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4);
1424 }
1425 else {
1426 sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4);
1427 c++;
1428 }
1429
1430 if(sendbyte == 0xff)
1431 sendbyte = 0xfe;
1432
1433 AT91C_BASE_SSC->SSC_THR = sendbyte;
1434 firstpart = !firstpart;
1435
1436 if(c >= len) break;
1437
1438 }
1439 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1440 r = AT91C_BASE_SSC->SSC_RHR;
1441 (void)r;
1442 }
1443
1444 WDT_HIT();
1445 }
1446 if (samples && wait) *samples = (c + *wait) << 3;
1447 }
1448
1449 //-----------------------------------------------------------------------------
1450 // Prepare iClass reader command to send to FPGA
1451 //-----------------------------------------------------------------------------
1452 void CodeIClassCommand(const uint8_t * cmd, int len)
1453 {
1454 int i, j, k;
1455 uint8_t b;
1456
1457 ToSendReset();
1458
1459 // Start of Communication: 1 out of 4
1460 ToSend[++ToSendMax] = 0xf0;
1461 ToSend[++ToSendMax] = 0x00;
1462 ToSend[++ToSendMax] = 0x0f;
1463 ToSend[++ToSendMax] = 0x00;
1464
1465 // Modulate the bytes
1466 for (i = 0; i < len; i++) {
1467 b = cmd[i];
1468 for(j = 0; j < 4; j++) {
1469 for(k = 0; k < 4; k++) {
1470 if(k == (b & 3)) {
1471 ToSend[++ToSendMax] = 0xf0;
1472 }
1473 else {
1474 ToSend[++ToSendMax] = 0x00;
1475 }
1476 }
1477 b >>= 2;
1478 }
1479 }
1480
1481 // End of Communication
1482 ToSend[++ToSendMax] = 0x00;
1483 ToSend[++ToSendMax] = 0x00;
1484 ToSend[++ToSendMax] = 0xf0;
1485 ToSend[++ToSendMax] = 0x00;
1486
1487 // Convert from last character reference to length
1488 ToSendMax++;
1489 }
1490
1491 void ReaderTransmitIClass(uint8_t* frame, int len)
1492 {
1493 int wait = 0;
1494 int samples = 0;
1495
1496 // This is tied to other size changes
1497 CodeIClassCommand(frame,len);
1498
1499 // Select the card
1500 TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait);
1501 if(trigger)
1502 LED_A_ON();
1503
1504 // Store reader command in buffer
1505 if (tracing) {
1506 uint8_t par[MAX_PARITY_SIZE];
1507 GetParity(frame, len, par);
1508 LogTrace(frame, len, rsamples, rsamples, par, TRUE);
1509 }
1510 }
1511
1512 //-----------------------------------------------------------------------------
1513 // Wait a certain time for tag response
1514 // If a response is captured return TRUE
1515 // If it takes too long return FALSE
1516 //-----------------------------------------------------------------------------
1517 static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
1518 {
1519 // buffer needs to be 512 bytes
1520 int c;
1521
1522 // Set FPGA mode to "reader listen mode", no modulation (listen
1523 // only, since we are receiving, not transmitting).
1524 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1525
1526 // Now get the answer from the card
1527 Demod.output = receivedResponse;
1528 Demod.len = 0;
1529 Demod.state = DEMOD_UNSYNCD;
1530
1531 uint8_t b;
1532 if (elapsed) *elapsed = 0;
1533
1534 bool skip = FALSE;
1535
1536 c = 0;
1537 for(;;) {
1538 WDT_HIT();
1539
1540 if(BUTTON_PRESS()) return FALSE;
1541
1542 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1543 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1544 if (elapsed) (*elapsed)++;
1545 }
1546 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1547 if(c < timeout)
1548 c++;
1549 else
1550 return FALSE;
1551
1552 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1553
1554 skip = !skip;
1555
1556 if(skip) continue;
1557
1558 if(ManchesterDecoding(b & 0x0f)) {
1559 *samples = c << 3;
1560 return TRUE;
1561 }
1562 }
1563 }
1564 }
1565
1566 int ReaderReceiveIClass(uint8_t* receivedAnswer)
1567 {
1568 int samples = 0;
1569 if (!GetIClassAnswer(receivedAnswer,160,&samples,0)) return FALSE;
1570 rsamples += samples;
1571 if (tracing) {
1572 uint8_t parity[MAX_PARITY_SIZE];
1573 GetParity(receivedAnswer, Demod.len, parity);
1574 LogTrace(receivedAnswer,Demod.len,rsamples,rsamples,parity,FALSE);
1575 }
1576 if(samples == 0) return FALSE;
1577 return Demod.len;
1578 }
1579
1580 void setupIclassReader()
1581 {
1582 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1583 // Reset trace buffer
1584 clear_trace();
1585 set_tracing(TRUE);
1586
1587 // Setup SSC
1588 FpgaSetupSsc();
1589 // Start from off (no field generated)
1590 // Signal field is off with the appropriate LED
1591 LED_D_OFF();
1592 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1593 SpinDelay(200);
1594
1595 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1596
1597 // Now give it time to spin up.
1598 // Signal field is on with the appropriate LED
1599 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1600 SpinDelay(200);
1601 LED_A_ON();
1602
1603 }
1604
1605 bool sendCmdGetResponseWithRetries(uint8_t* command, size_t cmdsize, uint8_t* resp, uint8_t expected_size, uint8_t retries)
1606 {
1607 while(retries-- > 0)
1608 {
1609 ReaderTransmitIClass(command, cmdsize);
1610 if(expected_size == ReaderReceiveIClass(resp)){
1611 return true;
1612 }
1613 }
1614 return false;//Error
1615 }
1616
1617 /**
1618 * @brief Talks to an iclass tag, sends the commands to get CSN and CC.
1619 * @param card_data where the CSN and CC are stored for return
1620 * @return 0 = fail
1621 * 1 = Got CSN
1622 * 2 = Got CSN and CC
1623 */
1624 uint8_t handshakeIclassTag_ext(uint8_t *card_data, bool use_credit_key)
1625 {
1626 static uint8_t act_all[] = { 0x0a };
1627 //static uint8_t identify[] = { 0x0c };
1628 static uint8_t identify[] = { 0x0c, 0x00, 0x73, 0x33 };
1629 static uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1630 static uint8_t readcheck_cc[]= { 0x88, 0x02 };
1631 if (use_credit_key)
1632 readcheck_cc[0] = 0x18;
1633 else
1634 readcheck_cc[0] = 0x88;
1635
1636 uint8_t resp[ICLASS_BUFFER_SIZE];
1637
1638 uint8_t read_status = 0;
1639
1640 // Send act_all
1641 ReaderTransmitIClass(act_all, 1);
1642 // Card present?
1643 if(!ReaderReceiveIClass(resp)) return read_status;//Fail
1644 //Send Identify
1645 ReaderTransmitIClass(identify, 1);
1646 //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC
1647 uint8_t len = ReaderReceiveIClass(resp);
1648 if(len != 10) return read_status;//Fail
1649
1650 //Copy the Anti-collision CSN to our select-packet
1651 memcpy(&select[1],resp,8);
1652 //Select the card
1653 ReaderTransmitIClass(select, sizeof(select));
1654 //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC
1655 len = ReaderReceiveIClass(resp);
1656 if(len != 10) return read_status;//Fail
1657
1658 //Success - level 1, we got CSN
1659 //Save CSN in response data
1660 memcpy(card_data,resp,8);
1661
1662 //Flag that we got to at least stage 1, read CSN
1663 read_status = 1;
1664
1665 // Card selected, now read e-purse (cc)
1666 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1667 if(ReaderReceiveIClass(resp) == 8) {
1668 //Save CC (e-purse) in response data
1669 memcpy(card_data+8,resp,8);
1670 read_status++;
1671 }
1672
1673 return read_status;
1674 }
1675 uint8_t handshakeIclassTag(uint8_t *card_data){
1676 return handshakeIclassTag_ext(card_data, false);
1677 }
1678
1679
1680 // Reader iClass Anticollission
1681 void ReaderIClass(uint8_t arg0) {
1682
1683 uint8_t card_data[6 * 8]={0};
1684 memset(card_data, 0xFF, sizeof(card_data));
1685 uint8_t last_csn[8]={0};
1686
1687 //Read conf block CRC(0x01) => 0xfa 0x22
1688 uint8_t readConf[] = { ICLASS_CMD_READ_OR_IDENTIFY,0x01, 0xfa, 0x22};
1689 //Read conf block CRC(0x05) => 0xde 0x64
1690 uint8_t readAA[] = { ICLASS_CMD_READ_OR_IDENTIFY,0x05, 0xde, 0x64};
1691
1692
1693 int read_status= 0;
1694 uint8_t result_status = 0;
1695 bool abort_after_read = arg0 & FLAG_ICLASS_READER_ONLY_ONCE;
1696 bool try_once = arg0 & FLAG_ICLASS_READER_ONE_TRY;
1697 bool use_credit_key = false;
1698 if (arg0 & FLAG_ICLASS_READER_CEDITKEY)
1699 use_credit_key = true;
1700 set_tracing(TRUE);
1701 setupIclassReader();
1702
1703 uint16_t tryCnt=0;
1704 while(!BUTTON_PRESS())
1705 {
1706 if (try_once && tryCnt > 5) break;
1707
1708 tryCnt++;
1709
1710 if(!tracing) {
1711 DbpString("Trace full");
1712 break;
1713 }
1714 WDT_HIT();
1715
1716 read_status = handshakeIclassTag_ext(card_data, use_credit_key);
1717
1718 if(read_status == 0) continue;
1719 if(read_status == 1) result_status = FLAG_ICLASS_READER_CSN;
1720 if(read_status == 2) result_status = FLAG_ICLASS_READER_CSN|FLAG_ICLASS_READER_CC;
1721
1722 // handshakeIclass returns CSN|CC, but the actual block
1723 // layout is CSN|CONFIG|CC, so here we reorder the data,
1724 // moving CC forward 8 bytes
1725 memcpy(card_data+16,card_data+8, 8);
1726 //Read block 1, config
1727 if(arg0 & FLAG_ICLASS_READER_CONF)
1728 {
1729 if(sendCmdGetResponseWithRetries(readConf, sizeof(readConf),card_data+8, 10, 10))
1730 {
1731 result_status |= FLAG_ICLASS_READER_CONF;
1732 } else {
1733 Dbprintf("Failed to dump config block");
1734 }
1735 }
1736
1737 //Read block 5, AA
1738 if(arg0 & FLAG_ICLASS_READER_AA){
1739 if(sendCmdGetResponseWithRetries(readAA, sizeof(readAA),card_data+(8*4), 10, 10))
1740 {
1741 result_status |= FLAG_ICLASS_READER_AA;
1742 } else {
1743 //Dbprintf("Failed to dump AA block");
1744 }
1745 }
1746
1747 // 0 : CSN
1748 // 1 : Configuration
1749 // 2 : e-purse
1750 // (3,4 write-only, kc and kd)
1751 // 5 Application issuer area
1752 //
1753 //Then we can 'ship' back the 8 * 5 bytes of data,
1754 // with 0xFF:s in block 3 and 4.
1755
1756 LED_B_ON();
1757 //Send back to client, but don't bother if we already sent this
1758 if(memcmp(last_csn, card_data, 8) != 0)
1759 {
1760 // If caller requires that we get CC, continue until we got it
1761 if( (arg0 & read_status & FLAG_ICLASS_READER_CC) || !(arg0 & FLAG_ICLASS_READER_CC))
1762 {
1763 cmd_send(CMD_ACK,result_status,0,0,card_data,sizeof(card_data));
1764 if(abort_after_read) {
1765 LED_A_OFF();
1766 set_tracing(FALSE);
1767 return;
1768 }
1769 //Save that we already sent this....
1770 memcpy(last_csn, card_data, 8);
1771 }
1772 }
1773 LED_B_OFF();
1774 }
1775 cmd_send(CMD_ACK,0,0,0,card_data, 0);
1776 LED_A_OFF();
1777 set_tracing(FALSE);
1778 }
1779
1780 void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
1781
1782 uint8_t card_data[USB_CMD_DATA_SIZE]={0};
1783 uint16_t block_crc_LUT[255] = {0};
1784
1785 {//Generate a lookup table for block crc
1786 for(int block = 0; block < 255; block++){
1787 char bl = block;
1788 block_crc_LUT[block] = iclass_crc16(&bl ,1);
1789 }
1790 }
1791 //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]);
1792
1793 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1794 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1795
1796 uint16_t crc = 0;
1797 uint8_t cardsize=0;
1798 uint8_t mem=0;
1799
1800 static struct memory_t{
1801 int k16;
1802 int book;
1803 int k2;
1804 int lockauth;
1805 int keyaccess;
1806 } memory;
1807
1808 uint8_t resp[ICLASS_BUFFER_SIZE];
1809
1810 setupIclassReader();
1811 set_tracing(TRUE);
1812
1813 while(!BUTTON_PRESS()) {
1814
1815 WDT_HIT();
1816
1817 if(!tracing) {
1818 DbpString("Trace full");
1819 break;
1820 }
1821
1822 uint8_t read_status = handshakeIclassTag(card_data);
1823 if(read_status < 2) continue;
1824
1825 //for now replay captured auth (as cc not updated)
1826 memcpy(check+5,MAC,4);
1827
1828 if(!sendCmdGetResponseWithRetries(check, sizeof(check),resp, 4, 5))
1829 {
1830 Dbprintf("Error: Authentication Fail!");
1831 continue;
1832 }
1833
1834 //first get configuration block (block 1)
1835 crc = block_crc_LUT[1];
1836 read[1]=1;
1837 read[2] = crc >> 8;
1838 read[3] = crc & 0xff;
1839
1840 if(!sendCmdGetResponseWithRetries(read, sizeof(read),resp, 10, 10))
1841 {
1842 Dbprintf("Dump config (block 1) failed");
1843 continue;
1844 }
1845
1846 mem=resp[5];
1847 memory.k16= (mem & 0x80);
1848 memory.book= (mem & 0x20);
1849 memory.k2= (mem & 0x8);
1850 memory.lockauth= (mem & 0x2);
1851 memory.keyaccess= (mem & 0x1);
1852
1853 cardsize = memory.k16 ? 255 : 32;
1854 WDT_HIT();
1855 //Set card_data to all zeroes, we'll fill it with data
1856 memset(card_data,0x0,USB_CMD_DATA_SIZE);
1857 uint8_t failedRead =0;
1858 uint32_t stored_data_length =0;
1859 //then loop around remaining blocks
1860 for(int block=0; block < cardsize; block++){
1861
1862 read[1]= block;
1863 crc = block_crc_LUT[block];
1864 read[2] = crc >> 8;
1865 read[3] = crc & 0xff;
1866
1867 if(sendCmdGetResponseWithRetries(read, sizeof(read), resp, 10, 10))
1868 {
1869 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
1870 block, resp[0], resp[1], resp[2],
1871 resp[3], resp[4], resp[5],
1872 resp[6], resp[7]);
1873
1874 //Fill up the buffer
1875 memcpy(card_data+stored_data_length,resp,8);
1876 stored_data_length += 8;
1877 if(stored_data_length +8 > USB_CMD_DATA_SIZE)
1878 {//Time to send this off and start afresh
1879 cmd_send(CMD_ACK,
1880 stored_data_length,//data length
1881 failedRead,//Failed blocks?
1882 0,//Not used ATM
1883 card_data, stored_data_length);
1884 //reset
1885 stored_data_length = 0;
1886 failedRead = 0;
1887 }
1888 } else {
1889 failedRead = 1;
1890 stored_data_length +=8;//Otherwise, data becomes misaligned
1891 Dbprintf("Failed to dump block %d", block);
1892 }
1893 }
1894
1895 //Send off any remaining data
1896 if(stored_data_length > 0)
1897 {
1898 cmd_send(CMD_ACK,
1899 stored_data_length,//data length
1900 failedRead,//Failed blocks?
1901 0,//Not used ATM
1902 card_data, stored_data_length);
1903 }
1904 //If we got here, let's break
1905 break;
1906 }
1907 //Signal end of transmission
1908 cmd_send(CMD_ACK,
1909 0,//data length
1910 0,//Failed blocks?
1911 0,//Not used ATM
1912 card_data, 0);
1913
1914 LED_A_OFF();
1915 set_tracing(FALSE);
1916 }
1917
1918 void iClass_ReadCheck(uint8_t blockNo, uint8_t keyType) {
1919 uint8_t readcheck[] = { keyType, blockNo };
1920 uint8_t resp[] = {0,0,0,0,0,0,0,0};
1921 size_t isOK = 0;
1922 isOK = sendCmdGetResponseWithRetries(readcheck, sizeof(readcheck), resp, sizeof(resp), 6);
1923 cmd_send(CMD_ACK,isOK,0,0,0,0);
1924 }
1925
1926 void iClass_Authentication(uint8_t *MAC) {
1927 uint8_t check[] = { ICLASS_CMD_CHECK, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1928 uint8_t resp[ICLASS_BUFFER_SIZE];
1929 memcpy(check+5,MAC,4);
1930 bool isOK;
1931 isOK = sendCmdGetResponseWithRetries(check, sizeof(check), resp, 4, 6);
1932 cmd_send(CMD_ACK,isOK,0,0,0,0);
1933 }
1934 bool iClass_ReadBlock(uint8_t blockNo, uint8_t *readdata) {
1935 uint8_t readcmd[] = {ICLASS_CMD_READ_OR_IDENTIFY, blockNo, 0x00, 0x00}; //0x88, 0x00 // can i use 0C?
1936 char bl = blockNo;
1937 uint16_t rdCrc = iclass_crc16(&bl, 1);
1938 readcmd[2] = rdCrc >> 8;
1939 readcmd[3] = rdCrc & 0xff;
1940 uint8_t resp[] = {0,0,0,0,0,0,0,0,0,0};
1941 bool isOK = false;
1942
1943 //readcmd[1] = blockNo;
1944 isOK = sendCmdGetResponseWithRetries(readcmd, sizeof(readcmd), resp, 10, 10);
1945 memcpy(readdata, resp, sizeof(resp));
1946
1947 return isOK;
1948 }
1949
1950 void iClass_ReadBlk(uint8_t blockno) {
1951 uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0};
1952 bool isOK = false;
1953 isOK = iClass_ReadBlock(blockno, readblockdata);
1954 cmd_send(CMD_ACK, isOK, 0, 0, readblockdata, 8);
1955 }
1956
1957 void iClass_Dump(uint8_t blockno, uint8_t numblks) {
1958 uint8_t readblockdata[] = {0,0,0,0,0,0,0,0,0,0};
1959 bool isOK = false;
1960 uint8_t blkCnt = 0;
1961
1962 BigBuf_free();
1963 uint8_t *dataout = BigBuf_malloc(255*8);
1964 if (dataout == NULL){
1965 Dbprintf("out of memory");
1966 OnError(1);
1967 return;
1968 }
1969 memset(dataout,0xFF,255*8);
1970
1971 for (;blkCnt < numblks; blkCnt++) {
1972 isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata);
1973 if (!isOK || (readblockdata[0] == 0xBB || readblockdata[7] == 0xBB || readblockdata[2] == 0xBB)) { //try again
1974 isOK = iClass_ReadBlock(blockno+blkCnt, readblockdata);
1975 if (!isOK) {
1976 Dbprintf("Block %02X failed to read", blkCnt+blockno);
1977 break;
1978 }
1979 }
1980 memcpy(dataout+(blkCnt*8),readblockdata,8);
1981 }
1982 //return pointer to dump memory in arg3
1983 cmd_send(CMD_ACK,isOK,blkCnt,BigBuf_max_traceLen(),0,0);
1984 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1985 LEDsoff();
1986 BigBuf_free();
1987 }
1988
1989 bool iClass_WriteBlock_ext(uint8_t blockNo, uint8_t *data) {
1990 uint8_t write[] = { ICLASS_CMD_UPDATE, blockNo, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1991 //uint8_t readblockdata[10];
1992 //write[1] = blockNo;
1993 memcpy(write+2, data, 12); // data + mac
1994 char *wrCmd = (char *)(write+1);
1995 uint16_t wrCrc = iclass_crc16(wrCmd, 13);
1996 write[14] = wrCrc >> 8;
1997 write[15] = wrCrc & 0xff;
1998 uint8_t resp[] = {0,0,0,0,0,0,0,0,0,0};
1999 bool isOK = false;
2000
2001 isOK = sendCmdGetResponseWithRetries(write,sizeof(write),resp,sizeof(resp),10);
2002 if (isOK) { //if reader responded correctly
2003 //Dbprintf("WriteResp: %02X%02X%02X%02X%02X%02X%02X%02X%02X%02X",resp[0],resp[1],resp[2],resp[3],resp[4],resp[5],resp[6],resp[7],resp[8],resp[9]);
2004 if (memcmp(write+2,resp,8)) { //if response is not equal to write values
2005 if (blockNo != 3 && blockNo != 4) { //if not programming key areas (note key blocks don't get programmed with actual key data it is xor data)
2006 //error try again
2007 isOK = sendCmdGetResponseWithRetries(write,sizeof(write),resp,sizeof(resp),10);
2008 }
2009
2010 }
2011 }
2012 return isOK;
2013 }
2014
2015 void iClass_WriteBlock(uint8_t blockNo, uint8_t *data) {
2016 bool isOK = iClass_WriteBlock_ext(blockNo, data);
2017 if (isOK){
2018 Dbprintf("Write block [%02x] successful",blockNo);
2019 }else {
2020 Dbprintf("Write block [%02x] failed",blockNo);
2021 }
2022 cmd_send(CMD_ACK,isOK,0,0,0,0);
2023 }
2024
2025 void iClass_Clone(uint8_t startblock, uint8_t endblock, uint8_t *data) {
2026 int i;
2027 int written = 0;
2028 int total_block = (endblock - startblock) + 1;
2029 for (i = 0; i < total_block;i++){
2030 // block number
2031 if (iClass_WriteBlock_ext(i+startblock, data+(i*12))){
2032 Dbprintf("Write block [%02x] successful",i + startblock);
2033 written++;
2034 } else {
2035 if (iClass_WriteBlock_ext(i+startblock, data+(i*12))){
2036 Dbprintf("Write block [%02x] successful",i + startblock);
2037 written++;
2038 } else {
2039 Dbprintf("Write block [%02x] failed",i + startblock);
2040 }
2041 }
2042 }
2043 if (written == total_block)
2044 Dbprintf("Clone complete");
2045 else
2046 Dbprintf("Clone incomplete");
2047
2048 cmd_send(CMD_ACK,1,0,0,0,0);
2049 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2050 LEDsoff();
2051 }
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