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1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17
18 #include "iso14443crc.h"
19 #include "iso14443a.h"
20 #include "crapto1.h"
21 #include "mifareutil.h"
22
23 static uint32_t iso14a_timeout;
24 uint8_t *trace = (uint8_t *) BigBuf;
25 int traceLen = 0;
26 int rsamples = 0;
27 int tracing = TRUE;
28 uint8_t trigger = 0;
29
30 // CARD TO READER - manchester
31 // Sequence D: 11110000 modulation with subcarrier during first half
32 // Sequence E: 00001111 modulation with subcarrier during second half
33 // Sequence F: 00000000 no modulation with subcarrier
34 // READER TO CARD - miller
35 // Sequence X: 00001100 drop after half a period
36 // Sequence Y: 00000000 no drop
37 // Sequence Z: 11000000 drop at start
38 #define SEC_D 0xf0
39 #define SEC_E 0x0f
40 #define SEC_F 0x00
41 #define SEC_X 0x0c
42 #define SEC_Y 0x00
43 #define SEC_Z 0xc0
44
45 const uint8_t OddByteParity[256] = {
46 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
47 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
48 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
49 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
50 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
51 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
52 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
53 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
54 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
55 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
56 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
57 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
58 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
59 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
60 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
61 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
62 };
63
64
65 void iso14a_set_trigger(int enable) {
66 trigger = enable;
67 }
68
69 void iso14a_clear_tracelen(void) {
70 traceLen = 0;
71 }
72 void iso14a_set_tracing(int enable) {
73 tracing = enable;
74 }
75
76 //-----------------------------------------------------------------------------
77 // Generate the parity value for a byte sequence
78 //
79 //-----------------------------------------------------------------------------
80 byte_t oddparity (const byte_t bt)
81 {
82 return OddByteParity[bt];
83 }
84
85 uint32_t GetParity(const uint8_t * pbtCmd, int iLen)
86 {
87 int i;
88 uint32_t dwPar = 0;
89
90 // Generate the encrypted data
91 for (i = 0; i < iLen; i++) {
92 // Save the encrypted parity bit
93 dwPar |= ((OddByteParity[pbtCmd[i]]) << i);
94 }
95 return dwPar;
96 }
97
98 void AppendCrc14443a(uint8_t* data, int len)
99 {
100 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
101 }
102
103 // The function LogTrace() is also used by the iClass implementation in iClass.c
104 int LogTrace(const uint8_t * btBytes, int iLen, int iSamples, uint32_t dwParity, int bReader)
105 {
106 // Return when trace is full
107 if (traceLen >= TRACE_SIZE) return FALSE;
108
109 // Trace the random, i'm curious
110 rsamples += iSamples;
111 trace[traceLen++] = ((rsamples >> 0) & 0xff);
112 trace[traceLen++] = ((rsamples >> 8) & 0xff);
113 trace[traceLen++] = ((rsamples >> 16) & 0xff);
114 trace[traceLen++] = ((rsamples >> 24) & 0xff);
115 if (!bReader) {
116 trace[traceLen - 1] |= 0x80;
117 }
118 trace[traceLen++] = ((dwParity >> 0) & 0xff);
119 trace[traceLen++] = ((dwParity >> 8) & 0xff);
120 trace[traceLen++] = ((dwParity >> 16) & 0xff);
121 trace[traceLen++] = ((dwParity >> 24) & 0xff);
122 trace[traceLen++] = iLen;
123 memcpy(trace + traceLen, btBytes, iLen);
124 traceLen += iLen;
125 return TRUE;
126 }
127
128 //-----------------------------------------------------------------------------
129 // The software UART that receives commands from the reader, and its state
130 // variables.
131 //-----------------------------------------------------------------------------
132 static struct {
133 enum {
134 STATE_UNSYNCD,
135 STATE_START_OF_COMMUNICATION,
136 STATE_MILLER_X,
137 STATE_MILLER_Y,
138 STATE_MILLER_Z,
139 STATE_ERROR_WAIT
140 } state;
141 uint16_t shiftReg;
142 int bitCnt;
143 int byteCnt;
144 int byteCntMax;
145 int posCnt;
146 int syncBit;
147 int parityBits;
148 int samples;
149 int highCnt;
150 int bitBuffer;
151 enum {
152 DROP_NONE,
153 DROP_FIRST_HALF,
154 DROP_SECOND_HALF
155 } drop;
156 uint8_t *output;
157 } Uart;
158
159 static RAMFUNC int MillerDecoding(int bit)
160 {
161 //int error = 0;
162 int bitright;
163
164 if(!Uart.bitBuffer) {
165 Uart.bitBuffer = bit ^ 0xFF0;
166 return FALSE;
167 }
168 else {
169 Uart.bitBuffer <<= 4;
170 Uart.bitBuffer ^= bit;
171 }
172
173 int EOC = FALSE;
174
175 if(Uart.state != STATE_UNSYNCD) {
176 Uart.posCnt++;
177
178 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
179 bit = 0x00;
180 }
181 else {
182 bit = 0x01;
183 }
184 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
185 bitright = 0x00;
186 }
187 else {
188 bitright = 0x01;
189 }
190 if(bit != bitright) { bit = bitright; }
191
192 if(Uart.posCnt == 1) {
193 // measurement first half bitperiod
194 if(!bit) {
195 Uart.drop = DROP_FIRST_HALF;
196 }
197 }
198 else {
199 // measurement second half bitperiod
200 if(!bit & (Uart.drop == DROP_NONE)) {
201 Uart.drop = DROP_SECOND_HALF;
202 }
203 else if(!bit) {
204 // measured a drop in first and second half
205 // which should not be possible
206 Uart.state = STATE_ERROR_WAIT;
207 //error = 0x01;
208 }
209
210 Uart.posCnt = 0;
211
212 switch(Uart.state) {
213 case STATE_START_OF_COMMUNICATION:
214 Uart.shiftReg = 0;
215 if(Uart.drop == DROP_SECOND_HALF) {
216 // error, should not happen in SOC
217 Uart.state = STATE_ERROR_WAIT;
218 //error = 0x02;
219 }
220 else {
221 // correct SOC
222 Uart.state = STATE_MILLER_Z;
223 }
224 break;
225
226 case STATE_MILLER_Z:
227 Uart.bitCnt++;
228 Uart.shiftReg >>= 1;
229 if(Uart.drop == DROP_NONE) {
230 // logic '0' followed by sequence Y
231 // end of communication
232 Uart.state = STATE_UNSYNCD;
233 EOC = TRUE;
234 }
235 // if(Uart.drop == DROP_FIRST_HALF) {
236 // Uart.state = STATE_MILLER_Z; stay the same
237 // we see a logic '0' }
238 if(Uart.drop == DROP_SECOND_HALF) {
239 // we see a logic '1'
240 Uart.shiftReg |= 0x100;
241 Uart.state = STATE_MILLER_X;
242 }
243 break;
244
245 case STATE_MILLER_X:
246 Uart.shiftReg >>= 1;
247 if(Uart.drop == DROP_NONE) {
248 // sequence Y, we see a '0'
249 Uart.state = STATE_MILLER_Y;
250 Uart.bitCnt++;
251 }
252 if(Uart.drop == DROP_FIRST_HALF) {
253 // Would be STATE_MILLER_Z
254 // but Z does not follow X, so error
255 Uart.state = STATE_ERROR_WAIT;
256 //error = 0x03;
257 }
258 if(Uart.drop == DROP_SECOND_HALF) {
259 // We see a '1' and stay in state X
260 Uart.shiftReg |= 0x100;
261 Uart.bitCnt++;
262 }
263 break;
264
265 case STATE_MILLER_Y:
266 Uart.bitCnt++;
267 Uart.shiftReg >>= 1;
268 if(Uart.drop == DROP_NONE) {
269 // logic '0' followed by sequence Y
270 // end of communication
271 Uart.state = STATE_UNSYNCD;
272 EOC = TRUE;
273 }
274 if(Uart.drop == DROP_FIRST_HALF) {
275 // we see a '0'
276 Uart.state = STATE_MILLER_Z;
277 }
278 if(Uart.drop == DROP_SECOND_HALF) {
279 // We see a '1' and go to state X
280 Uart.shiftReg |= 0x100;
281 Uart.state = STATE_MILLER_X;
282 }
283 break;
284
285 case STATE_ERROR_WAIT:
286 // That went wrong. Now wait for at least two bit periods
287 // and try to sync again
288 if(Uart.drop == DROP_NONE) {
289 Uart.highCnt = 6;
290 Uart.state = STATE_UNSYNCD;
291 }
292 break;
293
294 default:
295 Uart.state = STATE_UNSYNCD;
296 Uart.highCnt = 0;
297 break;
298 }
299
300 Uart.drop = DROP_NONE;
301
302 // should have received at least one whole byte...
303 if((Uart.bitCnt == 2) && EOC && (Uart.byteCnt > 0)) {
304 return TRUE;
305 }
306
307 if(Uart.bitCnt == 9) {
308 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
309 Uart.byteCnt++;
310
311 Uart.parityBits <<= 1;
312 Uart.parityBits ^= ((Uart.shiftReg >> 8) & 0x01);
313
314 if(EOC) {
315 // when End of Communication received and
316 // all data bits processed..
317 return TRUE;
318 }
319 Uart.bitCnt = 0;
320 }
321
322 /*if(error) {
323 Uart.output[Uart.byteCnt] = 0xAA;
324 Uart.byteCnt++;
325 Uart.output[Uart.byteCnt] = error & 0xFF;
326 Uart.byteCnt++;
327 Uart.output[Uart.byteCnt] = 0xAA;
328 Uart.byteCnt++;
329 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
330 Uart.byteCnt++;
331 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
332 Uart.byteCnt++;
333 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
334 Uart.byteCnt++;
335 Uart.output[Uart.byteCnt] = 0xAA;
336 Uart.byteCnt++;
337 return TRUE;
338 }*/
339 }
340
341 }
342 else {
343 bit = Uart.bitBuffer & 0xf0;
344 bit >>= 4;
345 bit ^= 0x0F;
346 if(bit) {
347 // should have been high or at least (4 * 128) / fc
348 // according to ISO this should be at least (9 * 128 + 20) / fc
349 if(Uart.highCnt == 8) {
350 // we went low, so this could be start of communication
351 // it turns out to be safer to choose a less significant
352 // syncbit... so we check whether the neighbour also represents the drop
353 Uart.posCnt = 1; // apparently we are busy with our first half bit period
354 Uart.syncBit = bit & 8;
355 Uart.samples = 3;
356 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
357 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
358 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
359 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
360 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
361 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
362 Uart.syncBit = 8;
363
364 // the first half bit period is expected in next sample
365 Uart.posCnt = 0;
366 Uart.samples = 3;
367 }
368 }
369 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
370
371 Uart.syncBit <<= 4;
372 Uart.state = STATE_START_OF_COMMUNICATION;
373 Uart.drop = DROP_FIRST_HALF;
374 Uart.bitCnt = 0;
375 Uart.byteCnt = 0;
376 Uart.parityBits = 0;
377 //error = 0;
378 }
379 else {
380 Uart.highCnt = 0;
381 }
382 }
383 else {
384 if(Uart.highCnt < 8) {
385 Uart.highCnt++;
386 }
387 }
388 }
389
390 return FALSE;
391 }
392
393 //=============================================================================
394 // ISO 14443 Type A - Manchester
395 //=============================================================================
396
397 static struct {
398 enum {
399 DEMOD_UNSYNCD,
400 DEMOD_START_OF_COMMUNICATION,
401 DEMOD_MANCHESTER_D,
402 DEMOD_MANCHESTER_E,
403 DEMOD_MANCHESTER_F,
404 DEMOD_ERROR_WAIT
405 } state;
406 int bitCount;
407 int posCount;
408 int syncBit;
409 int parityBits;
410 uint16_t shiftReg;
411 int buffer;
412 int buff;
413 int samples;
414 int len;
415 enum {
416 SUB_NONE,
417 SUB_FIRST_HALF,
418 SUB_SECOND_HALF
419 } sub;
420 uint8_t *output;
421 } Demod;
422
423 static RAMFUNC int ManchesterDecoding(int v)
424 {
425 int bit;
426 int modulation;
427 //int error = 0;
428
429 if(!Demod.buff) {
430 Demod.buff = 1;
431 Demod.buffer = v;
432 return FALSE;
433 }
434 else {
435 bit = Demod.buffer;
436 Demod.buffer = v;
437 }
438
439 if(Demod.state==DEMOD_UNSYNCD) {
440 Demod.output[Demod.len] = 0xfa;
441 Demod.syncBit = 0;
442 //Demod.samples = 0;
443 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
444
445 if(bit & 0x08) {
446 Demod.syncBit = 0x08;
447 }
448
449 if(bit & 0x04) {
450 if(Demod.syncBit) {
451 bit <<= 4;
452 }
453 Demod.syncBit = 0x04;
454 }
455
456 if(bit & 0x02) {
457 if(Demod.syncBit) {
458 bit <<= 2;
459 }
460 Demod.syncBit = 0x02;
461 }
462
463 if(bit & 0x01 && Demod.syncBit) {
464 Demod.syncBit = 0x01;
465 }
466
467 if(Demod.syncBit) {
468 Demod.len = 0;
469 Demod.state = DEMOD_START_OF_COMMUNICATION;
470 Demod.sub = SUB_FIRST_HALF;
471 Demod.bitCount = 0;
472 Demod.shiftReg = 0;
473 Demod.parityBits = 0;
474 Demod.samples = 0;
475 if(Demod.posCount) {
476 if(trigger) LED_A_OFF();
477 switch(Demod.syncBit) {
478 case 0x08: Demod.samples = 3; break;
479 case 0x04: Demod.samples = 2; break;
480 case 0x02: Demod.samples = 1; break;
481 case 0x01: Demod.samples = 0; break;
482 }
483 }
484 //error = 0;
485 }
486 }
487 else {
488 //modulation = bit & Demod.syncBit;
489 modulation = ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
490
491 Demod.samples += 4;
492
493 if(Demod.posCount==0) {
494 Demod.posCount = 1;
495 if(modulation) {
496 Demod.sub = SUB_FIRST_HALF;
497 }
498 else {
499 Demod.sub = SUB_NONE;
500 }
501 }
502 else {
503 Demod.posCount = 0;
504 if(modulation && (Demod.sub == SUB_FIRST_HALF)) {
505 if(Demod.state!=DEMOD_ERROR_WAIT) {
506 Demod.state = DEMOD_ERROR_WAIT;
507 Demod.output[Demod.len] = 0xaa;
508 //error = 0x01;
509 }
510 }
511 else if(modulation) {
512 Demod.sub = SUB_SECOND_HALF;
513 }
514
515 switch(Demod.state) {
516 case DEMOD_START_OF_COMMUNICATION:
517 if(Demod.sub == SUB_FIRST_HALF) {
518 Demod.state = DEMOD_MANCHESTER_D;
519 }
520 else {
521 Demod.output[Demod.len] = 0xab;
522 Demod.state = DEMOD_ERROR_WAIT;
523 //error = 0x02;
524 }
525 break;
526
527 case DEMOD_MANCHESTER_D:
528 case DEMOD_MANCHESTER_E:
529 if(Demod.sub == SUB_FIRST_HALF) {
530 Demod.bitCount++;
531 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
532 Demod.state = DEMOD_MANCHESTER_D;
533 }
534 else if(Demod.sub == SUB_SECOND_HALF) {
535 Demod.bitCount++;
536 Demod.shiftReg >>= 1;
537 Demod.state = DEMOD_MANCHESTER_E;
538 }
539 else {
540 Demod.state = DEMOD_MANCHESTER_F;
541 }
542 break;
543
544 case DEMOD_MANCHESTER_F:
545 // Tag response does not need to be a complete byte!
546 if(Demod.len > 0 || Demod.bitCount > 0) {
547 if(Demod.bitCount > 0) {
548 Demod.shiftReg >>= (9 - Demod.bitCount);
549 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
550 Demod.len++;
551 // No parity bit, so just shift a 0
552 Demod.parityBits <<= 1;
553 }
554
555 Demod.state = DEMOD_UNSYNCD;
556 return TRUE;
557 }
558 else {
559 Demod.output[Demod.len] = 0xad;
560 Demod.state = DEMOD_ERROR_WAIT;
561 //error = 0x03;
562 }
563 break;
564
565 case DEMOD_ERROR_WAIT:
566 Demod.state = DEMOD_UNSYNCD;
567 break;
568
569 default:
570 Demod.output[Demod.len] = 0xdd;
571 Demod.state = DEMOD_UNSYNCD;
572 break;
573 }
574
575 if(Demod.bitCount>=9) {
576 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
577 Demod.len++;
578
579 Demod.parityBits <<= 1;
580 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
581
582 Demod.bitCount = 0;
583 Demod.shiftReg = 0;
584 }
585
586 /*if(error) {
587 Demod.output[Demod.len] = 0xBB;
588 Demod.len++;
589 Demod.output[Demod.len] = error & 0xFF;
590 Demod.len++;
591 Demod.output[Demod.len] = 0xBB;
592 Demod.len++;
593 Demod.output[Demod.len] = bit & 0xFF;
594 Demod.len++;
595 Demod.output[Demod.len] = Demod.buffer & 0xFF;
596 Demod.len++;
597 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
598 Demod.len++;
599 Demod.output[Demod.len] = 0xBB;
600 Demod.len++;
601 return TRUE;
602 }*/
603
604 }
605
606 } // end (state != UNSYNCED)
607
608 return FALSE;
609 }
610
611 //=============================================================================
612 // Finally, a `sniffer' for ISO 14443 Type A
613 // Both sides of communication!
614 //=============================================================================
615
616 //-----------------------------------------------------------------------------
617 // Record the sequence of commands sent by the reader to the tag, with
618 // triggering so that we start recording at the point that the tag is moved
619 // near the reader.
620 //-----------------------------------------------------------------------------
621 void RAMFUNC SnoopIso14443a(void)
622 {
623 // #define RECV_CMD_OFFSET 2032 // original (working as of 21/2/09) values
624 // #define RECV_RES_OFFSET 2096 // original (working as of 21/2/09) values
625 // #define DMA_BUFFER_OFFSET 2160 // original (working as of 21/2/09) values
626 // #define DMA_BUFFER_SIZE 4096 // original (working as of 21/2/09) values
627 // #define TRACE_SIZE 2000 // original (working as of 21/2/09) values
628
629 // We won't start recording the frames that we acquire until we trigger;
630 // a good trigger condition to get started is probably when we see a
631 // response from the tag.
632 int triggered = FALSE; // FALSE to wait first for card
633
634 // The command (reader -> tag) that we're receiving.
635 // The length of a received command will in most cases be no more than 18 bytes.
636 // So 32 should be enough!
637 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
638 // The response (tag -> reader) that we're receiving.
639 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
640
641 // As we receive stuff, we copy it from receivedCmd or receivedResponse
642 // into trace, along with its length and other annotations.
643 //uint8_t *trace = (uint8_t *)BigBuf;
644
645 traceLen = 0; // uncommented to fix ISSUE 15 - gerhard - jan2011
646
647 // The DMA buffer, used to stream samples from the FPGA
648 int8_t *dmaBuf = ((int8_t *)BigBuf) + DMA_BUFFER_OFFSET;
649 int lastRxCounter;
650 int8_t *upTo;
651 int smpl;
652 int maxBehindBy = 0;
653
654 // Count of samples received so far, so that we can include timing
655 // information in the trace buffer.
656 int samples = 0;
657 int rsamples = 0;
658
659 memset(trace, 0x44, TRACE_SIZE);
660
661 // Set up the demodulator for tag -> reader responses.
662 Demod.output = receivedResponse;
663 Demod.len = 0;
664 Demod.state = DEMOD_UNSYNCD;
665
666 // Setup for the DMA.
667 FpgaSetupSsc();
668 upTo = dmaBuf;
669 lastRxCounter = DMA_BUFFER_SIZE;
670 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
671
672 // And the reader -> tag commands
673 memset(&Uart, 0, sizeof(Uart));
674 Uart.output = receivedCmd;
675 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
676 Uart.state = STATE_UNSYNCD;
677
678 // And put the FPGA in the appropriate mode
679 // Signal field is off with the appropriate LED
680 LED_D_OFF();
681 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
682 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
683
684
685 // And now we loop, receiving samples.
686 for(;;) {
687 LED_A_ON();
688 WDT_HIT();
689 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
690 (DMA_BUFFER_SIZE-1);
691 if(behindBy > maxBehindBy) {
692 maxBehindBy = behindBy;
693 if(behindBy > 400) {
694 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
695 goto done;
696 }
697 }
698 if(behindBy < 1) continue;
699
700 LED_A_OFF();
701 smpl = upTo[0];
702 upTo++;
703 lastRxCounter -= 1;
704 if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
705 upTo -= DMA_BUFFER_SIZE;
706 lastRxCounter += DMA_BUFFER_SIZE;
707 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
708 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
709 }
710
711 samples += 4;
712 if(MillerDecoding((smpl & 0xF0) >> 4)) {
713 rsamples = samples - Uart.samples;
714 LED_C_ON();
715 if(triggered) {
716 trace[traceLen++] = ((rsamples >> 0) & 0xff);
717 trace[traceLen++] = ((rsamples >> 8) & 0xff);
718 trace[traceLen++] = ((rsamples >> 16) & 0xff);
719 trace[traceLen++] = ((rsamples >> 24) & 0xff);
720 trace[traceLen++] = ((Uart.parityBits >> 0) & 0xff);
721 trace[traceLen++] = ((Uart.parityBits >> 8) & 0xff);
722 trace[traceLen++] = ((Uart.parityBits >> 16) & 0xff);
723 trace[traceLen++] = ((Uart.parityBits >> 24) & 0xff);
724 trace[traceLen++] = Uart.byteCnt;
725 memcpy(trace+traceLen, receivedCmd, Uart.byteCnt);
726 traceLen += Uart.byteCnt;
727 if(traceLen > TRACE_SIZE) break;
728 }
729 /* And ready to receive another command. */
730 Uart.state = STATE_UNSYNCD;
731 /* And also reset the demod code, which might have been */
732 /* false-triggered by the commands from the reader. */
733 Demod.state = DEMOD_UNSYNCD;
734 LED_B_OFF();
735 }
736
737 if(ManchesterDecoding(smpl & 0x0F)) {
738 rsamples = samples - Demod.samples;
739 LED_B_ON();
740
741 // timestamp, as a count of samples
742 trace[traceLen++] = ((rsamples >> 0) & 0xff);
743 trace[traceLen++] = ((rsamples >> 8) & 0xff);
744 trace[traceLen++] = ((rsamples >> 16) & 0xff);
745 trace[traceLen++] = 0x80 | ((rsamples >> 24) & 0xff);
746 trace[traceLen++] = ((Demod.parityBits >> 0) & 0xff);
747 trace[traceLen++] = ((Demod.parityBits >> 8) & 0xff);
748 trace[traceLen++] = ((Demod.parityBits >> 16) & 0xff);
749 trace[traceLen++] = ((Demod.parityBits >> 24) & 0xff);
750 // length
751 trace[traceLen++] = Demod.len;
752 memcpy(trace+traceLen, receivedResponse, Demod.len);
753 traceLen += Demod.len;
754 if(traceLen > TRACE_SIZE) break;
755
756 triggered = TRUE;
757
758 // And ready to receive another response.
759 memset(&Demod, 0, sizeof(Demod));
760 Demod.output = receivedResponse;
761 Demod.state = DEMOD_UNSYNCD;
762 LED_C_OFF();
763 }
764
765 if(BUTTON_PRESS()) {
766 DbpString("cancelled_a");
767 goto done;
768 }
769 }
770
771 DbpString("COMMAND FINISHED");
772
773 done:
774 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
775 Dbprintf("maxBehindBy=%x, Uart.state=%x, Uart.byteCnt=%x", maxBehindBy, Uart.state, Uart.byteCnt);
776 Dbprintf("Uart.byteCntMax=%x, traceLen=%x, Uart.output[0]=%x", Uart.byteCntMax, traceLen, (int)Uart.output[0]);
777 LED_A_OFF();
778 LED_B_OFF();
779 LED_C_OFF();
780 LED_D_OFF();
781 }
782
783 //-----------------------------------------------------------------------------
784 // Prepare tag messages
785 //-----------------------------------------------------------------------------
786 static void CodeIso14443aAsTagPar(const uint8_t *cmd, int len, uint32_t dwParity)
787 {
788 int i;
789
790 ToSendReset();
791
792 // Correction bit, might be removed when not needed
793 ToSendStuffBit(0);
794 ToSendStuffBit(0);
795 ToSendStuffBit(0);
796 ToSendStuffBit(0);
797 ToSendStuffBit(1); // 1
798 ToSendStuffBit(0);
799 ToSendStuffBit(0);
800 ToSendStuffBit(0);
801
802 // Send startbit
803 ToSend[++ToSendMax] = SEC_D;
804
805 for(i = 0; i < len; i++) {
806 int j;
807 uint8_t b = cmd[i];
808
809 // Data bits
810 for(j = 0; j < 8; j++) {
811 if(b & 1) {
812 ToSend[++ToSendMax] = SEC_D;
813 } else {
814 ToSend[++ToSendMax] = SEC_E;
815 }
816 b >>= 1;
817 }
818
819 // Get the parity bit
820 if ((dwParity >> i) & 0x01) {
821 ToSend[++ToSendMax] = SEC_D;
822 } else {
823 ToSend[++ToSendMax] = SEC_E;
824 }
825 }
826
827 // Send stopbit
828 ToSend[++ToSendMax] = SEC_F;
829
830 // Convert from last byte pos to length
831 ToSendMax++;
832 }
833
834 static void CodeIso14443aAsTag(const uint8_t *cmd, int len){
835 CodeIso14443aAsTagPar(cmd, len, GetParity(cmd, len));
836 }
837
838 //-----------------------------------------------------------------------------
839 // This is to send a NACK kind of answer, its only 3 bits, I know it should be 4
840 //-----------------------------------------------------------------------------
841 static void CodeStrangeAnswerAsTag()
842 {
843 int i;
844
845 ToSendReset();
846
847 // Correction bit, might be removed when not needed
848 ToSendStuffBit(0);
849 ToSendStuffBit(0);
850 ToSendStuffBit(0);
851 ToSendStuffBit(0);
852 ToSendStuffBit(1); // 1
853 ToSendStuffBit(0);
854 ToSendStuffBit(0);
855 ToSendStuffBit(0);
856
857 // Send startbit
858 ToSend[++ToSendMax] = SEC_D;
859
860 // 0
861 ToSend[++ToSendMax] = SEC_E;
862
863 // 0
864 ToSend[++ToSendMax] = SEC_E;
865
866 // 1
867 ToSend[++ToSendMax] = SEC_D;
868
869 // Send stopbit
870 ToSend[++ToSendMax] = SEC_F;
871
872 // Flush the buffer in FPGA!!
873 for(i = 0; i < 5; i++) {
874 ToSend[++ToSendMax] = SEC_F;
875 }
876
877 // Convert from last byte pos to length
878 ToSendMax++;
879 }
880
881 static void Code4bitAnswerAsTag(uint8_t cmd)
882 {
883 int i;
884
885 ToSendReset();
886
887 // Correction bit, might be removed when not needed
888 ToSendStuffBit(0);
889 ToSendStuffBit(0);
890 ToSendStuffBit(0);
891 ToSendStuffBit(0);
892 ToSendStuffBit(1); // 1
893 ToSendStuffBit(0);
894 ToSendStuffBit(0);
895 ToSendStuffBit(0);
896
897 // Send startbit
898 ToSend[++ToSendMax] = SEC_D;
899
900 uint8_t b = cmd;
901 for(i = 0; i < 4; i++) {
902 if(b & 1) {
903 ToSend[++ToSendMax] = SEC_D;
904 } else {
905 ToSend[++ToSendMax] = SEC_E;
906 }
907 b >>= 1;
908 }
909
910 // Send stopbit
911 ToSend[++ToSendMax] = SEC_F;
912
913 // Flush the buffer in FPGA!!
914 for(i = 0; i < 5; i++) {
915 ToSend[++ToSendMax] = SEC_F;
916 }
917
918 // Convert from last byte pos to length
919 ToSendMax++;
920 }
921
922 //-----------------------------------------------------------------------------
923 // Wait for commands from reader
924 // Stop when button is pressed
925 // Or return TRUE when command is captured
926 //-----------------------------------------------------------------------------
927 static int GetIso14443aCommandFromReader(uint8_t *received, int *len, int maxLen)
928 {
929 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
930 // only, since we are receiving, not transmitting).
931 // Signal field is off with the appropriate LED
932 LED_D_OFF();
933 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
934
935 // Now run a `software UART' on the stream of incoming samples.
936 Uart.output = received;
937 Uart.byteCntMax = maxLen;
938 Uart.state = STATE_UNSYNCD;
939
940 for(;;) {
941 WDT_HIT();
942
943 if(BUTTON_PRESS()) return FALSE;
944
945 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
946 AT91C_BASE_SSC->SSC_THR = 0x00;
947 }
948 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
949 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
950 if(MillerDecoding((b & 0xf0) >> 4)) {
951 *len = Uart.byteCnt;
952 return TRUE;
953 }
954 if(MillerDecoding(b & 0x0f)) {
955 *len = Uart.byteCnt;
956 return TRUE;
957 }
958 }
959 }
960 }
961 static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, int correctionNeeded);
962
963 //-----------------------------------------------------------------------------
964 // Main loop of simulated tag: receive commands from reader, decide what
965 // response to send, and send it.
966 //-----------------------------------------------------------------------------
967 void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd)
968 {
969 // Enable and clear the trace
970 tracing = TRUE;
971 traceLen = 0;
972 memset(trace, 0x44, TRACE_SIZE);
973
974 // This function contains the tag emulation
975 uint8_t sak;
976
977 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
978 uint8_t response1[2];
979
980 switch (tagType) {
981 case 1: { // MIFARE Classic
982 // Says: I am Mifare 1k - original line
983 response1[0] = 0x04;
984 response1[1] = 0x00;
985 sak = 0x08;
986 } break;
987 case 2: { // MIFARE Ultralight
988 // Says: I am a stupid memory tag, no crypto
989 response1[0] = 0x04;
990 response1[1] = 0x00;
991 sak = 0x00;
992 } break;
993 case 3: { // MIFARE DESFire
994 // Says: I am a DESFire tag, ph33r me
995 response1[0] = 0x04;
996 response1[1] = 0x03;
997 sak = 0x20;
998 } break;
999 case 4: { // ISO/IEC 14443-4
1000 // Says: I am a javacard (JCOP)
1001 response1[0] = 0x04;
1002 response1[1] = 0x00;
1003 sak = 0x28;
1004 } break;
1005 default: {
1006 Dbprintf("Error: unkown tagtype (%d)",tagType);
1007 return;
1008 } break;
1009 }
1010
1011 // The second response contains the (mandatory) first 24 bits of the UID
1012 uint8_t response2[5];
1013
1014 // Check if the uid uses the (optional) part
1015 uint8_t response2a[5];
1016 if (uid_2nd) {
1017 response2[0] = 0x88;
1018 num_to_bytes(uid_1st,3,response2+1);
1019 num_to_bytes(uid_2nd,4,response2a);
1020 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1021
1022 // Configure the ATQA and SAK accordingly
1023 response1[0] |= 0x40;
1024 sak |= 0x04;
1025 } else {
1026 num_to_bytes(uid_1st,4,response2);
1027 // Configure the ATQA and SAK accordingly
1028 response1[0] &= 0xBF;
1029 sak &= 0xFB;
1030 }
1031
1032 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1033 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1034
1035 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1036 uint8_t response3[3];
1037 response3[0] = sak;
1038 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1039
1040 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1041 uint8_t response3a[3];
1042 response3a[0] = sak & 0xFB;
1043 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1044
1045
1046 /*
1047 // Check if the uid uses the (optional) second part
1048 if (uid_2nd) {
1049 // Configure the ATQA and SAK accordingly
1050 response1[0] |= 0x40;
1051 sak |= 0x04;
1052 }
1053 */
1054
1055 //static const uint8_t response2a[] = { 0x51, 0x48, 0x1d, 0x80, 0x84 }; // uid - cascade2 - 2nd half (4 bytes) of UID+ BCCheck
1056
1057
1058 // Prepare protocol messages
1059 // static const uint8_t cmd1[] = { 0x26 };
1060 // static const uint8_t response1[] = { 0x02, 0x00 }; // Says: I am Mifare 4k - original line - greg
1061 //
1062 // uint8_t response1[] = { 0x44, 0x03 }; // Says: I am a DESFire Tag, ph33r me
1063 // static const uint8_t response1[] = { 0x44, 0x00 }; // Says: I am a ULTRALITE Tag, 0wn me
1064
1065 // UID response
1066 // static const uint8_t cmd2[] = { 0x93, 0x20 };
1067 //static const uint8_t response2[] = { 0x9a, 0xe5, 0xe4, 0x43, 0xd8 }; // original value - greg
1068
1069 // my desfire
1070 // uint8_t response2[] = { 0x88, 0x04, 0x21, 0x3f, 0x4d }; // known uid - note cascade (0x88), 2nd byte (0x04) = NXP/Phillips
1071
1072
1073 // When reader selects us during cascade1 it will send cmd3
1074 //uint8_t response3[] = { 0x04, 0x00, 0x00 }; // SAK Select (cascade1) successful response (ULTRALITE)
1075 //uint8_t response3[] = { 0x24, 0x00, 0x00 }; // SAK Select (cascade1) successful response (DESFire)
1076 //ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1077
1078 // send cascade2 2nd half of UID
1079 //static const uint8_t response2a[] = { 0x51, 0x48, 0x1d, 0x80, 0x84 }; // uid - cascade2 - 2nd half (4 bytes) of UID+ BCCheck
1080 // NOTE : THE CRC on the above may be wrong as I have obfuscated the actual UID
1081
1082 // When reader selects us during cascade2 it will send cmd3a
1083 //uint8_t response3a[] = { 0x00, 0x00, 0x00 }; // SAK Select (cascade2) successful response (ULTRALITE)
1084 //uint8_t response3a[] = { 0x20, 0x00, 0x00 }; // SAK Select (cascade2) successful response (DESFire)
1085 //ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1086
1087 static const uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1088
1089 uint8_t *resp;
1090 int respLen;
1091
1092 // Longest possible response will be 16 bytes + 2 CRC = 18 bytes
1093 // This will need
1094 // 144 data bits (18 * 8)
1095 // 18 parity bits
1096 // 2 Start and stop
1097 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
1098 // 1 just for the case
1099 // ----------- +
1100 // 166
1101 //
1102 // 166 bytes, since every bit that needs to be send costs us a byte
1103 //
1104
1105 // Respond with card type
1106 uint8_t *resp1 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
1107 int resp1Len;
1108
1109 // Anticollision cascade1 - respond with uid
1110 uint8_t *resp2 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + 166);
1111 int resp2Len;
1112
1113 // Anticollision cascade2 - respond with 2nd half of uid if asked
1114 // we're only going to be asked if we set the 1st byte of the UID (during cascade1) to 0x88
1115 uint8_t *resp2a = (((uint8_t *)BigBuf) + 1140);
1116 int resp2aLen;
1117
1118 // Acknowledge select - cascade 1
1119 uint8_t *resp3 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*2));
1120 int resp3Len;
1121
1122 // Acknowledge select - cascade 2
1123 uint8_t *resp3a = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*3));
1124 int resp3aLen;
1125
1126 // Response to a read request - not implemented atm
1127 uint8_t *resp4 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*4));
1128 int resp4Len;
1129
1130 // Authenticate response - nonce
1131 uint8_t *resp5 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + (166*5));
1132 int resp5Len;
1133
1134 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
1135 // uint8_t *receivedCmd = (uint8_t *)BigBuf;
1136 int len;
1137
1138 //int i;
1139 //int u;
1140 //uint8_t b;
1141
1142 // To control where we are in the protocol
1143 int order = 0;
1144 int lastorder;
1145
1146 // Just to allow some checks
1147 int happened = 0;
1148 int happened2 = 0;
1149
1150 int cmdsRecvd = 0;
1151 uint8_t* respdata = NULL;
1152 int respsize = 0;
1153 uint8_t nack = 0x04;
1154
1155 //int fdt_indicator;
1156
1157 memset(receivedCmd, 0x44, RECV_CMD_SIZE);
1158
1159 // Prepare the responses of the anticollision phase
1160 // there will be not enough time to do this at the moment the reader sends it REQA
1161
1162 // Answer to request
1163 CodeIso14443aAsTag(response1, sizeof(response1));
1164 memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax;
1165
1166 // Send our UID (cascade 1)
1167 CodeIso14443aAsTag(response2, sizeof(response2));
1168 memcpy(resp2, ToSend, ToSendMax); resp2Len = ToSendMax;
1169
1170 // Answer to select (cascade1)
1171 CodeIso14443aAsTag(response3, sizeof(response3));
1172 memcpy(resp3, ToSend, ToSendMax); resp3Len = ToSendMax;
1173
1174 // Send the cascade 2 2nd part of the uid
1175 CodeIso14443aAsTag(response2a, sizeof(response2a));
1176 memcpy(resp2a, ToSend, ToSendMax); resp2aLen = ToSendMax;
1177
1178 // Answer to select (cascade 2)
1179 CodeIso14443aAsTag(response3a, sizeof(response3a));
1180 memcpy(resp3a, ToSend, ToSendMax); resp3aLen = ToSendMax;
1181
1182 // Strange answer is an example of rare message size (3 bits)
1183 CodeStrangeAnswerAsTag();
1184 memcpy(resp4, ToSend, ToSendMax); resp4Len = ToSendMax;
1185
1186 // Authentication answer (random nonce)
1187 CodeIso14443aAsTag(response5, sizeof(response5));
1188 memcpy(resp5, ToSend, ToSendMax); resp5Len = ToSendMax;
1189
1190 // We need to listen to the high-frequency, peak-detected path.
1191 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1192 FpgaSetupSsc();
1193
1194 cmdsRecvd = 0;
1195
1196 LED_A_ON();
1197 for(;;) {
1198
1199 if(!GetIso14443aCommandFromReader(receivedCmd, &len, RECV_CMD_SIZE)) {
1200 DbpString("button press");
1201 break;
1202 }
1203 // doob - added loads of debug strings so we can see what the reader is saying to us during the sim as hi14alist is not populated
1204 // Okay, look at the command now.
1205 lastorder = order;
1206 //i = 1; // first byte transmitted
1207 if(receivedCmd[0] == 0x26) {
1208 // Received a REQUEST
1209 resp = resp1; respLen = resp1Len; order = 1;
1210 respdata = response1;
1211 respsize = sizeof(response1);
1212 //DbpString("Hello request from reader:");
1213 } else if(receivedCmd[0] == 0x52) {
1214 // Received a WAKEUP
1215 resp = resp1; respLen = resp1Len; order = 6;
1216 // //DbpString("Wakeup request from reader:");
1217 respdata = response1;
1218 respsize = sizeof(response1);
1219 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // greg - cascade 1 anti-collision
1220 // Received request for UID (cascade 1)
1221 resp = resp2; respLen = resp2Len; order = 2;
1222 // DbpString("UID (cascade 1) request from reader:");
1223 // DbpIntegers(receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1224 respdata = response2;
1225 respsize = sizeof(response2);
1226 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] ==0x95) { // greg - cascade 2 anti-collision
1227 // Received request for UID (cascade 2)
1228 resp = resp2a; respLen = resp2aLen; order = 20;
1229 // DbpString("UID (cascade 2) request from reader:");
1230 // DbpIntegers(receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1231 respdata = response2a;
1232 respsize = sizeof(response2a);
1233
1234 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] ==0x93) { // greg - cascade 1 select
1235 // Received a SELECT
1236 resp = resp3; respLen = resp3Len; order = 3;
1237 // DbpString("Select (cascade 1) request from reader:");
1238 // DbpIntegers(receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1239 respdata = response3;
1240 respsize = sizeof(response3);
1241
1242 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] ==0x95) { // greg - cascade 2 select
1243 // Received a SELECT
1244 resp = resp3a; respLen = resp3aLen; order = 30;
1245 // DbpString("Select (cascade 2) request from reader:");
1246 // DbpIntegers(receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1247 respdata = response3a;
1248 respsize = sizeof(response3a);
1249
1250 } else if(receivedCmd[0] == 0x30) {
1251 // Received a READ
1252 resp = resp4; respLen = resp4Len; order = 4; // Do nothing
1253 Dbprintf("Read request from reader: %x %x %x",
1254 receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1255 respdata = &nack;
1256 respsize = sizeof(nack); // 4-bit answer
1257
1258 } else if(receivedCmd[0] == 0x50) {
1259 // Received a HALT
1260 resp = resp1; respLen = 0; order = 5; // Do nothing
1261 DbpString("Reader requested we HALT!:");
1262 respdata = NULL;
1263 respsize = 0;
1264
1265 } else if(receivedCmd[0] == 0x60) {
1266 // Received an authentication request
1267 resp = resp5; respLen = resp5Len; order = 7;
1268 Dbprintf("Authenticate request from reader: %x %x %x",
1269 receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1270 respdata = NULL;
1271 respsize = 0;
1272
1273 } else if(receivedCmd[0] == 0xE0) {
1274 // Received a RATS request
1275 resp = resp1; respLen = 0;order = 70;
1276 Dbprintf("RATS request from reader: %x %x %x",
1277 receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1278 respdata = NULL;
1279 respsize = 0;
1280 } else {
1281 // Never seen this command before
1282 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1283 len,
1284 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1285 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1286 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1287 // Do not respond
1288 resp = resp1; respLen = 0; order = 0;
1289 respdata = NULL;
1290 respsize = 0;
1291 }
1292
1293 // Count number of wakeups received after a halt
1294 if(order == 6 && lastorder == 5) { happened++; }
1295
1296 // Count number of other messages after a halt
1297 if(order != 6 && lastorder == 5) { happened2++; }
1298
1299 // Look at last parity bit to determine timing of answer
1300 if((Uart.parityBits & 0x01) || receivedCmd[0] == 0x52) {
1301 // 1236, so correction bit needed
1302 //i = 0;
1303 }
1304
1305
1306 if(cmdsRecvd > 999) {
1307 DbpString("1000 commands later...");
1308 break;
1309 }
1310 else {
1311 cmdsRecvd++;
1312 }
1313
1314 if(respLen > 0) {
1315 //----------------------------
1316 //u = 0;
1317 //b = 0x00;
1318 //fdt_indicator = FALSE;
1319 EmSendCmd14443aRaw(resp, respLen, receivedCmd[0] == 0x52);
1320 }
1321
1322 if (tracing) {
1323 LogTrace(receivedCmd,len, 0, Uart.parityBits, TRUE);
1324 if (respdata != NULL) {
1325 LogTrace(respdata,respsize, 0, SwapBits(GetParity(respdata,respsize),respsize), FALSE);
1326 }
1327 }
1328
1329 memset(receivedCmd, 0x44, RECV_CMD_SIZE);
1330 /* // Modulate Manchester
1331 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1332 AT91C_BASE_SSC->SSC_THR = 0x00;
1333 FpgaSetupSsc();
1334
1335 // ### Transmit the response ###
1336 u = 0;
1337 b = 0x00;
1338 fdt_indicator = FALSE;
1339 for(;;) {
1340 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1341 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1342 (void)b;
1343 }
1344 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1345 if(i > respLen) {
1346 b = 0x00;
1347 u++;
1348 } else {
1349 b = resp[i];
1350 i++;
1351 }
1352 AT91C_BASE_SSC->SSC_THR = b;
1353
1354 if(u > 4) {
1355 break;
1356 }
1357 }
1358 if(BUTTON_PRESS()) {
1359 break;
1360 }
1361 }
1362 */
1363 }
1364
1365 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1366 LED_A_OFF();
1367 }
1368
1369 //-----------------------------------------------------------------------------
1370 // Transmit the command (to the tag) that was placed in ToSend[].
1371 //-----------------------------------------------------------------------------
1372 static void TransmitFor14443a(const uint8_t *cmd, int len, int *samples, int *wait)
1373 {
1374 int c;
1375
1376 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1377
1378 if (wait)
1379 if(*wait < 10)
1380 *wait = 10;
1381
1382 for(c = 0; c < *wait;) {
1383 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1384 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1385 c++;
1386 }
1387 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1388 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1389 (void)r;
1390 }
1391 WDT_HIT();
1392 }
1393
1394 c = 0;
1395 for(;;) {
1396 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1397 AT91C_BASE_SSC->SSC_THR = cmd[c];
1398 c++;
1399 if(c >= len) {
1400 break;
1401 }
1402 }
1403 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1404 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1405 (void)r;
1406 }
1407 WDT_HIT();
1408 }
1409 if (samples) *samples = (c + *wait) << 3;
1410 }
1411
1412 //-----------------------------------------------------------------------------
1413 // Code a 7-bit command without parity bit
1414 // This is especially for 0x26 and 0x52 (REQA and WUPA)
1415 //-----------------------------------------------------------------------------
1416 void ShortFrameFromReader(const uint8_t bt)
1417 {
1418 int j;
1419 int last;
1420 uint8_t b;
1421
1422 ToSendReset();
1423
1424 // Start of Communication (Seq. Z)
1425 ToSend[++ToSendMax] = SEC_Z;
1426 last = 0;
1427
1428 b = bt;
1429 for(j = 0; j < 7; j++) {
1430 if(b & 1) {
1431 // Sequence X
1432 ToSend[++ToSendMax] = SEC_X;
1433 last = 1;
1434 } else {
1435 if(last == 0) {
1436 // Sequence Z
1437 ToSend[++ToSendMax] = SEC_Z;
1438 }
1439 else {
1440 // Sequence Y
1441 ToSend[++ToSendMax] = SEC_Y;
1442 last = 0;
1443 }
1444 }
1445 b >>= 1;
1446 }
1447
1448 // End of Communication
1449 if(last == 0) {
1450 // Sequence Z
1451 ToSend[++ToSendMax] = SEC_Z;
1452 }
1453 else {
1454 // Sequence Y
1455 ToSend[++ToSendMax] = SEC_Y;
1456 last = 0;
1457 }
1458 // Sequence Y
1459 ToSend[++ToSendMax] = SEC_Y;
1460
1461 // Just to be sure!
1462 ToSend[++ToSendMax] = SEC_Y;
1463 ToSend[++ToSendMax] = SEC_Y;
1464 ToSend[++ToSendMax] = SEC_Y;
1465
1466 // Convert from last character reference to length
1467 ToSendMax++;
1468 }
1469
1470 //-----------------------------------------------------------------------------
1471 // Prepare reader command to send to FPGA
1472 //
1473 //-----------------------------------------------------------------------------
1474 void CodeIso14443aAsReaderPar(const uint8_t * cmd, int len, uint32_t dwParity)
1475 {
1476 int i, j;
1477 int last;
1478 uint8_t b;
1479
1480 ToSendReset();
1481
1482 // Start of Communication (Seq. Z)
1483 ToSend[++ToSendMax] = SEC_Z;
1484 last = 0;
1485
1486 // Generate send structure for the data bits
1487 for (i = 0; i < len; i++) {
1488 // Get the current byte to send
1489 b = cmd[i];
1490
1491 for (j = 0; j < 8; j++) {
1492 if (b & 1) {
1493 // Sequence X
1494 ToSend[++ToSendMax] = SEC_X;
1495 last = 1;
1496 } else {
1497 if (last == 0) {
1498 // Sequence Z
1499 ToSend[++ToSendMax] = SEC_Z;
1500 } else {
1501 // Sequence Y
1502 ToSend[++ToSendMax] = SEC_Y;
1503 last = 0;
1504 }
1505 }
1506 b >>= 1;
1507 }
1508
1509 // Get the parity bit
1510 if ((dwParity >> i) & 0x01) {
1511 // Sequence X
1512 ToSend[++ToSendMax] = SEC_X;
1513 last = 1;
1514 } else {
1515 if (last == 0) {
1516 // Sequence Z
1517 ToSend[++ToSendMax] = SEC_Z;
1518 } else {
1519 // Sequence Y
1520 ToSend[++ToSendMax] = SEC_Y;
1521 last = 0;
1522 }
1523 }
1524 }
1525
1526 // End of Communication
1527 if (last == 0) {
1528 // Sequence Z
1529 ToSend[++ToSendMax] = SEC_Z;
1530 } else {
1531 // Sequence Y
1532 ToSend[++ToSendMax] = SEC_Y;
1533 last = 0;
1534 }
1535 // Sequence Y
1536 ToSend[++ToSendMax] = SEC_Y;
1537
1538 // Just to be sure!
1539 ToSend[++ToSendMax] = SEC_Y;
1540 ToSend[++ToSendMax] = SEC_Y;
1541 ToSend[++ToSendMax] = SEC_Y;
1542
1543 // Convert from last character reference to length
1544 ToSendMax++;
1545 }
1546
1547 //-----------------------------------------------------------------------------
1548 // Wait for commands from reader
1549 // Stop when button is pressed (return 1) or field was gone (return 2)
1550 // Or return 0 when command is captured
1551 //-----------------------------------------------------------------------------
1552 static int EmGetCmd(uint8_t *received, int *len, int maxLen)
1553 {
1554 *len = 0;
1555
1556 uint32_t timer = 0, vtime = 0;
1557 int analogCnt = 0;
1558 int analogAVG = 0;
1559
1560 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1561 // only, since we are receiving, not transmitting).
1562 // Signal field is off with the appropriate LED
1563 LED_D_OFF();
1564 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1565
1566 // Set ADC to read field strength
1567 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1568 AT91C_BASE_ADC->ADC_MR =
1569 ADC_MODE_PRESCALE(32) |
1570 ADC_MODE_STARTUP_TIME(16) |
1571 ADC_MODE_SAMPLE_HOLD_TIME(8);
1572 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1573 // start ADC
1574 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1575
1576 // Now run a 'software UART' on the stream of incoming samples.
1577 Uart.output = received;
1578 Uart.byteCntMax = maxLen;
1579 Uart.state = STATE_UNSYNCD;
1580
1581 for(;;) {
1582 WDT_HIT();
1583
1584 if (BUTTON_PRESS()) return 1;
1585
1586 // test if the field exists
1587 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1588 analogCnt++;
1589 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1590 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1591 if (analogCnt >= 32) {
1592 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1593 vtime = GetTickCount();
1594 if (!timer) timer = vtime;
1595 // 50ms no field --> card to idle state
1596 if (vtime - timer > 50) return 2;
1597 } else
1598 if (timer) timer = 0;
1599 analogCnt = 0;
1600 analogAVG = 0;
1601 }
1602 }
1603 // transmit none
1604 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1605 AT91C_BASE_SSC->SSC_THR = 0x00;
1606 }
1607 // receive and test the miller decoding
1608 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1609 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1610 if(MillerDecoding((b & 0xf0) >> 4)) {
1611 *len = Uart.byteCnt;
1612 if (tracing) LogTrace(received, *len, GetDeltaCountUS(), Uart.parityBits, TRUE);
1613 return 0;
1614 }
1615 if(MillerDecoding(b & 0x0f)) {
1616 *len = Uart.byteCnt;
1617 if (tracing) LogTrace(received, *len, GetDeltaCountUS(), Uart.parityBits, TRUE);
1618 return 0;
1619 }
1620 }
1621 }
1622 }
1623
1624 static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, int correctionNeeded)
1625 {
1626 int i, u = 0;
1627 uint8_t b = 0;
1628
1629 // Modulate Manchester
1630 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1631 AT91C_BASE_SSC->SSC_THR = 0x00;
1632 FpgaSetupSsc();
1633
1634 // include correction bit
1635 i = 1;
1636 if((Uart.parityBits & 0x01) || correctionNeeded) {
1637 // 1236, so correction bit needed
1638 i = 0;
1639 }
1640
1641 // send cycle
1642 for(;;) {
1643 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1644 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1645 (void)b;
1646 }
1647 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1648 if(i > respLen) {
1649 b = 0xff; // was 0x00
1650 u++;
1651 } else {
1652 b = resp[i];
1653 i++;
1654 }
1655 AT91C_BASE_SSC->SSC_THR = b;
1656
1657 if(u > 4) break;
1658 }
1659 if(BUTTON_PRESS()) {
1660 break;
1661 }
1662 }
1663
1664 return 0;
1665 }
1666
1667 int EmSend4bitEx(uint8_t resp, int correctionNeeded){
1668 Code4bitAnswerAsTag(resp);
1669 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1670 if (tracing) LogTrace(&resp, 1, GetDeltaCountUS(), GetParity(&resp, 1), FALSE);
1671 return res;
1672 }
1673
1674 int EmSend4bit(uint8_t resp){
1675 return EmSend4bitEx(resp, 0);
1676 }
1677
1678 int EmSendCmdExPar(uint8_t *resp, int respLen, int correctionNeeded, uint32_t par){
1679 CodeIso14443aAsTagPar(resp, respLen, par);
1680 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1681 if (tracing) LogTrace(resp, respLen, GetDeltaCountUS(), par, FALSE);
1682 return res;
1683 }
1684
1685 int EmSendCmdEx(uint8_t *resp, int respLen, int correctionNeeded){
1686 return EmSendCmdExPar(resp, respLen, correctionNeeded, GetParity(resp, respLen));
1687 }
1688
1689 int EmSendCmd(uint8_t *resp, int respLen){
1690 return EmSendCmdExPar(resp, respLen, 0, GetParity(resp, respLen));
1691 }
1692
1693 int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par){
1694 return EmSendCmdExPar(resp, respLen, 0, par);
1695 }
1696
1697 //-----------------------------------------------------------------------------
1698 // Wait a certain time for tag response
1699 // If a response is captured return TRUE
1700 // If it takes to long return FALSE
1701 //-----------------------------------------------------------------------------
1702 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
1703 {
1704 // buffer needs to be 512 bytes
1705 int c;
1706
1707 // Set FPGA mode to "reader listen mode", no modulation (listen
1708 // only, since we are receiving, not transmitting).
1709 // Signal field is on with the appropriate LED
1710 LED_D_ON();
1711 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1712
1713 // Now get the answer from the card
1714 Demod.output = receivedResponse;
1715 Demod.len = 0;
1716 Demod.state = DEMOD_UNSYNCD;
1717
1718 uint8_t b;
1719 if (elapsed) *elapsed = 0;
1720
1721 c = 0;
1722 for(;;) {
1723 WDT_HIT();
1724
1725 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1726 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1727 if (elapsed) (*elapsed)++;
1728 }
1729 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1730 if(c < iso14a_timeout) { c++; } else { return FALSE; }
1731 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1732 if(ManchesterDecoding((b>>4) & 0xf)) {
1733 *samples = ((c - 1) << 3) + 4;
1734 return TRUE;
1735 }
1736 if(ManchesterDecoding(b & 0x0f)) {
1737 *samples = c << 3;
1738 return TRUE;
1739 }
1740 }
1741 }
1742 }
1743
1744 void ReaderTransmitShort(const uint8_t* bt)
1745 {
1746 int wait = 0;
1747 int samples = 0;
1748
1749 ShortFrameFromReader(*bt);
1750
1751 // Select the card
1752 TransmitFor14443a(ToSend, ToSendMax, &samples, &wait);
1753
1754 // Store reader command in buffer
1755 if (tracing) LogTrace(bt,1,0,GetParity(bt,1),TRUE);
1756 }
1757
1758 void ReaderTransmitPar(uint8_t* frame, int len, uint32_t par)
1759 {
1760 int wait = 0;
1761 int samples = 0;
1762
1763 // This is tied to other size changes
1764 // uint8_t* frame_addr = ((uint8_t*)BigBuf) + 2024;
1765 CodeIso14443aAsReaderPar(frame,len,par);
1766
1767 // Select the card
1768 TransmitFor14443a(ToSend, ToSendMax, &samples, &wait);
1769 if(trigger)
1770 LED_A_ON();
1771
1772 // Store reader command in buffer
1773 if (tracing) LogTrace(frame,len,0,par,TRUE);
1774 }
1775
1776
1777 void ReaderTransmit(uint8_t* frame, int len)
1778 {
1779 // Generate parity and redirect
1780 ReaderTransmitPar(frame,len,GetParity(frame,len));
1781 }
1782
1783 int ReaderReceive(uint8_t* receivedAnswer)
1784 {
1785 int samples = 0;
1786 if (!GetIso14443aAnswerFromTag(receivedAnswer,160,&samples,0)) return FALSE;
1787 if (tracing) LogTrace(receivedAnswer,Demod.len,samples,Demod.parityBits,FALSE);
1788 if(samples == 0) return FALSE;
1789 return Demod.len;
1790 }
1791
1792 int ReaderReceivePar(uint8_t* receivedAnswer, uint32_t * parptr)
1793 {
1794 int samples = 0;
1795 if (!GetIso14443aAnswerFromTag(receivedAnswer,160,&samples,0)) return FALSE;
1796 if (tracing) LogTrace(receivedAnswer,Demod.len,samples,Demod.parityBits,FALSE);
1797 *parptr = Demod.parityBits;
1798 if(samples == 0) return FALSE;
1799 return Demod.len;
1800 }
1801
1802 /* performs iso14443a anticolision procedure
1803 * fills the uid pointer unless NULL
1804 * fills resp_data unless NULL */
1805 int iso14443a_select_card(uint8_t * uid_ptr, iso14a_card_select_t * resp_data, uint32_t * cuid_ptr) {
1806 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1807 uint8_t sel_all[] = { 0x93,0x20 };
1808 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
1809 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1810
1811 uint8_t* resp = (((uint8_t *)BigBuf) + 3560); // was 3560 - tied to other size changes
1812
1813 uint8_t sak = 0x04; // cascade uid
1814 int cascade_level = 0;
1815
1816 int len;
1817
1818 // clear uid
1819 memset(uid_ptr, 0, 8);
1820
1821 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1822 ReaderTransmitShort(wupa);
1823 // Receive the ATQA
1824 if(!ReaderReceive(resp)) return 0;
1825
1826 if(resp_data)
1827 memcpy(resp_data->atqa, resp, 2);
1828
1829 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1830 // which case we need to make a cascade 2 request and select - this is a long UID
1831 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1832 for(; sak & 0x04; cascade_level++)
1833 {
1834 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1835 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1836
1837 // SELECT_ALL
1838 ReaderTransmit(sel_all,sizeof(sel_all));
1839 if (!ReaderReceive(resp)) return 0;
1840 if(uid_ptr) memcpy(uid_ptr + cascade_level*4, resp, 4);
1841
1842 // calculate crypto UID
1843 if(cuid_ptr) *cuid_ptr = bytes_to_num(resp, 4);
1844
1845 // Construct SELECT UID command
1846 memcpy(sel_uid+2,resp,5);
1847 AppendCrc14443a(sel_uid,7);
1848 ReaderTransmit(sel_uid,sizeof(sel_uid));
1849
1850 // Receive the SAK
1851 if (!ReaderReceive(resp)) return 0;
1852 sak = resp[0];
1853 }
1854 if(resp_data) {
1855 resp_data->sak = sak;
1856 resp_data->ats_len = 0;
1857 }
1858 //-- this byte not UID, it CT. http://www.nxp.com/documents/application_note/AN10927.pdf page 3
1859 if (uid_ptr[0] == 0x88) {
1860 memcpy(uid_ptr, uid_ptr + 1, 7);
1861 uid_ptr[7] = 0;
1862 }
1863
1864 if( (sak & 0x20) == 0)
1865 return 2; // non iso14443a compliant tag
1866
1867 // Request for answer to select
1868 if(resp_data) { // JCOP cards - if reader sent RATS then there is no MIFARE session at all!!!
1869 AppendCrc14443a(rats, 2);
1870 ReaderTransmit(rats, sizeof(rats));
1871
1872 if (!(len = ReaderReceive(resp))) return 0;
1873
1874 memcpy(resp_data->ats, resp, sizeof(resp_data->ats));
1875 resp_data->ats_len = len;
1876 }
1877
1878 return 1;
1879 }
1880
1881 void iso14443a_setup() {
1882 // Setup SSC
1883 FpgaSetupSsc();
1884 // Start from off (no field generated)
1885 // Signal field is off with the appropriate LED
1886 LED_D_OFF();
1887 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1888 SpinDelay(200);
1889
1890 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1891
1892 // Now give it time to spin up.
1893 // Signal field is on with the appropriate LED
1894 LED_D_ON();
1895 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1896 SpinDelay(200);
1897
1898 iso14a_timeout = 2048; //default
1899 }
1900
1901 int iso14_apdu(uint8_t * cmd, size_t cmd_len, void * data) {
1902 uint8_t real_cmd[cmd_len+4];
1903 real_cmd[0] = 0x0a; //I-Block
1904 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1905 memcpy(real_cmd+2, cmd, cmd_len);
1906 AppendCrc14443a(real_cmd,cmd_len+2);
1907
1908 ReaderTransmit(real_cmd, cmd_len+4);
1909 size_t len = ReaderReceive(data);
1910 if(!len)
1911 return -1; //DATA LINK ERROR
1912
1913 return len;
1914 }
1915
1916
1917 //-----------------------------------------------------------------------------
1918 // Read an ISO 14443a tag. Send out commands and store answers.
1919 //
1920 //-----------------------------------------------------------------------------
1921 void ReaderIso14443a(UsbCommand * c, UsbCommand * ack)
1922 {
1923 iso14a_command_t param = c->arg[0];
1924 uint8_t * cmd = c->d.asBytes;
1925 size_t len = c->arg[1];
1926
1927 if(param & ISO14A_REQUEST_TRIGGER) iso14a_set_trigger(1);
1928
1929 if(param & ISO14A_CONNECT) {
1930 iso14443a_setup();
1931 ack->arg[0] = iso14443a_select_card(ack->d.asBytes, (iso14a_card_select_t *) (ack->d.asBytes+12), NULL);
1932 UsbSendPacket((void *)ack, sizeof(UsbCommand));
1933 }
1934
1935 if(param & ISO14A_SET_TIMEOUT) {
1936 iso14a_timeout = c->arg[2];
1937 }
1938
1939 if(param & ISO14A_SET_TIMEOUT) {
1940 iso14a_timeout = c->arg[2];
1941 }
1942
1943 if(param & ISO14A_APDU) {
1944 ack->arg[0] = iso14_apdu(cmd, len, ack->d.asBytes);
1945 UsbSendPacket((void *)ack, sizeof(UsbCommand));
1946 }
1947
1948 if(param & ISO14A_RAW) {
1949 if(param & ISO14A_APPEND_CRC) {
1950 AppendCrc14443a(cmd,len);
1951 len += 2;
1952 }
1953 ReaderTransmit(cmd,len);
1954 ack->arg[0] = ReaderReceive(ack->d.asBytes);
1955 UsbSendPacket((void *)ack, sizeof(UsbCommand));
1956 }
1957
1958 if(param & ISO14A_REQUEST_TRIGGER) iso14a_set_trigger(0);
1959
1960 if(param & ISO14A_NO_DISCONNECT)
1961 return;
1962
1963 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1964 LEDsoff();
1965 }
1966 //-----------------------------------------------------------------------------
1967 // Read an ISO 14443a tag. Send out commands and store answers.
1968 //
1969 //-----------------------------------------------------------------------------
1970 void ReaderMifare(uint32_t parameter)
1971 {
1972 // Mifare AUTH
1973 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
1974 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
1975
1976 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + 3560); // was 3560 - tied to other size changes
1977 traceLen = 0;
1978 tracing = false;
1979
1980 iso14443a_setup();
1981
1982 LED_A_ON();
1983 LED_B_OFF();
1984 LED_C_OFF();
1985
1986 byte_t nt_diff = 0;
1987 LED_A_OFF();
1988 byte_t par = 0;
1989 //byte_t par_mask = 0xff;
1990 byte_t par_low = 0;
1991 int led_on = TRUE;
1992 uint8_t uid[8];
1993 uint32_t cuid;
1994
1995 tracing = FALSE;
1996 byte_t nt[4] = {0,0,0,0};
1997 byte_t nt_attacked[4], nt_noattack[4];
1998 byte_t par_list[8] = {0,0,0,0,0,0,0,0};
1999 byte_t ks_list[8] = {0,0,0,0,0,0,0,0};
2000 num_to_bytes(parameter, 4, nt_noattack);
2001 int isOK = 0, isNULL = 0;
2002
2003 while(TRUE)
2004 {
2005 LED_C_ON();
2006 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2007 SpinDelay(200);
2008 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
2009 LED_C_OFF();
2010
2011 // Test if the action was cancelled
2012 if(BUTTON_PRESS()) {
2013 break;
2014 }
2015
2016 if(!iso14443a_select_card(uid, NULL, &cuid)) continue;
2017
2018 // Transmit MIFARE_CLASSIC_AUTH
2019 ReaderTransmit(mf_auth, sizeof(mf_auth));
2020
2021 // Receive the (16 bit) "random" nonce
2022 if (!ReaderReceive(receivedAnswer)) continue;
2023 memcpy(nt, receivedAnswer, 4);
2024
2025 // Transmit reader nonce and reader answer
2026 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar),par);
2027
2028 // Receive 4 bit answer
2029 if (ReaderReceive(receivedAnswer))
2030 {
2031 if ( (parameter != 0) && (memcmp(nt, nt_noattack, 4) == 0) ) continue;
2032
2033 isNULL = (nt_attacked[0] == 0) && (nt_attacked[1] == 0) && (nt_attacked[2] == 0) && (nt_attacked[3] == 0);
2034 if ( (isNULL != 0 ) && (memcmp(nt, nt_attacked, 4) != 0) ) continue;
2035
2036 if (nt_diff == 0)
2037 {
2038 LED_A_ON();
2039 memcpy(nt_attacked, nt, 4);
2040 //par_mask = 0xf8;
2041 par_low = par & 0x07;
2042 }
2043
2044 led_on = !led_on;
2045 if(led_on) LED_B_ON(); else LED_B_OFF();
2046 par_list[nt_diff] = par;
2047 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2048
2049 // Test if the information is complete
2050 if (nt_diff == 0x07) {
2051 isOK = 1;
2052 break;
2053 }
2054
2055 nt_diff = (nt_diff + 1) & 0x07;
2056 mf_nr_ar[3] = nt_diff << 5;
2057 par = par_low;
2058 } else {
2059 if (nt_diff == 0)
2060 {
2061 par++;
2062 } else {
2063 par = (((par >> 3) + 1) << 3) | par_low;
2064 }
2065 }
2066 }
2067
2068 LogTrace(nt, 4, 0, GetParity(nt, 4), TRUE);
2069 LogTrace(par_list, 8, 0, GetParity(par_list, 8), TRUE);
2070 LogTrace(ks_list, 8, 0, GetParity(ks_list, 8), TRUE);
2071
2072 UsbCommand ack = {CMD_ACK, {isOK, 0, 0}};
2073 memcpy(ack.d.asBytes + 0, uid, 4);
2074 memcpy(ack.d.asBytes + 4, nt, 4);
2075 memcpy(ack.d.asBytes + 8, par_list, 8);
2076 memcpy(ack.d.asBytes + 16, ks_list, 8);
2077
2078 LED_B_ON();
2079 UsbSendPacket((uint8_t *)&ack, sizeof(UsbCommand));
2080 LED_B_OFF();
2081
2082 // Thats it...
2083 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2084 LEDsoff();
2085 tracing = TRUE;
2086
2087 if (MF_DBGLEVEL >= 1) DbpString("COMMAND mifare FINISHED");
2088 }
2089
2090
2091 //-----------------------------------------------------------------------------
2092 // MIFARE 1K simulate.
2093 //
2094 //-----------------------------------------------------------------------------
2095 void Mifare1ksim(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
2096 {
2097 int cardSTATE = MFEMUL_NOFIELD;
2098 int _7BUID = 0;
2099 int vHf = 0; // in mV
2100 //int nextCycleTimeout = 0;
2101 int res;
2102 // uint32_t timer = 0;
2103 uint32_t selTimer = 0;
2104 uint32_t authTimer = 0;
2105 uint32_t par = 0;
2106 int len = 0;
2107 uint8_t cardWRBL = 0;
2108 uint8_t cardAUTHSC = 0;
2109 uint8_t cardAUTHKEY = 0xff; // no authentication
2110 //uint32_t cardRn = 0;
2111 uint32_t cardRr = 0;
2112 uint32_t cuid = 0;
2113 //uint32_t rn_enc = 0;
2114 uint32_t ans = 0;
2115 uint32_t cardINTREG = 0;
2116 uint8_t cardINTBLOCK = 0;
2117 struct Crypto1State mpcs = {0, 0};
2118 struct Crypto1State *pcs;
2119 pcs = &mpcs;
2120
2121 uint8_t* receivedCmd = eml_get_bigbufptr_recbuf();
2122 uint8_t *response = eml_get_bigbufptr_sendbuf();
2123
2124 static uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2125
2126 static uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2127 static uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2128
2129 static uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2130 static uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2131
2132 static uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2133 // static uint8_t rAUTH_NT[] = {0x1a, 0xac, 0xff, 0x4f};
2134 static uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2135
2136 // clear trace
2137 traceLen = 0;
2138 tracing = true;
2139
2140 // Authenticate response - nonce
2141 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2142
2143 // get UID from emul memory
2144 emlGetMemBt(receivedCmd, 7, 1);
2145 _7BUID = !(receivedCmd[0] == 0x00);
2146 if (!_7BUID) { // ---------- 4BUID
2147 rATQA[0] = 0x04;
2148
2149 emlGetMemBt(rUIDBCC1, 0, 4);
2150 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2151 } else { // ---------- 7BUID
2152 rATQA[0] = 0x44;
2153
2154 rUIDBCC1[0] = 0x88;
2155 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2156 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2157 emlGetMemBt(rUIDBCC2, 3, 4);
2158 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2159 }
2160
2161 // -------------------------------------- test area
2162
2163 // -------------------------------------- END test area
2164 // start mkseconds counter
2165 StartCountUS();
2166
2167 // We need to listen to the high-frequency, peak-detected path.
2168 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
2169 FpgaSetupSsc();
2170
2171 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2172 SpinDelay(200);
2173
2174 if (MF_DBGLEVEL >= 1) Dbprintf("Started. 7buid=%d", _7BUID);
2175 // calibrate mkseconds counter
2176 GetDeltaCountUS();
2177 while (true) {
2178 WDT_HIT();
2179
2180 if(BUTTON_PRESS()) {
2181 break;
2182 }
2183
2184 // find reader field
2185 // Vref = 3300mV, and an 10:1 voltage divider on the input
2186 // can measure voltages up to 33000 mV
2187 if (cardSTATE == MFEMUL_NOFIELD) {
2188 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2189 if (vHf > MF_MINFIELDV) {
2190 cardSTATE_TO_IDLE();
2191 LED_A_ON();
2192 }
2193 }
2194
2195 if (cardSTATE != MFEMUL_NOFIELD) {
2196 res = EmGetCmd(receivedCmd, &len, RECV_CMD_SIZE); // (+ nextCycleTimeout)
2197 if (res == 2) {
2198 cardSTATE = MFEMUL_NOFIELD;
2199 LEDsoff();
2200 continue;
2201 }
2202 if(res) break;
2203 }
2204
2205 //nextCycleTimeout = 0;
2206
2207 // if (len) Dbprintf("len:%d cmd: %02x %02x %02x %02x", len, receivedCmd[0], receivedCmd[1], receivedCmd[2], receivedCmd[3]);
2208
2209 if (len != 4 && cardSTATE != MFEMUL_NOFIELD) { // len != 4 <---- speed up the code 4 authentication
2210 // REQ or WUP request in ANY state and WUP in HALTED state
2211 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2212 selTimer = GetTickCount();
2213 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2214 cardSTATE = MFEMUL_SELECT1;
2215
2216 // init crypto block
2217 LED_B_OFF();
2218 LED_C_OFF();
2219 crypto1_destroy(pcs);
2220 cardAUTHKEY = 0xff;
2221 }
2222 }
2223
2224 switch (cardSTATE) {
2225 case MFEMUL_NOFIELD:{
2226 break;
2227 }
2228 case MFEMUL_HALTED:{
2229 break;
2230 }
2231 case MFEMUL_IDLE:{
2232 break;
2233 }
2234 case MFEMUL_SELECT1:{
2235 // select all
2236 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2237 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2238 break;
2239 }
2240
2241 // select card
2242 if (len == 9 &&
2243 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2244 if (!_7BUID)
2245 EmSendCmd(rSAK, sizeof(rSAK));
2246 else
2247 EmSendCmd(rSAK1, sizeof(rSAK1));
2248
2249 cuid = bytes_to_num(rUIDBCC1, 4);
2250 if (!_7BUID) {
2251 cardSTATE = MFEMUL_WORK;
2252 LED_B_ON();
2253 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2254 break;
2255 } else {
2256 cardSTATE = MFEMUL_SELECT2;
2257 break;
2258 }
2259 }
2260
2261 break;
2262 }
2263 case MFEMUL_SELECT2:{
2264 if (!len) break;
2265
2266 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2267 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2268 break;
2269 }
2270
2271 // select 2 card
2272 if (len == 9 &&
2273 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2274 EmSendCmd(rSAK, sizeof(rSAK));
2275
2276 cuid = bytes_to_num(rUIDBCC2, 4);
2277 cardSTATE = MFEMUL_WORK;
2278 LED_B_ON();
2279 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2280 break;
2281 }
2282
2283 // i guess there is a command). go into the work state.
2284 if (len != 4) break;
2285 cardSTATE = MFEMUL_WORK;
2286 goto lbWORK;
2287 }
2288 case MFEMUL_AUTH1:{
2289 if (len == 8) {
2290 // --- crypto
2291 //rn_enc = bytes_to_num(receivedCmd, 4);
2292 //cardRn = rn_enc ^ crypto1_word(pcs, rn_enc , 1);
2293 cardRr = bytes_to_num(&receivedCmd[4], 4) ^ crypto1_word(pcs, 0, 0);
2294 // test if auth OK
2295 if (cardRr != prng_successor(nonce, 64)){
2296 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED. cardRr=%08x, succ=%08x", cardRr, prng_successor(nonce, 64));
2297 cardSTATE_TO_IDLE();
2298 break;
2299 }
2300 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2301 num_to_bytes(ans, 4, rAUTH_AT);
2302 // --- crypto
2303 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2304 cardSTATE = MFEMUL_AUTH2;
2305 } else {
2306 cardSTATE_TO_IDLE();
2307 }
2308 if (cardSTATE != MFEMUL_AUTH2) break;
2309 }
2310 case MFEMUL_AUTH2:{
2311 LED_C_ON();
2312 cardSTATE = MFEMUL_WORK;
2313 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED. sec=%d, key=%d time=%d", cardAUTHSC, cardAUTHKEY, GetTickCount() - authTimer);
2314 break;
2315 }
2316 case MFEMUL_WORK:{
2317 lbWORK: if (len == 0) break;
2318
2319 if (cardAUTHKEY == 0xff) {
2320 // first authentication
2321 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2322 authTimer = GetTickCount();
2323
2324 cardAUTHSC = receivedCmd[1] / 4; // received block num
2325 cardAUTHKEY = receivedCmd[0] - 0x60;
2326
2327 // --- crypto
2328 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2329 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2330 num_to_bytes(nonce, 4, rAUTH_AT);
2331 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2332 // --- crypto
2333
2334 // last working revision
2335 // EmSendCmd14443aRaw(resp1, resp1Len, 0);
2336 // LogTrace(NULL, 0, GetDeltaCountUS(), 0, true);
2337
2338 cardSTATE = MFEMUL_AUTH1;
2339 //nextCycleTimeout = 10;
2340 break;
2341 }
2342 } else {
2343 // decrypt seqence
2344 mf_crypto1_decrypt(pcs, receivedCmd, len);
2345
2346 // nested authentication
2347 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2348 authTimer = GetTickCount();
2349
2350 cardAUTHSC = receivedCmd[1] / 4; // received block num
2351 cardAUTHKEY = receivedCmd[0] - 0x60;
2352
2353 // --- crypto
2354 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2355 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2356 num_to_bytes(ans, 4, rAUTH_AT);
2357 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2358 // --- crypto
2359
2360 cardSTATE = MFEMUL_AUTH1;
2361 //nextCycleTimeout = 10;
2362 break;
2363 }
2364 }
2365
2366 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2367 // BUT... ACK --> NACK
2368 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2369 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2370 break;
2371 }
2372
2373 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2374 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2375 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2376 break;
2377 }
2378
2379 // read block
2380 if (len == 4 && receivedCmd[0] == 0x30) {
2381 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
2382 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2383 break;
2384 }
2385 emlGetMem(response, receivedCmd[1], 1);
2386 AppendCrc14443a(response, 16);
2387 mf_crypto1_encrypt(pcs, response, 18, &par);
2388 EmSendCmdPar(response, 18, par);
2389 break;
2390 }
2391
2392 // write block
2393 if (len == 4 && receivedCmd[0] == 0xA0) {
2394 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
2395 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2396 break;
2397 }
2398 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2399 //nextCycleTimeout = 50;
2400 cardSTATE = MFEMUL_WRITEBL2;
2401 cardWRBL = receivedCmd[1];
2402 break;
2403 }
2404
2405 // works with cardINTREG
2406
2407 // increment, decrement, restore
2408 if (len == 4 && (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2)) {
2409 if (receivedCmd[1] >= 16 * 4 ||
2410 receivedCmd[1] / 4 != cardAUTHSC ||
2411 emlCheckValBl(receivedCmd[1])) {
2412 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2413 break;
2414 }
2415 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2416 if (receivedCmd[0] == 0xC1)
2417 cardSTATE = MFEMUL_INTREG_INC;
2418 if (receivedCmd[0] == 0xC0)
2419 cardSTATE = MFEMUL_INTREG_DEC;
2420 if (receivedCmd[0] == 0xC2)
2421 cardSTATE = MFEMUL_INTREG_REST;
2422 cardWRBL = receivedCmd[1];
2423
2424 break;
2425 }
2426
2427
2428 // transfer
2429 if (len == 4 && receivedCmd[0] == 0xB0) {
2430 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
2431 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2432 break;
2433 }
2434
2435 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2436 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2437 else
2438 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2439
2440 break;
2441 }
2442
2443 // halt
2444 if (len == 4 && (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00)) {
2445 LED_B_OFF();
2446 LED_C_OFF();
2447 cardSTATE = MFEMUL_HALTED;
2448 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2449 break;
2450 }
2451
2452 // command not allowed
2453 if (len == 4) {
2454 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2455 break;
2456 }
2457
2458 // case break
2459 break;
2460 }
2461 case MFEMUL_WRITEBL2:{
2462 if (len == 18){
2463 mf_crypto1_decrypt(pcs, receivedCmd, len);
2464 emlSetMem(receivedCmd, cardWRBL, 1);
2465 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2466 cardSTATE = MFEMUL_WORK;
2467 break;
2468 } else {
2469 cardSTATE_TO_IDLE();
2470 break;
2471 }
2472 break;
2473 }
2474
2475 case MFEMUL_INTREG_INC:{
2476 mf_crypto1_decrypt(pcs, receivedCmd, len);
2477 memcpy(&ans, receivedCmd, 4);
2478 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2479 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2480 cardSTATE_TO_IDLE();
2481 break;
2482 }
2483 cardINTREG = cardINTREG + ans;
2484 cardSTATE = MFEMUL_WORK;
2485 break;
2486 }
2487 case MFEMUL_INTREG_DEC:{
2488 mf_crypto1_decrypt(pcs, receivedCmd, len);
2489 memcpy(&ans, receivedCmd, 4);
2490 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2491 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2492 cardSTATE_TO_IDLE();
2493 break;
2494 }
2495 cardINTREG = cardINTREG - ans;
2496 cardSTATE = MFEMUL_WORK;
2497 break;
2498 }
2499 case MFEMUL_INTREG_REST:{
2500 mf_crypto1_decrypt(pcs, receivedCmd, len);
2501 memcpy(&ans, receivedCmd, 4);
2502 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2503 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2504 cardSTATE_TO_IDLE();
2505 break;
2506 }
2507 cardSTATE = MFEMUL_WORK;
2508 break;
2509 }
2510
2511 }
2512
2513 }
2514
2515 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2516 LEDsoff();
2517
2518 // add trace trailer
2519 memset(rAUTH_NT, 0x44, 4);
2520 LogTrace(rAUTH_NT, 4, 0, 0, TRUE);
2521
2522 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
2523 }
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