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1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
3 // Modified by Greg Jones, Jan 2009
4 // Modified by Adrian Dabrowski "atrox", Mar-Sept 2010,Oct 2011
5 // Modified by piwi, Oct 2018
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support ISO 15693. This includes both the reader software and
12 // the `fake tag' modes.
13 //-----------------------------------------------------------------------------
14
15 // The ISO 15693 describes two transmission modes from reader to tag, and four
16 // transmission modes from tag to reader. As of Oct 2018 this code supports
17 // both reader modes and the high speed variant with one subcarrier from card to reader.
18 // As long as the card fully support ISO 15693 this is no problem, since the
19 // reader chooses both data rates, but some non-standard tags do not.
20 // For card simulation, the code supports both high and low speed modes with one subcarrier.
21 //
22 // VCD (reader) -> VICC (tag)
23 // 1 out of 256:
24 // data rate: 1,66 kbit/s (fc/8192)
25 // used for long range
26 // 1 out of 4:
27 // data rate: 26,48 kbit/s (fc/512)
28 // used for short range, high speed
29 //
30 // VICC (tag) -> VCD (reader)
31 // Modulation:
32 // ASK / one subcarrier (423,75 khz)
33 // FSK / two subcarriers (423,75 khz && 484,28 khz)
34 // Data Rates / Modes:
35 // low ASK: 6,62 kbit/s
36 // low FSK: 6.67 kbit/s
37 // high ASK: 26,48 kbit/s
38 // high FSK: 26,69 kbit/s
39 //-----------------------------------------------------------------------------
40
41
42 // Random Remarks:
43 // *) UID is always used "transmission order" (LSB), which is reverse to display order
44
45 // TODO / BUGS / ISSUES:
46 // *) signal decoding is unable to detect collisions.
47 // *) add anti-collision support for inventory-commands
48 // *) read security status of a block
49 // *) sniffing and simulation do not support two subcarrier modes.
50 // *) remove or refactor code under "deprecated"
51 // *) document all the functions
52
53 #include "iso15693.h"
54
55 #include "proxmark3.h"
56 #include "util.h"
57 #include "apps.h"
58 #include "string.h"
59 #include "iso15693tools.h"
60 #include "protocols.h"
61 #include "cmd.h"
62 #include "BigBuf.h"
63 #include "fpgaloader.h"
64
65 #define arraylen(x) (sizeof(x)/sizeof((x)[0]))
66
67 // Delays in SSP_CLK ticks.
68 // SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
69 #define DELAY_READER_TO_ARM 8
70 #define DELAY_ARM_TO_READER 0
71 //SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader. All values should be multiples of 16
72 #define DELAY_ARM_TO_TAG 16
73 #define DELAY_TAG_TO_ARM 32
74 //SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when snooping. All values should be multiples of 16
75 #define DELAY_TAG_TO_ARM_SNOOP 32
76 #define DELAY_READER_TO_ARM_SNOOP 32
77
78 static int DEBUG = 0;
79
80
81 ///////////////////////////////////////////////////////////////////////
82 // ISO 15693 Part 2 - Air Interface
83 // This section basically contains transmission and receiving of bits
84 ///////////////////////////////////////////////////////////////////////
85
86 // buffers
87 #define ISO15693_DMA_BUFFER_SIZE 128 // must be a power of 2
88 #define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
89 #define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
90
91
92 // specific LogTrace function for ISO15693: the duration needs to be scaled because otherwise it won't fit into a uint16_t
93 bool LogTrace_ISO15693(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag) {
94 uint32_t duration = timestamp_end - timestamp_start;
95 duration /= 32;
96 timestamp_end = timestamp_start + duration;
97 return LogTrace(btBytes, iLen, timestamp_start, timestamp_end, parity, readerToTag);
98 }
99
100
101 // ---------------------------
102 // Signal Processing
103 // ---------------------------
104
105 // prepare data using "1 out of 4" code for later transmission
106 // resulting data rate is 26.48 kbit/s (fc/512)
107 // cmd ... data
108 // n ... length of data
109 void CodeIso15693AsReader(uint8_t *cmd, int n) {
110
111 ToSendReset();
112
113 // SOF for 1of4
114 ToSend[++ToSendMax] = 0x84; //10000100
115
116 // data
117 for (int i = 0; i < n; i++) {
118 for (int j = 0; j < 8; j += 2) {
119 int these = (cmd[i] >> j) & 0x03;
120 switch(these) {
121 case 0:
122 ToSend[++ToSendMax] = 0x40; //01000000
123 break;
124 case 1:
125 ToSend[++ToSendMax] = 0x10; //00010000
126 break;
127 case 2:
128 ToSend[++ToSendMax] = 0x04; //00000100
129 break;
130 case 3:
131 ToSend[++ToSendMax] = 0x01; //00000001
132 break;
133 }
134 }
135 }
136
137 // EOF
138 ToSend[++ToSendMax] = 0x20; //0010 + 0000 padding
139
140 ToSendMax++;
141 }
142
143 // encode data using "1 out of 256" scheme
144 // data rate is 1,66 kbit/s (fc/8192)
145 // is designed for more robust communication over longer distances
146 static void CodeIso15693AsReader256(uint8_t *cmd, int n)
147 {
148 ToSendReset();
149
150 // SOF for 1of256
151 ToSend[++ToSendMax] = 0x81; //10000001
152
153 // data
154 for(int i = 0; i < n; i++) {
155 for (int j = 0; j <= 255; j++) {
156 if (cmd[i] == j) {
157 ToSendStuffBit(0);
158 ToSendStuffBit(1);
159 } else {
160 ToSendStuffBit(0);
161 ToSendStuffBit(0);
162 }
163 }
164 }
165
166 // EOF
167 ToSend[++ToSendMax] = 0x20; //0010 + 0000 padding
168
169 ToSendMax++;
170 }
171
172
173 // static uint8_t encode4Bits(const uint8_t b) {
174 // uint8_t c = b & 0xF;
175 // // OTA, the least significant bits first
176 // // The columns are
177 // // 1 - Bit value to send
178 // // 2 - Reversed (big-endian)
179 // // 3 - Manchester Encoded
180 // // 4 - Hex values
181
182 // switch(c){
183 // // 1 2 3 4
184 // case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
185 // case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
186 // case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
187 // case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
188 // case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
189 // case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
190 // case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
191 // case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
192 // case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
193 // case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
194 // case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
195 // case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
196 // case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
197 // case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
198 // case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
199 // default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
200
201 // }
202 // }
203
204 static const uint8_t encode_4bits[16] = { 0xaa, 0x6a, 0x9a, 0x5a, 0xa6, 0x66, 0x96, 0x56, 0xa9, 0x69, 0x99, 0x59, 0xa5, 0x65, 0x95, 0x55 };
205
206 void CodeIso15693AsTag(uint8_t *cmd, size_t len) {
207 /*
208 * SOF comprises 3 parts;
209 * * An unmodulated time of 56.64 us
210 * * 24 pulses of 423.75 kHz (fc/32)
211 * * A logic 1, which starts with an unmodulated time of 18.88us
212 * followed by 8 pulses of 423.75kHz (fc/32)
213 *
214 * EOF comprises 3 parts:
215 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
216 * time of 18.88us.
217 * - 24 pulses of fc/32
218 * - An unmodulated time of 56.64 us
219 *
220 * A logic 0 starts with 8 pulses of fc/32
221 * followed by an unmodulated time of 256/fc (~18,88us).
222 *
223 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
224 * 8 pulses of fc/32 (also 18.88us)
225 *
226 * A bit here becomes 8 pulses of fc/32. Therefore:
227 * The SOF can be written as 00011101 = 0x1D
228 * The EOF can be written as 10111000 = 0xb8
229 * A logic 1 is 01
230 * A logic 0 is 10
231 *
232 * */
233
234 ToSendReset();
235
236 // SOF
237 ToSend[++ToSendMax] = 0x1D; // 00011101
238
239 // data
240 for (int i = 0; i < len; i++) {
241 ToSend[++ToSendMax] = encode_4bits[cmd[i] & 0xF];
242 ToSend[++ToSendMax] = encode_4bits[cmd[i] >> 4];
243 }
244
245 // EOF
246 ToSend[++ToSendMax] = 0xB8; // 10111000
247
248 ToSendMax++;
249 }
250
251
252 // Transmit the command (to the tag) that was placed in cmd[].
253 void TransmitTo15693Tag(const uint8_t *cmd, int len, uint32_t *start_time) {
254
255 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_FULL_MOD);
256
257 if (*start_time < DELAY_ARM_TO_TAG) {
258 *start_time = DELAY_ARM_TO_TAG;
259 }
260
261 *start_time = (*start_time - DELAY_ARM_TO_TAG) & 0xfffffff0;
262
263 if (GetCountSspClk() > *start_time) { // we may miss the intended time
264 *start_time = (GetCountSspClk() + 16) & 0xfffffff0; // next possible time
265 }
266
267 while (GetCountSspClk() < *start_time)
268 /* wait */ ;
269
270 LED_B_ON();
271 for (int c = 0; c < len; c++) {
272 uint8_t data = cmd[c];
273 for (int i = 0; i < 8; i++) {
274 uint16_t send_word = (data & 0x80) ? 0xffff : 0x0000;
275 while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
276 AT91C_BASE_SSC->SSC_THR = send_word;
277 while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
278 AT91C_BASE_SSC->SSC_THR = send_word;
279
280 data <<= 1;
281 }
282 WDT_HIT();
283 }
284 LED_B_OFF();
285
286 *start_time = *start_time + DELAY_ARM_TO_TAG;
287
288 }
289
290
291 //-----------------------------------------------------------------------------
292 // Transmit the tag response (to the reader) that was placed in cmd[].
293 //-----------------------------------------------------------------------------
294 void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t *start_time, uint32_t slot_time, bool slow) {
295 // don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
296 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
297
298 uint32_t modulation_start_time = *start_time - DELAY_ARM_TO_READER + 3 * 8; // no need to transfer the unmodulated start of SOF
299
300 while (GetCountSspClk() > (modulation_start_time & 0xfffffff8) + 3) { // we will miss the intended time
301 if (slot_time) {
302 modulation_start_time += slot_time; // use next available slot
303 } else {
304 modulation_start_time = (modulation_start_time & 0xfffffff8) + 8; // next possible time
305 }
306 }
307
308 while (GetCountSspClk() < (modulation_start_time & 0xfffffff8))
309 /* wait */ ;
310
311 uint8_t shift_delay = modulation_start_time & 0x00000007;
312
313 *start_time = modulation_start_time + DELAY_ARM_TO_READER - 3 * 8;
314
315 LED_C_ON();
316 uint8_t bits_to_shift = 0x00;
317 uint8_t bits_to_send = 0x00;
318 for (size_t c = 0; c < len; c++) {
319 for (int i = (c==0?4:7); i >= 0; i--) {
320 uint8_t cmd_bits = ((cmd[c] >> i) & 0x01) ? 0xff : 0x00;
321 for (int j = 0; j < (slow?4:1); ) {
322 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
323 bits_to_send = bits_to_shift << (8 - shift_delay) | cmd_bits >> shift_delay;
324 AT91C_BASE_SSC->SSC_THR = bits_to_send;
325 bits_to_shift = cmd_bits;
326 j++;
327 }
328 }
329 }
330 WDT_HIT();
331 }
332 // send the remaining bits, padded with 0:
333 bits_to_send = bits_to_shift << (8 - shift_delay);
334 for ( ; ; ) {
335 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
336 AT91C_BASE_SSC->SSC_THR = bits_to_send;
337 break;
338 }
339 }
340 LED_C_OFF();
341 }
342
343
344 static void jam(void) {
345 // send a short burst to jam the reader signal
346 }
347
348
349 //=============================================================================
350 // An ISO 15693 decoder for tag responses (one subcarrier only).
351 // Uses cross correlation to identify each bit and EOF.
352 // This function is called 8 times per bit (every 2 subcarrier cycles).
353 // Subcarrier frequency fs is 424kHz, 1/fs = 2,36us,
354 // i.e. function is called every 4,72us
355 // LED handling:
356 // LED C -> ON once we have received the SOF and are expecting the rest.
357 // LED C -> OFF once we have received EOF or are unsynced
358 //
359 // Returns: true if we received a EOF
360 // false if we are still waiting for some more
361 //=============================================================================
362
363 #define NOISE_THRESHOLD 160 // don't try to correlate noise
364 #define MAX_PREVIOUS_AMPLITUDE (-1 - NOISE_THRESHOLD)
365
366 typedef struct DecodeTag {
367 enum {
368 STATE_TAG_SOF_LOW,
369 STATE_TAG_SOF_RISING_EDGE,
370 STATE_TAG_SOF_HIGH,
371 STATE_TAG_SOF_HIGH_END,
372 STATE_TAG_RECEIVING_DATA,
373 STATE_TAG_EOF,
374 STATE_TAG_EOF_TAIL
375 } state;
376 int bitCount;
377 int posCount;
378 enum {
379 LOGIC0,
380 LOGIC1,
381 SOF_PART1,
382 SOF_PART2
383 } lastBit;
384 uint16_t shiftReg;
385 uint16_t max_len;
386 uint8_t *output;
387 int len;
388 int sum1, sum2;
389 int threshold_sof;
390 int threshold_half;
391 uint16_t previous_amplitude;
392 } DecodeTag_t;
393
394
395 static int inline __attribute__((always_inline)) Handle15693SamplesFromTag(uint16_t amplitude, DecodeTag_t *restrict DecodeTag) {
396 switch (DecodeTag->state) {
397 case STATE_TAG_SOF_LOW:
398 // waiting for a rising edge
399 if (amplitude > NOISE_THRESHOLD + DecodeTag->previous_amplitude) {
400 if (DecodeTag->posCount > 10) {
401 DecodeTag->threshold_sof = amplitude - DecodeTag->previous_amplitude; // to be divided by 2
402 DecodeTag->threshold_half = 0;
403 DecodeTag->state = STATE_TAG_SOF_RISING_EDGE;
404 } else {
405 DecodeTag->posCount = 0;
406 }
407 } else {
408 DecodeTag->posCount++;
409 DecodeTag->previous_amplitude = amplitude;
410 }
411 break;
412
413 case STATE_TAG_SOF_RISING_EDGE:
414 if (amplitude > DecodeTag->threshold_sof + DecodeTag->previous_amplitude) { // edge still rising
415 if (amplitude > DecodeTag->threshold_sof + DecodeTag->threshold_sof) { // steeper edge, take this as time reference
416 DecodeTag->posCount = 1;
417 } else {
418 DecodeTag->posCount = 2;
419 }
420 DecodeTag->threshold_sof = (amplitude - DecodeTag->previous_amplitude) / 2;
421 } else {
422 DecodeTag->posCount = 2;
423 DecodeTag->threshold_sof = DecodeTag->threshold_sof/2;
424 }
425 // DecodeTag->posCount = 2;
426 DecodeTag->state = STATE_TAG_SOF_HIGH;
427 break;
428
429 case STATE_TAG_SOF_HIGH:
430 // waiting for 10 times high. Take average over the last 8
431 if (amplitude > DecodeTag->threshold_sof) {
432 DecodeTag->posCount++;
433 if (DecodeTag->posCount > 2) {
434 DecodeTag->threshold_half += amplitude; // keep track of average high value
435 }
436 if (DecodeTag->posCount == 10) {
437 DecodeTag->threshold_half >>= 2; // (4 times 1/2 average)
438 DecodeTag->state = STATE_TAG_SOF_HIGH_END;
439 }
440 } else { // high phase was too short
441 DecodeTag->posCount = 1;
442 DecodeTag->previous_amplitude = amplitude;
443 DecodeTag->state = STATE_TAG_SOF_LOW;
444 }
445 break;
446
447 case STATE_TAG_SOF_HIGH_END:
448 // check for falling edge
449 if (DecodeTag->posCount == 13 && amplitude < DecodeTag->threshold_sof) {
450 DecodeTag->lastBit = SOF_PART1; // detected 1st part of SOF (12 samples low and 12 samples high)
451 DecodeTag->shiftReg = 0;
452 DecodeTag->bitCount = 0;
453 DecodeTag->len = 0;
454 DecodeTag->sum1 = amplitude;
455 DecodeTag->sum2 = 0;
456 DecodeTag->posCount = 2;
457 DecodeTag->state = STATE_TAG_RECEIVING_DATA;
458 // FpgaDisableTracing(); // DEBUGGING
459 // Dbprintf("amplitude = %d, threshold_sof = %d, threshold_half/4 = %d, previous_amplitude = %d",
460 // amplitude,
461 // DecodeTag->threshold_sof,
462 // DecodeTag->threshold_half/4,
463 // DecodeTag->previous_amplitude); // DEBUGGING
464 LED_C_ON();
465 } else {
466 DecodeTag->posCount++;
467 if (DecodeTag->posCount > 13) { // high phase too long
468 DecodeTag->posCount = 0;
469 DecodeTag->previous_amplitude = amplitude;
470 DecodeTag->state = STATE_TAG_SOF_LOW;
471 LED_C_OFF();
472 }
473 }
474 break;
475
476 case STATE_TAG_RECEIVING_DATA:
477 // FpgaDisableTracing(); // DEBUGGING
478 // Dbprintf("amplitude = %d, threshold_sof = %d, threshold_half/4 = %d, previous_amplitude = %d",
479 // amplitude,
480 // DecodeTag->threshold_sof,
481 // DecodeTag->threshold_half/4,
482 // DecodeTag->previous_amplitude); // DEBUGGING
483 if (DecodeTag->posCount == 1) {
484 DecodeTag->sum1 = 0;
485 DecodeTag->sum2 = 0;
486 }
487 if (DecodeTag->posCount <= 4) {
488 DecodeTag->sum1 += amplitude;
489 } else {
490 DecodeTag->sum2 += amplitude;
491 }
492 if (DecodeTag->posCount == 8) {
493 if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 > DecodeTag->threshold_half) { // modulation in both halves
494 if (DecodeTag->lastBit == LOGIC0) { // this was already part of EOF
495 DecodeTag->state = STATE_TAG_EOF;
496 } else {
497 DecodeTag->posCount = 0;
498 DecodeTag->previous_amplitude = amplitude;
499 DecodeTag->state = STATE_TAG_SOF_LOW;
500 LED_C_OFF();
501 }
502 } else if (DecodeTag->sum1 < DecodeTag->threshold_half && DecodeTag->sum2 > DecodeTag->threshold_half) { // modulation in second half
503 // logic 1
504 if (DecodeTag->lastBit == SOF_PART1) { // still part of SOF
505 DecodeTag->lastBit = SOF_PART2; // SOF completed
506 } else {
507 DecodeTag->lastBit = LOGIC1;
508 DecodeTag->shiftReg >>= 1;
509 DecodeTag->shiftReg |= 0x80;
510 DecodeTag->bitCount++;
511 if (DecodeTag->bitCount == 8) {
512 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
513 DecodeTag->len++;
514 // if (DecodeTag->shiftReg == 0x12 && DecodeTag->len == 1) FpgaDisableTracing(); // DEBUGGING
515 if (DecodeTag->len > DecodeTag->max_len) {
516 // buffer overflow, give up
517 LED_C_OFF();
518 return true;
519 }
520 DecodeTag->bitCount = 0;
521 DecodeTag->shiftReg = 0;
522 }
523 }
524 } else if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // modulation in first half
525 // logic 0
526 if (DecodeTag->lastBit == SOF_PART1) { // incomplete SOF
527 DecodeTag->posCount = 0;
528 DecodeTag->previous_amplitude = amplitude;
529 DecodeTag->state = STATE_TAG_SOF_LOW;
530 LED_C_OFF();
531 } else {
532 DecodeTag->lastBit = LOGIC0;
533 DecodeTag->shiftReg >>= 1;
534 DecodeTag->bitCount++;
535 if (DecodeTag->bitCount == 8) {
536 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
537 DecodeTag->len++;
538 // if (DecodeTag->shiftReg == 0x12 && DecodeTag->len == 1) FpgaDisableTracing(); // DEBUGGING
539 if (DecodeTag->len > DecodeTag->max_len) {
540 // buffer overflow, give up
541 DecodeTag->posCount = 0;
542 DecodeTag->previous_amplitude = amplitude;
543 DecodeTag->state = STATE_TAG_SOF_LOW;
544 LED_C_OFF();
545 }
546 DecodeTag->bitCount = 0;
547 DecodeTag->shiftReg = 0;
548 }
549 }
550 } else { // no modulation
551 if (DecodeTag->lastBit == SOF_PART2) { // only SOF (this is OK for iClass)
552 LED_C_OFF();
553 return true;
554 } else {
555 DecodeTag->posCount = 0;
556 DecodeTag->state = STATE_TAG_SOF_LOW;
557 LED_C_OFF();
558 }
559 }
560 DecodeTag->posCount = 0;
561 }
562 DecodeTag->posCount++;
563 break;
564
565 case STATE_TAG_EOF:
566 if (DecodeTag->posCount == 1) {
567 DecodeTag->sum1 = 0;
568 DecodeTag->sum2 = 0;
569 }
570 if (DecodeTag->posCount <= 4) {
571 DecodeTag->sum1 += amplitude;
572 } else {
573 DecodeTag->sum2 += amplitude;
574 }
575 if (DecodeTag->posCount == 8) {
576 if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // modulation in first half
577 DecodeTag->posCount = 0;
578 DecodeTag->state = STATE_TAG_EOF_TAIL;
579 } else {
580 DecodeTag->posCount = 0;
581 DecodeTag->previous_amplitude = amplitude;
582 DecodeTag->state = STATE_TAG_SOF_LOW;
583 LED_C_OFF();
584 }
585 }
586 DecodeTag->posCount++;
587 break;
588
589 case STATE_TAG_EOF_TAIL:
590 if (DecodeTag->posCount == 1) {
591 DecodeTag->sum1 = 0;
592 DecodeTag->sum2 = 0;
593 }
594 if (DecodeTag->posCount <= 4) {
595 DecodeTag->sum1 += amplitude;
596 } else {
597 DecodeTag->sum2 += amplitude;
598 }
599 if (DecodeTag->posCount == 8) {
600 if (DecodeTag->sum1 < DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // no modulation in both halves
601 LED_C_OFF();
602 return true;
603 } else {
604 DecodeTag->posCount = 0;
605 DecodeTag->previous_amplitude = amplitude;
606 DecodeTag->state = STATE_TAG_SOF_LOW;
607 LED_C_OFF();
608 }
609 }
610 DecodeTag->posCount++;
611 break;
612 }
613
614 return false;
615 }
616
617
618 static void DecodeTagInit(DecodeTag_t *DecodeTag, uint8_t *data, uint16_t max_len) {
619 DecodeTag->previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
620 DecodeTag->posCount = 0;
621 DecodeTag->state = STATE_TAG_SOF_LOW;
622 DecodeTag->output = data;
623 DecodeTag->max_len = max_len;
624 }
625
626
627 static void DecodeTagReset(DecodeTag_t *DecodeTag) {
628 DecodeTag->posCount = 0;
629 DecodeTag->state = STATE_TAG_SOF_LOW;
630 DecodeTag->previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
631 }
632
633
634 /*
635 * Receive and decode the tag response, also log to tracebuffer
636 */
637 int GetIso15693AnswerFromTag(uint8_t* response, uint16_t max_len, uint16_t timeout, uint32_t *eof_time) {
638
639 int samples = 0;
640 int ret = 0;
641
642 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
643
644 // the Decoder data structure
645 DecodeTag_t DecodeTag = { 0 };
646 DecodeTagInit(&DecodeTag, response, max_len);
647
648 // wait for last transfer to complete
649 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
650
651 // And put the FPGA in the appropriate mode
652 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_424_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE);
653
654 // Setup and start DMA.
655 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
656 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
657 uint32_t dma_start_time = 0;
658 uint16_t *upTo = dmaBuf;
659
660 for(;;) {
661 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
662
663 if (behindBy == 0) continue;
664
665 samples++;
666 if (samples == 1) {
667 // DMA has transferred the very first data
668 dma_start_time = GetCountSspClk() & 0xfffffff0;
669 }
670
671 uint16_t tagdata = *upTo++;
672
673 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
674 upTo = dmaBuf; // start reading the circular buffer from the beginning
675 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
676 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
677 ret = -1;
678 break;
679 }
680 }
681 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
682 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
683 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
684 }
685
686 if (Handle15693SamplesFromTag(tagdata, &DecodeTag)) {
687 *eof_time = dma_start_time + samples*16 - DELAY_TAG_TO_ARM; // end of EOF
688 if (DecodeTag.lastBit == SOF_PART2) {
689 *eof_time -= 8*16; // needed 8 additional samples to confirm single SOF (iCLASS)
690 }
691 if (DecodeTag.len > DecodeTag.max_len) {
692 ret = -2; // buffer overflow
693 }
694 break;
695 }
696
697 if (samples > timeout && DecodeTag.state < STATE_TAG_RECEIVING_DATA) {
698 ret = -1; // timeout
699 break;
700 }
701
702 }
703
704 FpgaDisableSscDma();
705
706 if (DEBUG) Dbprintf("samples = %d, ret = %d, Decoder: state = %d, lastBit = %d, len = %d, bitCount = %d, posCount = %d",
707 samples, ret, DecodeTag.state, DecodeTag.lastBit, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
708
709 if (ret < 0) {
710 return ret;
711 }
712
713 uint32_t sof_time = *eof_time
714 - DecodeTag.len * 8 * 8 * 16 // time for byte transfers
715 - 32 * 16 // time for SOF transfer
716 - (DecodeTag.lastBit != SOF_PART2?32*16:0); // time for EOF transfer
717
718 if (DEBUG) Dbprintf("timing: sof_time = %d, eof_time = %d", sof_time, *eof_time);
719
720 LogTrace_ISO15693(DecodeTag.output, DecodeTag.len, sof_time*4, *eof_time*4, NULL, false);
721
722 return DecodeTag.len;
723 }
724
725
726 //=============================================================================
727 // An ISO15693 decoder for reader commands.
728 //
729 // This function is called 4 times per bit (every 2 subcarrier cycles).
730 // Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
731 // LED handling:
732 // LED B -> ON once we have received the SOF and are expecting the rest.
733 // LED B -> OFF once we have received EOF or are in error state or unsynced
734 //
735 // Returns: true if we received a EOF
736 // false if we are still waiting for some more
737 //=============================================================================
738
739 typedef struct DecodeReader {
740 enum {
741 STATE_READER_UNSYNCD,
742 STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF,
743 STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
744 STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
745 STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
746 STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4,
747 STATE_READER_RECEIVE_DATA_1_OUT_OF_4,
748 STATE_READER_RECEIVE_DATA_1_OUT_OF_256
749 } state;
750 enum {
751 CODING_1_OUT_OF_4,
752 CODING_1_OUT_OF_256
753 } Coding;
754 uint8_t shiftReg;
755 uint8_t bitCount;
756 int byteCount;
757 int byteCountMax;
758 int posCount;
759 int sum1, sum2;
760 uint8_t *output;
761 uint8_t jam_search_len;
762 uint8_t *jam_search_string;
763 } DecodeReader_t;
764
765
766 static void DecodeReaderInit(DecodeReader_t* DecodeReader, uint8_t *data, uint16_t max_len, uint8_t jam_search_len, uint8_t *jam_search_string) {
767 DecodeReader->output = data;
768 DecodeReader->byteCountMax = max_len;
769 DecodeReader->state = STATE_READER_UNSYNCD;
770 DecodeReader->byteCount = 0;
771 DecodeReader->bitCount = 0;
772 DecodeReader->posCount = 1;
773 DecodeReader->shiftReg = 0;
774 DecodeReader->jam_search_len = jam_search_len;
775 DecodeReader->jam_search_string = jam_search_string;
776 }
777
778
779 static void DecodeReaderReset(DecodeReader_t* DecodeReader) {
780 DecodeReader->state = STATE_READER_UNSYNCD;
781 }
782
783
784 static int inline __attribute__((always_inline)) Handle15693SampleFromReader(bool bit, DecodeReader_t *restrict DecodeReader) {
785 switch (DecodeReader->state) {
786 case STATE_READER_UNSYNCD:
787 // wait for unmodulated carrier
788 if (bit) {
789 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
790 }
791 break;
792
793 case STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF:
794 if (!bit) {
795 // we went low, so this could be the beginning of a SOF
796 DecodeReader->posCount = 1;
797 DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
798 }
799 break;
800
801 case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
802 DecodeReader->posCount++;
803 if (bit) { // detected rising edge
804 if (DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
805 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
806 } else { // SOF
807 DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
808 }
809 } else {
810 if (DecodeReader->posCount > 5) { // stayed low for too long
811 DecodeReaderReset(DecodeReader);
812 } else {
813 // do nothing, keep waiting
814 }
815 }
816 break;
817
818 case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
819 DecodeReader->posCount++;
820 if (!bit) { // detected a falling edge
821 if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
822 DecodeReaderReset(DecodeReader);
823 } else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
824 DecodeReader->Coding = CODING_1_OUT_OF_4;
825 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
826 } else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
827 DecodeReaderReset(DecodeReader);
828 } else { // SOF for 1 out of 256 coding
829 DecodeReader->Coding = CODING_1_OUT_OF_256;
830 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
831 }
832 } else {
833 if (DecodeReader->posCount > 29) { // stayed high for too long
834 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
835 } else {
836 // do nothing, keep waiting
837 }
838 }
839 break;
840
841 case STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF:
842 DecodeReader->posCount++;
843 if (bit) { // detected rising edge
844 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
845 if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
846 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
847 } else {
848 DecodeReader->posCount = 1;
849 DecodeReader->bitCount = 0;
850 DecodeReader->byteCount = 0;
851 DecodeReader->sum1 = 1;
852 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
853 LED_B_ON();
854 }
855 } else { // CODING_1_OUT_OF_4
856 if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
857 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
858 } else {
859 DecodeReader->posCount = 1;
860 DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
861 }
862 }
863 } else {
864 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
865 if (DecodeReader->posCount > 34) { // signal stayed low for too long
866 DecodeReaderReset(DecodeReader);
867 } else {
868 // do nothing, keep waiting
869 }
870 } else { // CODING_1_OUT_OF_4
871 if (DecodeReader->posCount > 26) { // signal stayed low for too long
872 DecodeReaderReset(DecodeReader);
873 } else {
874 // do nothing, keep waiting
875 }
876 }
877 }
878 break;
879
880 case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
881 DecodeReader->posCount++;
882 if (bit) {
883 if (DecodeReader->posCount == 9) {
884 DecodeReader->posCount = 1;
885 DecodeReader->bitCount = 0;
886 DecodeReader->byteCount = 0;
887 DecodeReader->sum1 = 1;
888 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
889 LED_B_ON();
890 } else {
891 // do nothing, keep waiting
892 }
893 } else { // unexpected falling edge
894 DecodeReaderReset(DecodeReader);
895 }
896 break;
897
898 case STATE_READER_RECEIVE_DATA_1_OUT_OF_4:
899 DecodeReader->posCount++;
900 if (DecodeReader->posCount == 1) {
901 DecodeReader->sum1 = bit?1:0;
902 } else if (DecodeReader->posCount <= 4) {
903 if (bit) DecodeReader->sum1++;
904 } else if (DecodeReader->posCount == 5) {
905 DecodeReader->sum2 = bit?1:0;
906 } else {
907 if (bit) DecodeReader->sum2++;
908 }
909 if (DecodeReader->posCount == 8) {
910 DecodeReader->posCount = 0;
911 if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
912 LED_B_OFF(); // Finished receiving
913 DecodeReaderReset(DecodeReader);
914 if (DecodeReader->byteCount != 0) {
915 return true;
916 }
917 } else if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected a 2bit position
918 DecodeReader->shiftReg >>= 2;
919 DecodeReader->shiftReg |= (DecodeReader->bitCount << 6);
920 }
921 if (DecodeReader->bitCount == 15) { // we have a full byte
922 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
923 if (DecodeReader->byteCount == DecodeReader->jam_search_len) {
924 if (!memcmp(DecodeReader->output, DecodeReader->jam_search_string, DecodeReader->jam_search_len)) {
925 jam(); // send a jamming signal
926 Dbprintf("JAMMING!");
927 }
928 }
929 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
930 // buffer overflow, give up
931 LED_B_OFF();
932 DecodeReaderReset(DecodeReader);
933 }
934 DecodeReader->bitCount = 0;
935 DecodeReader->shiftReg = 0;
936 } else {
937 DecodeReader->bitCount++;
938 }
939 }
940 break;
941
942 case STATE_READER_RECEIVE_DATA_1_OUT_OF_256:
943 DecodeReader->posCount++;
944 if (DecodeReader->posCount == 1) {
945 DecodeReader->sum1 = bit?1:0;
946 } else if (DecodeReader->posCount <= 4) {
947 if (bit) DecodeReader->sum1++;
948 } else if (DecodeReader->posCount == 5) {
949 DecodeReader->sum2 = bit?1:0;
950 } else if (bit) {
951 DecodeReader->sum2++;
952 }
953 if (DecodeReader->posCount == 8) {
954 DecodeReader->posCount = 0;
955 if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
956 LED_B_OFF(); // Finished receiving
957 DecodeReaderReset(DecodeReader);
958 if (DecodeReader->byteCount != 0) {
959 return true;
960 }
961 } else if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected the bit position
962 DecodeReader->shiftReg = DecodeReader->bitCount;
963 }
964 if (DecodeReader->bitCount == 255) { // we have a full byte
965 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
966 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
967 // buffer overflow, give up
968 LED_B_OFF();
969 DecodeReaderReset(DecodeReader);
970 }
971 }
972 DecodeReader->bitCount++;
973 }
974 break;
975
976 default:
977 LED_B_OFF();
978 DecodeReaderReset(DecodeReader);
979 break;
980 }
981
982 return false;
983 }
984
985
986 //-----------------------------------------------------------------------------
987 // Receive a command (from the reader to us, where we are the simulated tag),
988 // and store it in the given buffer, up to the given maximum length. Keeps
989 // spinning, waiting for a well-framed command, until either we get one
990 // (returns len) or someone presses the pushbutton on the board (returns -1).
991 //
992 // Assume that we're called with the SSC (to the FPGA) and ADC path set
993 // correctly.
994 //-----------------------------------------------------------------------------
995
996 int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time) {
997 int samples = 0;
998 bool gotFrame = false;
999 uint8_t b;
1000
1001 uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
1002
1003 // the decoder data structure
1004 DecodeReader_t DecodeReader = {0};
1005 DecodeReaderInit(&DecodeReader, received, max_len, 0, NULL);
1006
1007 // wait for last transfer to complete
1008 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
1009
1010 LED_D_OFF();
1011 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1012
1013 // clear receive register and wait for next transfer
1014 uint32_t temp = AT91C_BASE_SSC->SSC_RHR;
1015 (void) temp;
1016 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
1017
1018 uint32_t dma_start_time = GetCountSspClk() & 0xfffffff8;
1019
1020 // Setup and start DMA.
1021 FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1022 uint8_t *upTo = dmaBuf;
1023
1024 for (;;) {
1025 uint16_t behindBy = ((uint8_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1026
1027 if (behindBy == 0) continue;
1028
1029 b = *upTo++;
1030 if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1031 upTo = dmaBuf; // start reading the circular buffer from the beginning
1032 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1033 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
1034 break;
1035 }
1036 }
1037 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1038 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1039 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1040 }
1041
1042 for (int i = 7; i >= 0; i--) {
1043 if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
1044 *eof_time = dma_start_time + samples - DELAY_READER_TO_ARM; // end of EOF
1045 gotFrame = true;
1046 break;
1047 }
1048 samples++;
1049 }
1050
1051 if (gotFrame) {
1052 break;
1053 }
1054
1055 if (BUTTON_PRESS()) {
1056 DecodeReader.byteCount = -1;
1057 break;
1058 }
1059
1060 WDT_HIT();
1061 }
1062
1063 FpgaDisableSscDma();
1064
1065 if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
1066 samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
1067
1068 if (DecodeReader.byteCount > 0) {
1069 uint32_t sof_time = *eof_time
1070 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128:2048) // time for byte transfers
1071 - 32 // time for SOF transfer
1072 - 16; // time for EOF transfer
1073 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*32, *eof_time*32, NULL, true);
1074 }
1075
1076 return DecodeReader.byteCount;
1077 }
1078
1079
1080 // Encode (into the ToSend buffers) an identify request, which is the first
1081 // thing that you must send to a tag to get a response.
1082 static void BuildIdentifyRequest(void)
1083 {
1084 uint8_t cmd[5];
1085
1086 uint16_t crc;
1087 // one sub-carrier, inventory, 1 slot, fast rate
1088 // AFI is at bit 5 (1<<4) when doing an INVENTORY
1089 cmd[0] = (1 << 2) | (1 << 5) | (1 << 1);
1090 // inventory command code
1091 cmd[1] = 0x01;
1092 // no mask
1093 cmd[2] = 0x00;
1094 //Now the CRC
1095 crc = Iso15693Crc(cmd, 3);
1096 cmd[3] = crc & 0xff;
1097 cmd[4] = crc >> 8;
1098
1099 CodeIso15693AsReader(cmd, sizeof(cmd));
1100 }
1101
1102
1103 //-----------------------------------------------------------------------------
1104 // Start to read an ISO 15693 tag. We send an identify request, then wait
1105 // for the response. The response is not demodulated, just left in the buffer
1106 // so that it can be downloaded to a PC and processed there.
1107 //-----------------------------------------------------------------------------
1108 void AcquireRawAdcSamplesIso15693(void)
1109 {
1110 LED_A_ON();
1111
1112 uint8_t *dest = BigBuf_get_addr();
1113
1114 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1115 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1116 LED_D_ON();
1117 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1118 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1119
1120 BuildIdentifyRequest();
1121
1122 // Give the tags time to energize
1123 SpinDelay(100);
1124
1125 // Now send the command
1126 uint32_t start_time = 0;
1127 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1128
1129 // wait for last transfer to complete
1130 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY)) ;
1131
1132 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_424_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE);
1133
1134 for(int c = 0; c < 4000; ) {
1135 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1136 uint16_t r = AT91C_BASE_SSC->SSC_RHR;
1137 dest[c++] = r >> 5;
1138 }
1139 }
1140
1141 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1142 LEDsoff();
1143 }
1144
1145
1146 void SnoopIso15693(uint8_t jam_search_len, uint8_t *jam_search_string) {
1147
1148 LED_A_ON();
1149
1150 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1151
1152 clear_trace();
1153 set_tracing(true);
1154
1155 // The DMA buffer, used to stream samples from the FPGA
1156 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
1157
1158 // Count of samples received so far, so that we can include timing
1159 // information in the trace buffer.
1160 int samples = 0;
1161
1162 DecodeTag_t DecodeTag = {0};
1163 uint8_t response[ISO15693_MAX_RESPONSE_LENGTH];
1164 DecodeTagInit(&DecodeTag, response, sizeof(response));
1165
1166 DecodeReader_t DecodeReader = {0};
1167 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1168 DecodeReaderInit(&DecodeReader, cmd, sizeof(cmd), jam_search_len, jam_search_string);
1169
1170 // Print some debug information about the buffer sizes
1171 if (DEBUG) {
1172 Dbprintf("Snooping buffers initialized:");
1173 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1174 Dbprintf(" Reader -> tag: %i bytes", ISO15693_MAX_COMMAND_LENGTH);
1175 Dbprintf(" tag -> Reader: %i bytes", ISO15693_MAX_RESPONSE_LENGTH);
1176 Dbprintf(" DMA: %i bytes", ISO15693_DMA_BUFFER_SIZE * sizeof(uint16_t));
1177 }
1178 Dbprintf("Snoop started. Press PM3 Button to stop.");
1179
1180 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE);
1181 LED_D_OFF();
1182 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1183 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1184 StartCountSspClk();
1185 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1186
1187 bool TagIsActive = false;
1188 bool ReaderIsActive = false;
1189 bool ExpectTagAnswer = false;
1190 uint32_t dma_start_time = 0;
1191 uint16_t *upTo = dmaBuf;
1192
1193 uint16_t max_behindBy = 0;
1194
1195 // And now we loop, receiving samples.
1196 for(;;) {
1197 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1198 if (behindBy > max_behindBy) {
1199 max_behindBy = behindBy;
1200 }
1201
1202 if (behindBy == 0) continue;
1203
1204 samples++;
1205 if (samples == 1) {
1206 // DMA has transferred the very first data
1207 dma_start_time = GetCountSspClk() & 0xfffffff0;
1208 }
1209
1210 uint16_t snoopdata = *upTo++;
1211
1212 if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1213 upTo = dmaBuf; // start reading the circular buffer from the beginning
1214 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1215 FpgaDisableTracing();
1216 Dbprintf("About to blow circular buffer - aborted! behindBy=%d, samples=%d", behindBy, samples);
1217 break;
1218 }
1219 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1220 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1221 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1222 WDT_HIT();
1223 if (BUTTON_PRESS()) {
1224 DbpString("Snoop stopped.");
1225 break;
1226 }
1227 }
1228 }
1229
1230 if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
1231 if (Handle15693SampleFromReader(snoopdata & 0x02, &DecodeReader)) {
1232 // FpgaDisableSscDma();
1233 uint32_t eof_time = dma_start_time + samples*16 + 8 - DELAY_READER_TO_ARM_SNOOP; // end of EOF
1234 if (DecodeReader.byteCount > 0) {
1235 uint32_t sof_time = eof_time
1236 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128*16:2048*16) // time for byte transfers
1237 - 32*16 // time for SOF transfer
1238 - 16*16; // time for EOF transfer
1239 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*4, eof_time*4, NULL, true);
1240 }
1241 /* And ready to receive another command. */
1242 DecodeReaderReset(&DecodeReader);
1243 /* And also reset the demod code, which might have been */
1244 /* false-triggered by the commands from the reader. */
1245 DecodeTagReset(&DecodeTag);
1246 ReaderIsActive = false;
1247 ExpectTagAnswer = true;
1248 // upTo = dmaBuf;
1249 // samples = 0;
1250 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1251 // continue;
1252 } else if (Handle15693SampleFromReader(snoopdata & 0x01, &DecodeReader)) {
1253 // FpgaDisableSscDma();
1254 uint32_t eof_time = dma_start_time + samples*16 + 16 - DELAY_READER_TO_ARM_SNOOP; // end of EOF
1255 if (DecodeReader.byteCount > 0) {
1256 uint32_t sof_time = eof_time
1257 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128*16:2048*16) // time for byte transfers
1258 - 32*16 // time for SOF transfer
1259 - 16*16; // time for EOF transfer
1260 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*4, eof_time*4, NULL, true);
1261 }
1262 /* And ready to receive another command. */
1263 DecodeReaderReset(&DecodeReader);
1264 /* And also reset the demod code, which might have been */
1265 /* false-triggered by the commands from the reader. */
1266 DecodeTagReset(&DecodeTag);
1267 ReaderIsActive = false;
1268 ExpectTagAnswer = true;
1269 // upTo = dmaBuf;
1270 // samples = 0;
1271 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1272 // continue;
1273 } else {
1274 ReaderIsActive = (DecodeReader.state >= STATE_READER_RECEIVE_DATA_1_OUT_OF_4);
1275 }
1276 }
1277
1278 if (!ReaderIsActive && ExpectTagAnswer) { // no need to try decoding tag data if the reader is currently sending or no answer expected yet
1279 if (Handle15693SamplesFromTag(snoopdata >> 2, &DecodeTag)) {
1280 // FpgaDisableSscDma();
1281 uint32_t eof_time = dma_start_time + samples*16 - DELAY_TAG_TO_ARM_SNOOP; // end of EOF
1282 if (DecodeTag.lastBit == SOF_PART2) {
1283 eof_time -= 8*16; // needed 8 additional samples to confirm single SOF (iCLASS)
1284 }
1285 uint32_t sof_time = eof_time
1286 - DecodeTag.len * 8 * 8 * 16 // time for byte transfers
1287 - 32 * 16 // time for SOF transfer
1288 - (DecodeTag.lastBit != SOF_PART2?32*16:0); // time for EOF transfer
1289 LogTrace_ISO15693(DecodeTag.output, DecodeTag.len, sof_time*4, eof_time*4, NULL, false);
1290 // And ready to receive another response.
1291 DecodeTagReset(&DecodeTag);
1292 DecodeReaderReset(&DecodeReader);
1293 ExpectTagAnswer = false;
1294 TagIsActive = false;
1295 // upTo = dmaBuf;
1296 // samples = 0;
1297 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1298 // continue;
1299 } else {
1300 TagIsActive = (DecodeTag.state >= STATE_TAG_RECEIVING_DATA);
1301 }
1302 }
1303
1304 }
1305
1306 FpgaDisableSscDma();
1307
1308 LEDsoff();
1309
1310 DbpString("Snoop statistics:");
1311 Dbprintf(" ExpectTagAnswer: %d, TagIsActive: %d, ReaderIsActive: %d", ExpectTagAnswer, TagIsActive, ReaderIsActive);
1312 Dbprintf(" DecodeTag State: %d", DecodeTag.state);
1313 Dbprintf(" DecodeTag byteCnt: %d", DecodeTag.len);
1314 Dbprintf(" DecodeTag posCount: %d", DecodeTag.posCount);
1315 Dbprintf(" DecodeReader State: %d", DecodeReader.state);
1316 Dbprintf(" DecodeReader byteCnt: %d", DecodeReader.byteCount);
1317 Dbprintf(" DecodeReader posCount: %d", DecodeReader.posCount);
1318 Dbprintf(" Trace length: %d", BigBuf_get_traceLen());
1319 Dbprintf(" Max behindBy: %d", max_behindBy);
1320 }
1321
1322
1323 // Initialize the proxmark as iso15k reader
1324 void Iso15693InitReader() {
1325 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1326
1327 // Start from off (no field generated)
1328 LED_D_OFF();
1329 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1330 SpinDelay(10);
1331
1332 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1333 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1334
1335 // Give the tags time to energize
1336 LED_D_ON();
1337 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1338 SpinDelay(250);
1339 }
1340
1341 ///////////////////////////////////////////////////////////////////////
1342 // ISO 15693 Part 3 - Air Interface
1343 // This section basically contains transmission and receiving of bits
1344 ///////////////////////////////////////////////////////////////////////
1345
1346
1347 // uid is in transmission order (which is reverse of display order)
1348 static void BuildReadBlockRequest(uint8_t *uid, uint8_t blockNumber )
1349 {
1350 uint8_t cmd[13];
1351
1352 uint16_t crc;
1353 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1354 // followed by the block data
1355 cmd[0] = ISO15693_REQ_OPTION | ISO15693_REQ_ADDRESS | ISO15693_REQ_DATARATE_HIGH;
1356 // READ BLOCK command code
1357 cmd[1] = ISO15693_READBLOCK;
1358 // UID may be optionally specified here
1359 // 64-bit UID
1360 cmd[2] = uid[0];
1361 cmd[3] = uid[1];
1362 cmd[4] = uid[2];
1363 cmd[5] = uid[3];
1364 cmd[6] = uid[4];
1365 cmd[7] = uid[5];
1366 cmd[8] = uid[6];
1367 cmd[9] = uid[7]; // 0xe0; // always e0 (not exactly unique)
1368 // Block number to read
1369 cmd[10] = blockNumber;
1370 //Now the CRC
1371 crc = Iso15693Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
1372 cmd[11] = crc & 0xff;
1373 cmd[12] = crc >> 8;
1374
1375 CodeIso15693AsReader(cmd, sizeof(cmd));
1376 }
1377
1378
1379 // Now the VICC>VCD responses when we are simulating a tag
1380 static void BuildInventoryResponse(uint8_t *uid)
1381 {
1382 uint8_t cmd[12];
1383
1384 uint16_t crc;
1385
1386 cmd[0] = 0; // No error, no protocol format extension
1387 cmd[1] = 0; // DSFID (data storage format identifier). 0x00 = not supported
1388 // 64-bit UID
1389 cmd[2] = uid[7]; //0x32;
1390 cmd[3] = uid[6]; //0x4b;
1391 cmd[4] = uid[5]; //0x03;
1392 cmd[5] = uid[4]; //0x01;
1393 cmd[6] = uid[3]; //0x00;
1394 cmd[7] = uid[2]; //0x10;
1395 cmd[8] = uid[1]; //0x05;
1396 cmd[9] = uid[0]; //0xe0;
1397 //Now the CRC
1398 crc = Iso15693Crc(cmd, 10);
1399 cmd[10] = crc & 0xff;
1400 cmd[11] = crc >> 8;
1401
1402 CodeIso15693AsTag(cmd, sizeof(cmd));
1403 }
1404
1405 // Universal Method for sending to and recv bytes from a tag
1406 // init ... should we initialize the reader?
1407 // speed ... 0 low speed, 1 hi speed
1408 // *recv will contain the tag's answer
1409 // return: length of received data, or -1 for timeout
1410 int SendDataTag(uint8_t *send, int sendlen, bool init, int speed, uint8_t *recv, uint16_t max_recv_len, uint32_t start_time, uint32_t *eof_time) {
1411
1412 if (init) {
1413 Iso15693InitReader();
1414 StartCountSspClk();
1415 }
1416
1417 int answerLen = 0;
1418
1419 if (!speed) {
1420 // low speed (1 out of 256)
1421 CodeIso15693AsReader256(send, sendlen);
1422 } else {
1423 // high speed (1 out of 4)
1424 CodeIso15693AsReader(send, sendlen);
1425 }
1426
1427 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1428
1429 // Now wait for a response
1430 if (recv != NULL) {
1431 answerLen = GetIso15693AnswerFromTag(recv, max_recv_len, ISO15693_READER_TIMEOUT, eof_time);
1432 }
1433
1434 return answerLen;
1435 }
1436
1437
1438 // --------------------------------------------------------------------
1439 // Debug Functions
1440 // --------------------------------------------------------------------
1441
1442 // Decodes a message from a tag and displays its metadata and content
1443 #define DBD15STATLEN 48
1444 void DbdecodeIso15693Answer(int len, uint8_t *d) {
1445 char status[DBD15STATLEN+1]={0};
1446 uint16_t crc;
1447
1448 if (len > 3) {
1449 if (d[0] & ISO15693_RES_EXT)
1450 strncat(status,"ProtExt ", DBD15STATLEN);
1451 if (d[0] & ISO15693_RES_ERROR) {
1452 // error
1453 strncat(status,"Error ", DBD15STATLEN);
1454 switch (d[1]) {
1455 case 0x01:
1456 strncat(status,"01:notSupp", DBD15STATLEN);
1457 break;
1458 case 0x02:
1459 strncat(status,"02:notRecog", DBD15STATLEN);
1460 break;
1461 case 0x03:
1462 strncat(status,"03:optNotSupp", DBD15STATLEN);
1463 break;
1464 case 0x0f:
1465 strncat(status,"0f:noInfo", DBD15STATLEN);
1466 break;
1467 case 0x10:
1468 strncat(status,"10:doesn'tExist", DBD15STATLEN);
1469 break;
1470 case 0x11:
1471 strncat(status,"11:lockAgain", DBD15STATLEN);
1472 break;
1473 case 0x12:
1474 strncat(status,"12:locked", DBD15STATLEN);
1475 break;
1476 case 0x13:
1477 strncat(status,"13:progErr", DBD15STATLEN);
1478 break;
1479 case 0x14:
1480 strncat(status,"14:lockErr", DBD15STATLEN);
1481 break;
1482 default:
1483 strncat(status,"unknownErr", DBD15STATLEN);
1484 }
1485 strncat(status," ", DBD15STATLEN);
1486 } else {
1487 strncat(status,"NoErr ", DBD15STATLEN);
1488 }
1489
1490 crc=Iso15693Crc(d,len-2);
1491 if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
1492 strncat(status,"CrcOK",DBD15STATLEN);
1493 else
1494 strncat(status,"CrcFail!",DBD15STATLEN);
1495
1496 Dbprintf("%s",status);
1497 }
1498 }
1499
1500
1501
1502 ///////////////////////////////////////////////////////////////////////
1503 // Functions called via USB/Client
1504 ///////////////////////////////////////////////////////////////////////
1505
1506 void SetDebugIso15693(uint32_t debug) {
1507 DEBUG=debug;
1508 Dbprintf("Iso15693 Debug is now %s",DEBUG?"on":"off");
1509 return;
1510 }
1511
1512
1513 //---------------------------------------------------------------------------------------
1514 // Simulate an ISO15693 reader, perform anti-collision and then attempt to read a sector.
1515 // all demodulation performed in arm rather than host. - greg
1516 //---------------------------------------------------------------------------------------
1517 void ReaderIso15693(uint32_t parameter) {
1518
1519 LED_A_ON();
1520
1521 set_tracing(true);
1522
1523 int answerLen = 0;
1524 uint8_t TagUID[8] = {0x00};
1525
1526 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1527
1528 uint8_t answer[ISO15693_MAX_RESPONSE_LENGTH];
1529
1530 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1531 // Setup SSC
1532 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1533
1534 // Start from off (no field generated)
1535 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1536 SpinDelay(200);
1537
1538 // Give the tags time to energize
1539 LED_D_ON();
1540 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1541 SpinDelay(200);
1542 StartCountSspClk();
1543
1544
1545 // FIRST WE RUN AN INVENTORY TO GET THE TAG UID
1546 // THIS MEANS WE CAN PRE-BUILD REQUESTS TO SAVE CPU TIME
1547
1548 // Now send the IDENTIFY command
1549 BuildIdentifyRequest();
1550 uint32_t start_time = 0;
1551 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1552
1553 // Now wait for a response
1554 uint32_t eof_time;
1555 answerLen = GetIso15693AnswerFromTag(answer, sizeof(answer), DELAY_ISO15693_VCD_TO_VICC_READER * 2, &eof_time) ;
1556 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1557
1558 if (answerLen >=12) // we should do a better check than this
1559 {
1560 TagUID[0] = answer[2];
1561 TagUID[1] = answer[3];
1562 TagUID[2] = answer[4];
1563 TagUID[3] = answer[5];
1564 TagUID[4] = answer[6];
1565 TagUID[5] = answer[7];
1566 TagUID[6] = answer[8]; // IC Manufacturer code
1567 TagUID[7] = answer[9]; // always E0
1568
1569 }
1570
1571 Dbprintf("%d octets read from IDENTIFY request:", answerLen);
1572 DbdecodeIso15693Answer(answerLen, answer);
1573 Dbhexdump(answerLen, answer, false);
1574
1575 // UID is reverse
1576 if (answerLen >= 12)
1577 Dbprintf("UID = %02hX%02hX%02hX%02hX%02hX%02hX%02hX%02hX",
1578 TagUID[7],TagUID[6],TagUID[5],TagUID[4],
1579 TagUID[3],TagUID[2],TagUID[1],TagUID[0]);
1580
1581
1582 // Dbprintf("%d octets read from SELECT request:", answerLen2);
1583 // DbdecodeIso15693Answer(answerLen2,answer2);
1584 // Dbhexdump(answerLen2,answer2,true);
1585
1586 // Dbprintf("%d octets read from XXX request:", answerLen3);
1587 // DbdecodeIso15693Answer(answerLen3,answer3);
1588 // Dbhexdump(answerLen3,answer3,true);
1589
1590 // read all pages
1591 if (answerLen >= 12 && DEBUG) {
1592 for (int i = 0; i < 32; i++) { // sanity check, assume max 32 pages
1593 BuildReadBlockRequest(TagUID, i);
1594 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1595 int answerLen = GetIso15693AnswerFromTag(answer, sizeof(answer), DELAY_ISO15693_VCD_TO_VICC_READER * 2, &eof_time);
1596 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1597 if (answerLen > 0) {
1598 Dbprintf("READ SINGLE BLOCK %d returned %d octets:", i, answerLen);
1599 DbdecodeIso15693Answer(answerLen, answer);
1600 Dbhexdump(answerLen, answer, false);
1601 if ( *((uint32_t*) answer) == 0x07160101 ) break; // exit on NoPageErr
1602 }
1603 }
1604 }
1605
1606 // for the time being, switch field off to protect rdv4.0
1607 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1608 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1609 LED_D_OFF();
1610
1611 LED_A_OFF();
1612 }
1613
1614
1615 // Simulate an ISO15693 TAG.
1616 // For Inventory command: print command and send Inventory Response with given UID
1617 // TODO: interpret other reader commands and send appropriate response
1618 void SimTagIso15693(uint32_t parameter, uint8_t *uid) {
1619
1620 LED_A_ON();
1621
1622 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1623 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1624 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1625 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1626
1627 StartCountSspClk();
1628
1629 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1630
1631 // Build a suitable response to the reader INVENTORY command
1632 BuildInventoryResponse(uid);
1633
1634 // Listen to reader
1635 while (!BUTTON_PRESS()) {
1636 uint32_t eof_time = 0, start_time = 0;
1637 int cmd_len = GetIso15693CommandFromReader(cmd, sizeof(cmd), &eof_time);
1638
1639 if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags
1640 bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH);
1641 start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM;
1642 TransmitTo15693Reader(ToSend, ToSendMax, &start_time, 0, slow);
1643 }
1644
1645 Dbprintf("%d bytes read from reader:", cmd_len);
1646 Dbhexdump(cmd_len, cmd, false);
1647 }
1648
1649 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1650 LED_D_OFF();
1651 LED_A_OFF();
1652 }
1653
1654
1655 // Since there is no standardized way of reading the AFI out of a tag, we will brute force it
1656 // (some manufactures offer a way to read the AFI, though)
1657 void BruteforceIso15693Afi(uint32_t speed)
1658 {
1659 LED_A_ON();
1660
1661 uint8_t data[6];
1662 uint8_t recv[ISO15693_MAX_RESPONSE_LENGTH];
1663 int datalen = 0, recvlen = 0;
1664 uint32_t eof_time;
1665
1666 // first without AFI
1667 // Tags should respond without AFI and with AFI=0 even when AFI is active
1668
1669 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
1670 data[1] = ISO15693_INVENTORY;
1671 data[2] = 0; // mask length
1672 datalen = Iso15693AddCrc(data,3);
1673 uint32_t start_time = GetCountSspClk();
1674 recvlen = SendDataTag(data, datalen, true, speed, recv, sizeof(recv), 0, &eof_time);
1675 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1676 WDT_HIT();
1677 if (recvlen>=12) {
1678 Dbprintf("NoAFI UID=%s", Iso15693sprintUID(NULL, &recv[2]));
1679 }
1680
1681 // now with AFI
1682
1683 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_AFI | ISO15693_REQINV_SLOT1;
1684 data[1] = ISO15693_INVENTORY;
1685 data[2] = 0; // AFI
1686 data[3] = 0; // mask length
1687
1688 for (int i = 0; i < 256; i++) {
1689 data[2] = i & 0xFF;
1690 datalen = Iso15693AddCrc(data,4);
1691 recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time, &eof_time);
1692 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1693 WDT_HIT();
1694 if (recvlen >= 12) {
1695 Dbprintf("AFI=%i UID=%s", i, Iso15693sprintUID(NULL, &recv[2]));
1696 }
1697 }
1698 Dbprintf("AFI Bruteforcing done.");
1699
1700 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1701 LED_D_OFF();
1702 LED_A_OFF();
1703
1704 }
1705
1706 // Allows to directly send commands to the tag via the client
1707 void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]) {
1708
1709 LED_A_ON();
1710
1711 int recvlen = 0;
1712 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1713 uint32_t eof_time;
1714
1715 if (DEBUG) {
1716 Dbprintf("SEND:");
1717 Dbhexdump(datalen, data, false);
1718 }
1719
1720 recvlen = SendDataTag(data, datalen, true, speed, (recv?recvbuf:NULL), sizeof(recvbuf), 0, &eof_time);
1721
1722 // for the time being, switch field off to protect rdv4.0
1723 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1724 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1725 LED_D_OFF();
1726
1727 if (recv) {
1728 if (DEBUG) {
1729 Dbprintf("RECV:");
1730 if (recvlen > 0) {
1731 Dbhexdump(recvlen, recvbuf, false);
1732 DbdecodeIso15693Answer(recvlen, recvbuf);
1733 }
1734 }
1735 if (recvlen > ISO15693_MAX_RESPONSE_LENGTH) {
1736 recvlen = ISO15693_MAX_RESPONSE_LENGTH;
1737 }
1738 cmd_send(CMD_ACK, recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
1739 }
1740
1741 LED_A_OFF();
1742 }
1743
1744 //-----------------------------------------------------------------------------
1745 // Work with "magic Chinese" card.
1746 //
1747 //-----------------------------------------------------------------------------
1748
1749 // Set the UID to the tag (based on Iceman work).
1750 void SetTag15693Uid(uint8_t *uid) {
1751
1752 LED_A_ON();
1753
1754 uint8_t cmd[4][9] = {
1755 {0x02, 0x21, 0x3e, 0x00, 0x00, 0x00, 0x00},
1756 {0x02, 0x21, 0x3f, 0x69, 0x96, 0x00, 0x00},
1757 {0x02, 0x21, 0x38},
1758 {0x02, 0x21, 0x39}
1759 };
1760
1761 uint16_t crc;
1762
1763 int recvlen = 0;
1764 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1765 uint32_t eof_time;
1766
1767 // Command 3 : 022138u8u7u6u5 (where uX = uid byte X)
1768 cmd[2][3] = uid[7];
1769 cmd[2][4] = uid[6];
1770 cmd[2][5] = uid[5];
1771 cmd[2][6] = uid[4];
1772
1773 // Command 4 : 022139u4u3u2u1 (where uX = uid byte X)
1774 cmd[3][3] = uid[3];
1775 cmd[3][4] = uid[2];
1776 cmd[3][5] = uid[1];
1777 cmd[3][6] = uid[0];
1778
1779 for (int i = 0; i < 4; i++) {
1780 // Add the CRC
1781 crc = Iso15693Crc(cmd[i], 7);
1782 cmd[i][7] = crc & 0xff;
1783 cmd[i][8] = crc >> 8;
1784
1785 if (DEBUG) {
1786 Dbprintf("SEND:");
1787 Dbhexdump(sizeof(cmd[i]), cmd[i], false);
1788 }
1789
1790 recvlen = SendDataTag(cmd[i], sizeof(cmd[i]), true, 1, recvbuf, sizeof(recvbuf), 0, &eof_time);
1791
1792 if (DEBUG) {
1793 Dbprintf("RECV:");
1794 if (recvlen > 0) {
1795 Dbhexdump(recvlen, recvbuf, false);
1796 DbdecodeIso15693Answer(recvlen, recvbuf);
1797 }
1798 }
1799
1800 cmd_send(CMD_ACK, recvlen>ISO15693_MAX_RESPONSE_LENGTH?ISO15693_MAX_RESPONSE_LENGTH:recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
1801 }
1802
1803 LED_A_OFF();
1804 }
1805
1806
1807
1808 // --------------------------------------------------------------------
1809 // -- Misc & deprecated functions
1810 // --------------------------------------------------------------------
1811
1812 /*
1813
1814 // do not use; has a fix UID
1815 static void __attribute__((unused)) BuildSysInfoRequest(uint8_t *uid)
1816 {
1817 uint8_t cmd[12];
1818
1819 uint16_t crc;
1820 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1821 // followed by the block data
1822 // one sub-carrier, inventory, 1 slot, fast rate
1823 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1824 // System Information command code
1825 cmd[1] = 0x2B;
1826 // UID may be optionally specified here
1827 // 64-bit UID
1828 cmd[2] = 0x32;
1829 cmd[3]= 0x4b;
1830 cmd[4] = 0x03;
1831 cmd[5] = 0x01;
1832 cmd[6] = 0x00;
1833 cmd[7] = 0x10;
1834 cmd[8] = 0x05;
1835 cmd[9]= 0xe0; // always e0 (not exactly unique)
1836 //Now the CRC
1837 crc = Iso15693Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
1838 cmd[10] = crc & 0xff;
1839 cmd[11] = crc >> 8;
1840
1841 CodeIso15693AsReader(cmd, sizeof(cmd));
1842 }
1843
1844
1845 // do not use; has a fix UID
1846 static void __attribute__((unused)) BuildReadMultiBlockRequest(uint8_t *uid)
1847 {
1848 uint8_t cmd[14];
1849
1850 uint16_t crc;
1851 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1852 // followed by the block data
1853 // one sub-carrier, inventory, 1 slot, fast rate
1854 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1855 // READ Multi BLOCK command code
1856 cmd[1] = 0x23;
1857 // UID may be optionally specified here
1858 // 64-bit UID
1859 cmd[2] = 0x32;
1860 cmd[3]= 0x4b;
1861 cmd[4] = 0x03;
1862 cmd[5] = 0x01;
1863 cmd[6] = 0x00;
1864 cmd[7] = 0x10;
1865 cmd[8] = 0x05;
1866 cmd[9]= 0xe0; // always e0 (not exactly unique)
1867 // First Block number to read
1868 cmd[10] = 0x00;
1869 // Number of Blocks to read
1870 cmd[11] = 0x2f; // read quite a few
1871 //Now the CRC
1872 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1873 cmd[12] = crc & 0xff;
1874 cmd[13] = crc >> 8;
1875
1876 CodeIso15693AsReader(cmd, sizeof(cmd));
1877 }
1878
1879 // do not use; has a fix UID
1880 static void __attribute__((unused)) BuildArbitraryRequest(uint8_t *uid,uint8_t CmdCode)
1881 {
1882 uint8_t cmd[14];
1883
1884 uint16_t crc;
1885 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1886 // followed by the block data
1887 // one sub-carrier, inventory, 1 slot, fast rate
1888 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1889 // READ BLOCK command code
1890 cmd[1] = CmdCode;
1891 // UID may be optionally specified here
1892 // 64-bit UID
1893 cmd[2] = 0x32;
1894 cmd[3]= 0x4b;
1895 cmd[4] = 0x03;
1896 cmd[5] = 0x01;
1897 cmd[6] = 0x00;
1898 cmd[7] = 0x10;
1899 cmd[8] = 0x05;
1900 cmd[9]= 0xe0; // always e0 (not exactly unique)
1901 // Parameter
1902 cmd[10] = 0x00;
1903 cmd[11] = 0x0a;
1904
1905 // cmd[12] = 0x00;
1906 // cmd[13] = 0x00; //Now the CRC
1907 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1908 cmd[12] = crc & 0xff;
1909 cmd[13] = crc >> 8;
1910
1911 CodeIso15693AsReader(cmd, sizeof(cmd));
1912 }
1913
1914 // do not use; has a fix UID
1915 static void __attribute__((unused)) BuildArbitraryCustomRequest(uint8_t uid[], uint8_t CmdCode)
1916 {
1917 uint8_t cmd[14];
1918
1919 uint16_t crc;
1920 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1921 // followed by the block data
1922 // one sub-carrier, inventory, 1 slot, fast rate
1923 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1924 // READ BLOCK command code
1925 cmd[1] = CmdCode;
1926 // UID may be optionally specified here
1927 // 64-bit UID
1928 cmd[2] = 0x32;
1929 cmd[3]= 0x4b;
1930 cmd[4] = 0x03;
1931 cmd[5] = 0x01;
1932 cmd[6] = 0x00;
1933 cmd[7] = 0x10;
1934 cmd[8] = 0x05;
1935 cmd[9]= 0xe0; // always e0 (not exactly unique)
1936 // Parameter
1937 cmd[10] = 0x05; // for custom codes this must be manufacturer code
1938 cmd[11] = 0x00;
1939
1940 // cmd[12] = 0x00;
1941 // cmd[13] = 0x00; //Now the CRC
1942 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1943 cmd[12] = crc & 0xff;
1944 cmd[13] = crc >> 8;
1945
1946 CodeIso15693AsReader(cmd, sizeof(cmd));
1947 }
1948
1949
1950
1951
1952 */
1953
1954
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