1 //-----------------------------------------------------------------------------
2 // The main application code. This is the first thing called after start.c
4 // Jonathan Westhues, Mar 2006
5 // Edits by Gerhard de Koning Gans, Sep 2007 (##)
6 //-----------------------------------------------------------------------------
17 // The large multi-purpose buffer, typically used to hold A/D samples,
18 // maybe pre-processed in some way.
22 //=============================================================================
23 // A buffer where we can queue things up to be sent through the FPGA, for
24 // any purpose (fake tag, as reader, whatever). We go MSB first, since that
25 // is the order in which they go out on the wire.
26 //=============================================================================
33 void BufferClear(void)
35 memset(BigBuf
,0,sizeof(BigBuf
));
36 DbpString("Buffer cleared");
39 void ToSendReset(void)
45 void ToSendStuffBit(int b
)
49 ToSend
[ToSendMax
] = 0;
54 ToSend
[ToSendMax
] |= (1 << (7 - ToSendBit
));
59 if(ToSendBit
>= sizeof(ToSend
)) {
61 DbpString("ToSendStuffBit overflowed!");
65 //=============================================================================
66 // Debug print functions, to go out over USB, to the usual PC-side client.
67 //=============================================================================
69 void DbpString(char *str
)
71 /* this holds up stuff unless we're connected to usb */
76 c
.cmd
= CMD_DEBUG_PRINT_STRING
;
78 memcpy(c
.d
.asBytes
, str
, c
.ext1
);
80 UsbSendPacket((BYTE
*)&c
, sizeof(c
));
81 // TODO fix USB so stupid things like this aren't req'd
85 void DbpIntegers(int x1
, int x2
, int x3
)
87 /* this holds up stuff unless we're connected to usb */
92 c
.cmd
= CMD_DEBUG_PRINT_INTEGERS
;
97 UsbSendPacket((BYTE
*)&c
, sizeof(c
));
102 void AcquireRawAdcSamples125k(BOOL at134khz
)
105 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 88); //134.8Khz
106 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
108 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
109 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
112 // Connect the A/D to the peak-detected low-frequency path.
113 SetAdcMuxFor(GPIO_MUXSEL_LOPKD
);
115 // Give it a bit of time for the resonant antenna to settle.
118 // Now set up the SSC to get the ADC samples that are now streaming at us.
121 // Now call the acquisition routine
122 DoAcquisition125k(at134khz
);
125 // split into two routines so we can avoid timing issues after sending commands //
126 void DoAcquisition125k(BOOL at134khz
)
128 BYTE
*dest
= (BYTE
*)BigBuf
;
129 int n
= sizeof(BigBuf
);
135 if(SSC_STATUS
& (SSC_STATUS_TX_READY
)) {
136 SSC_TRANSMIT_HOLDING
= 0x43;
139 if(SSC_STATUS
& (SSC_STATUS_RX_READY
)) {
140 dest
[i
] = (BYTE
)SSC_RECEIVE_HOLDING
;
148 DbpIntegers(dest
[0], dest
[1], at134khz
);
151 void ModThenAcquireRawAdcSamples125k(int delay_off
,int period_0
,int period_1
,BYTE
*command
)
155 // see if 'h' was specified
156 if(command
[strlen((char *) command
) - 1] == 'h')
162 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 88); //134.8Khz
163 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
165 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
166 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
169 // Give it a bit of time for the resonant antenna to settle.
172 // Now set up the SSC to get the ADC samples that are now streaming at us.
175 // now modulate the reader field
176 while(*command
!= '\0' && *command
!= ' ')
178 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
180 SpinDelayUs(delay_off
);
182 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 88); //134.8Khz
183 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
185 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
186 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
189 if(*(command
++) == '0')
190 SpinDelayUs(period_0
);
192 SpinDelayUs(period_1
);
194 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
196 SpinDelayUs(delay_off
);
198 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 88); //134.8Khz
199 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
201 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
202 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
206 DoAcquisition125k(at134khz
);
209 //-----------------------------------------------------------------------------
210 // Read a TI-type tag. We assume that the tag has already been illuminated,
211 // and that the exciting signal has been turned off. That means that we just
212 // acquire the `one-bit DAC' bits from the comparator.
213 //-----------------------------------------------------------------------------
214 void AcquireTiType(void)
217 int n
= sizeof(BigBuf
);
220 memset(BigBuf
,0,sizeof(BigBuf
));
222 // Set up the synchronous serial port
223 PIO_DISABLE
= (1<<GPIO_SSC_DIN
);
224 PIO_PERIPHERAL_A_SEL
= (1<<GPIO_SSC_DIN
);
226 SSC_CONTROL
= SSC_CONTROL_RESET
;
227 SSC_CONTROL
= SSC_CONTROL_RX_ENABLE
| SSC_CONTROL_TX_ENABLE
;
229 // Sample at 2 Mbit/s, so TI tags are 16.2 vs. 14.9 clocks long
230 // 48/2 = 24 MHz clock must be divided by 12
231 SSC_CLOCK_DIVISOR
= 12;
233 SSC_RECEIVE_CLOCK_MODE
= SSC_CLOCK_MODE_SELECT(0);
234 SSC_RECEIVE_FRAME_MODE
= SSC_FRAME_MODE_BITS_IN_WORD(32) | SSC_FRAME_MODE_MSB_FIRST
;
235 SSC_TRANSMIT_CLOCK_MODE
= 0;
236 SSC_TRANSMIT_FRAME_MODE
= 0;
240 if(SSC_STATUS
& SSC_STATUS_RX_READY
) {
241 BigBuf
[i
] = SSC_RECEIVE_HOLDING
; // store 32 bit values in buffer
242 i
++; if(i
>= n
) return;
248 void AcquireRawBitsTI(void)
251 // TI tags charge at 134.2Khz
252 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 88); //134.8Khz
253 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
255 // Charge TI tag for 50ms.
260 // Place FPGA in passthrough mode so as to stop driving the LF coil,
261 // in this mode the CROSS_LO line connects to SSP_DIN
262 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU
);
264 // get TI tag data into the buffer
267 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
271 //-----------------------------------------------------------------------------
272 // Read an ADC channel and block till it completes, then return the result
273 // in ADC units (0 to 1023). Also a routine to average 32 samples and
275 //-----------------------------------------------------------------------------
276 static int ReadAdc(int ch
)
280 ADC_CONTROL
= ADC_CONTROL_RESET
;
281 ADC_MODE
= ADC_MODE_PRESCALE(32) | ADC_MODE_STARTUP_TIME(16) |
282 ADC_MODE_SAMPLE_HOLD_TIME(8);
283 ADC_CHANNEL_ENABLE
= ADC_CHANNEL(ch
);
285 ADC_CONTROL
= ADC_CONTROL_START
;
286 while(!(ADC_STATUS
& ADC_END_OF_CONVERSION(ch
)))
288 d
= ADC_CHANNEL_DATA(ch
);
293 static int AvgAdc(int ch
)
298 for(i
= 0; i
< 32; i
++) {
302 return (a
+ 15) >> 5;
305 void MeasureAntennaTuning(void)
307 BYTE
*dest
= (BYTE
*)BigBuf
;
308 int i
, ptr
= 0, adcval
= 0, peak
= 0, peakv
= 0, peakf
= 0;;
309 int vLf125
= 0, vLf134
= 0, vHf
= 0; // in mV
313 DbpString("Measuring antenna characteristics, please wait.");
314 memset(BigBuf
,0,sizeof(BigBuf
));
317 * Sweeps the useful LF range of the proxmark from
318 * 46.8kHz (divisor=255) to 600kHz (divisor=19) and
319 * read the voltage in the antenna, the result left
320 * in the buffer is a graph which should clearly show
321 * the resonating frequency of your LF antenna
322 * ( hopefully around 95 if it is tuned to 125kHz!)
324 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
325 for (i
=255; i
>19; i
--) {
326 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, i
);
328 // Vref = 3.3V, and a 10000:240 voltage divider on the input
329 // can measure voltages up to 137500 mV
330 adcval
= ((137500 * AvgAdc(ADC_CHAN_LF
)) >> 10);
331 if (i
==95) vLf125
= adcval
; // voltage at 125Khz
332 if (i
==89) vLf134
= adcval
; // voltage at 134Khz
334 dest
[i
] = adcval
>>8; // scale int to fit in byte for graphing purposes
343 // Let the FPGA drive the high-frequency antenna around 13.56 MHz.
344 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
);
346 // Vref = 3300mV, and an 10:1 voltage divider on the input
347 // can measure voltages up to 33000 mV
348 vHf
= (33000 * AvgAdc(ADC_CHAN_HF
)) >> 10;
350 c
.cmd
= CMD_MEASURED_ANTENNA_TUNING
;
351 c
.ext1
= (vLf125
<< 0) | (vLf134
<< 16);
353 c
.ext3
= peakf
| (peakv
<< 16);
354 UsbSendPacket((BYTE
*)&c
, sizeof(c
));
357 void SimulateTagLowFrequency(int period
, int ledcontrol
)
360 BYTE
*tab
= (BYTE
*)BigBuf
;
362 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_SIMULATOR
);
364 PIO_ENABLE
= (1 << GPIO_SSC_DOUT
) | (1 << GPIO_SSC_CLK
);
366 PIO_OUTPUT_ENABLE
= (1 << GPIO_SSC_DOUT
);
367 PIO_OUTPUT_DISABLE
= (1 << GPIO_SSC_CLK
);
369 #define SHORT_COIL() LOW(GPIO_SSC_DOUT)
370 #define OPEN_COIL() HIGH(GPIO_SSC_DOUT)
374 while(!(PIO_PIN_DATA_STATUS
& (1<<GPIO_SSC_CLK
))) {
376 DbpString("Stopped");
393 while(PIO_PIN_DATA_STATUS
& (1<<GPIO_SSC_CLK
)) {
395 DbpString("Stopped");
402 if(i
== period
) i
= 0;
406 // compose fc/8 fc/10 waveform
407 static void fc(int c
, int *n
) {
408 BYTE
*dest
= (BYTE
*)BigBuf
;
411 // for when we want an fc8 pattern every 4 logical bits
422 // an fc/8 encoded bit is a bit pattern of 11000000 x6 = 48 samples
424 for (idx
=0; idx
<6; idx
++) {
436 // an fc/10 encoded bit is a bit pattern of 1110000000 x5 = 50 samples
438 for (idx
=0; idx
<5; idx
++) {
453 // prepare a waveform pattern in the buffer based on the ID given then
454 // simulate a HID tag until the button is pressed
455 static void CmdHIDsimTAG(int hi
, int lo
, int ledcontrol
)
459 HID tag bitstream format
460 The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits
461 A 1 bit is represented as 6 fc8 and 5 fc10 patterns
462 A 0 bit is represented as 5 fc10 and 6 fc8 patterns
463 A fc8 is inserted before every 4 bits
464 A special start of frame pattern is used consisting a0b0 where a and b are neither 0
465 nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10)
469 DbpString("Tags can only have 44 bits.");
473 // special start of frame marker containing invalid bit sequences
474 fc(8, &n
); fc(8, &n
); // invalid
475 fc(8, &n
); fc(10, &n
); // logical 0
476 fc(10, &n
); fc(10, &n
); // invalid
477 fc(8, &n
); fc(10, &n
); // logical 0
480 // manchester encode bits 43 to 32
481 for (i
=11; i
>=0; i
--) {
482 if ((i
%4)==3) fc(0,&n
);
484 fc(10, &n
); fc(8, &n
); // low-high transition
486 fc(8, &n
); fc(10, &n
); // high-low transition
491 // manchester encode bits 31 to 0
492 for (i
=31; i
>=0; i
--) {
493 if ((i
%4)==3) fc(0,&n
);
495 fc(10, &n
); fc(8, &n
); // low-high transition
497 fc(8, &n
); fc(10, &n
); // high-low transition
503 SimulateTagLowFrequency(n
, ledcontrol
);
509 // loop to capture raw HID waveform then FSK demodulate the TAG ID from it
510 static void CmdHIDdemodFSK(int findone
, int *high
, int *low
, int ledcontrol
)
512 BYTE
*dest
= (BYTE
*)BigBuf
;
513 int m
=0, n
=0, i
=0, idx
=0, found
=0, lastval
=0;
516 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, 95); //125Khz
517 FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER
);
519 // Connect the A/D to the peak-detected low-frequency path.
520 SetAdcMuxFor(GPIO_MUXSEL_LOPKD
);
522 // Give it a bit of time for the resonant antenna to settle.
525 // Now set up the SSC to get the ADC samples that are now streaming at us.
533 DbpString("Stopped");
543 if(SSC_STATUS
& (SSC_STATUS_TX_READY
)) {
544 SSC_TRANSMIT_HOLDING
= 0x43;
548 if(SSC_STATUS
& (SSC_STATUS_RX_READY
)) {
549 dest
[i
] = (BYTE
)SSC_RECEIVE_HOLDING
;
550 // we don't care about actual value, only if it's more or less than a
551 // threshold essentially we capture zero crossings for later analysis
552 if(dest
[i
] < 127) dest
[i
] = 0; else dest
[i
] = 1;
564 // sync to first lo-hi transition
565 for( idx
=1; idx
<m
; idx
++) {
566 if (dest
[idx
-1]<dest
[idx
])
572 // count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)
573 // or 10 (fc/10) cycles but in practice due to noise etc we may end up with with anywhere
574 // between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10
575 for( i
=0; idx
<m
; idx
++) {
576 if (dest
[idx
-1]<dest
[idx
]) {
591 // we now have a set of cycle counts, loop over previous results and aggregate data into bit patterns
596 for( idx
=0; idx
<m
; idx
++) {
597 if (dest
[idx
]==lastval
) {
600 // a bit time is five fc/10 or six fc/8 cycles so figure out how many bits a pattern width represents,
601 // an extra fc/8 pattern preceeds every 4 bits (about 200 cycles) just to complicate things but it gets
602 // swallowed up by rounding
603 // expected results are 1 or 2 bits, any more and it's an invalid manchester encoding
604 // special start of frame markers use invalid manchester states (no transitions) by using sequences
607 n
=(n
+1)/6; // fc/8 in sets of 6
609 n
=(n
+1)/5; // fc/10 in sets of 5
611 switch (n
) { // stuff appropriate bits in buffer
614 dest
[i
++]=dest
[idx
-1];
617 dest
[i
++]=dest
[idx
-1];
618 dest
[i
++]=dest
[idx
-1];
620 case 3: // 3 bit start of frame markers
621 dest
[i
++]=dest
[idx
-1];
622 dest
[i
++]=dest
[idx
-1];
623 dest
[i
++]=dest
[idx
-1];
625 // When a logic 0 is immediately followed by the start of the next transmisson
626 // (special pattern) a pattern of 4 bit duration lengths is created.
628 dest
[i
++]=dest
[idx
-1];
629 dest
[i
++]=dest
[idx
-1];
630 dest
[i
++]=dest
[idx
-1];
631 dest
[i
++]=dest
[idx
-1];
633 default: // this shouldn't happen, don't stuff any bits
643 // final loop, go over previously decoded manchester data and decode into usable tag ID
644 // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
645 for( idx
=0; idx
<m
-6; idx
++) {
646 // search for a start of frame marker
647 if ( dest
[idx
] && dest
[idx
+1] && dest
[idx
+2] && (!dest
[idx
+3]) && (!dest
[idx
+4]) && (!dest
[idx
+5]) )
651 if (found
&& (hi
|lo
)) {
653 DbpIntegers(hi
, lo
, (lo
>>1)&0xffff);
654 /* if we're only looking for one tag */
667 if (dest
[idx
] && (!dest
[idx
+1]) ) {
670 } else if ( (!dest
[idx
]) && dest
[idx
+1]) {
680 if ( dest
[idx
] && dest
[idx
+1] && dest
[idx
+2] && (!dest
[idx
+3]) && (!dest
[idx
+4]) && (!dest
[idx
+5]) )
684 if (found
&& (hi
|lo
)) {
686 DbpIntegers(hi
, lo
, (lo
>>1)&0xffff);
687 /* if we're only looking for one tag */
704 void SimulateTagHfListen(void)
706 BYTE
*dest
= (BYTE
*)BigBuf
;
707 int n
= sizeof(BigBuf
);
712 // We're using this mode just so that I can test it out; the simulated
713 // tag mode would work just as well and be simpler.
714 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
| FPGA_HF_READER_RX_XCORR_SNOOP
);
716 // We need to listen to the high-frequency, peak-detected path.
717 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
723 if(SSC_STATUS
& (SSC_STATUS_TX_READY
)) {
724 SSC_TRANSMIT_HOLDING
= 0xff;
726 if(SSC_STATUS
& (SSC_STATUS_RX_READY
)) {
727 BYTE r
= (BYTE
)SSC_RECEIVE_HOLDING
;
747 DbpString("simulate tag (now type bitsamples)");
750 void UsbPacketReceived(BYTE
*packet
, int len
)
752 UsbCommand
*c
= (UsbCommand
*)packet
;
755 case CMD_ACQUIRE_RAW_ADC_SAMPLES_125K
:
756 AcquireRawAdcSamples125k(c
->ext1
);
759 case CMD_MOD_THEN_ACQUIRE_RAW_ADC_SAMPLES_125K
:
760 ModThenAcquireRawAdcSamples125k(c
->ext1
,c
->ext2
,c
->ext3
,c
->d
.asBytes
);
763 case CMD_ACQUIRE_RAW_BITS_TI_TYPE
:
767 case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_15693
:
768 AcquireRawAdcSamplesIso15693();
775 case CMD_READER_ISO_15693
:
776 ReaderIso15693(c
->ext1
);
779 case CMD_SIMTAG_ISO_15693
:
780 SimTagIso15693(c
->ext1
);
783 case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_14443
:
784 AcquireRawAdcSamplesIso14443(c
->ext1
);
787 case CMD_READ_SRI512_TAG
:
788 ReadSRI512Iso14443(c
->ext1
);
791 case CMD_READER_ISO_14443a
:
792 ReaderIso14443a(c
->ext1
);
795 case CMD_SNOOP_ISO_14443
:
799 case CMD_SNOOP_ISO_14443a
:
803 case CMD_SIMULATE_TAG_HF_LISTEN
:
804 SimulateTagHfListen();
807 case CMD_SIMULATE_TAG_ISO_14443
:
808 SimulateIso14443Tag();
811 case CMD_SIMULATE_TAG_ISO_14443a
:
812 SimulateIso14443aTag(c
->ext1
, c
->ext2
); // ## Simulate iso14443a tag - pass tag type & UID
815 case CMD_MEASURE_ANTENNA_TUNING
:
816 MeasureAntennaTuning();
819 case CMD_LISTEN_READER_FIELD
:
820 ListenReaderField(c
->ext1
);
823 case CMD_HID_DEMOD_FSK
:
824 CmdHIDdemodFSK(0, 0, 0, 1); // Demodulate HID tag
827 case CMD_HID_SIM_TAG
:
828 CmdHIDsimTAG(c
->ext1
, c
->ext2
, 1); // Simulate HID tag by ID
831 case CMD_FPGA_MAJOR_MODE_OFF
: // ## FPGA Control
832 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
834 LED_D_OFF(); // LED D indicates field ON or OFF
837 case CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K
:
838 case CMD_DOWNLOAD_RAW_BITS_TI_TYPE
: {
840 if(c
->cmd
== CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K
) {
841 n
.cmd
= CMD_DOWNLOADED_RAW_ADC_SAMPLES_125K
;
843 n
.cmd
= CMD_DOWNLOADED_RAW_BITS_TI_TYPE
;
846 memcpy(n
.d
.asDwords
, BigBuf
+c
->ext1
, 12*sizeof(DWORD
));
847 UsbSendPacket((BYTE
*)&n
, sizeof(n
));
850 case CMD_DOWNLOADED_SIM_SAMPLES_125K
: {
851 BYTE
*b
= (BYTE
*)BigBuf
;
852 memcpy(b
+c
->ext1
, c
->d
.asBytes
, 48);
855 case CMD_SIMULATE_TAG_125K
:
857 SimulateTagLowFrequency(c
->ext1
, 1);
868 case CMD_SET_LF_DIVISOR
:
869 FpgaSendCommand(FPGA_CMD_SET_DIVISOR
, c
->ext1
);
876 case CMD_SETUP_WRITE
:
877 case CMD_FINISH_WRITE
:
878 case CMD_HARDWARE_RESET
:
879 USB_D_PLUS_PULLUP_OFF();
882 RSTC_CONTROL
= RST_CONTROL_KEY
| RST_CONTROL_PROCESSOR_RESET
;
884 // We're going to reset, and the bootrom will take control.
890 DbpString("unknown command");
895 void ReadMem(int addr
)
897 const DWORD
*data
= ((DWORD
*)addr
);
900 DbpString("Reading memory at address");
901 DbpIntegers(0, 0, addr
);
902 for (i
= 0; i
< 8; i
+= 2)
903 DbpIntegers(0, data
[i
], data
[i
+1]);
908 memset(BigBuf
,0,sizeof(BigBuf
));
918 // The FPGA gets its clock from us from PCK0 output, so set that up.
919 PIO_PERIPHERAL_B_SEL
= (1 << GPIO_PCK0
);
920 PIO_DISABLE
= (1 << GPIO_PCK0
);
921 PMC_SYS_CLK_ENABLE
= PMC_SYS_CLK_PROGRAMMABLE_CLK_0
;
922 // PCK0 is PLL clock / 4 = 96Mhz / 4 = 24Mhz
923 PMC_PROGRAMMABLE_CLK_0
= PMC_CLK_SELECTION_PLL_CLOCK
|
924 PMC_CLK_PRESCALE_DIV_4
;
925 PIO_OUTPUT_ENABLE
= (1 << GPIO_PCK0
);
928 SPI_CONTROL
= SPI_CONTROL_RESET
;
930 SSC_CONTROL
= SSC_CONTROL_RESET
;
932 // Load the FPGA image, which we have stored in our flash.
939 // test text on different colored backgrounds
940 LCDString(" The quick brown fox ", &FONT6x8
,1,1+8*0,WHITE
,BLACK
);
941 LCDString(" jumped over the ", &FONT6x8
,1,1+8*1,BLACK
,WHITE
);
942 LCDString(" lazy dog. ", &FONT6x8
,1,1+8*2,YELLOW
,RED
);
943 LCDString(" AaBbCcDdEeFfGgHhIiJj ", &FONT6x8
,1,1+8*3,RED
,GREEN
);
944 LCDString(" KkLlMmNnOoPpQqRrSsTt ", &FONT6x8
,1,1+8*4,MAGENTA
,BLUE
);
945 LCDString("UuVvWwXxYyZz0123456789", &FONT6x8
,1,1+8*5,BLUE
,YELLOW
);
946 LCDString("`-=[]_;',./~!@#$%^&*()", &FONT6x8
,1,1+8*6,BLACK
,CYAN
);
947 LCDString(" _+{}|:\\\"<>? ",&FONT6x8
,1,1+8*7,BLUE
,MAGENTA
);
950 LCDFill(0, 1+8* 8, 132, 8, BLACK
);
951 LCDFill(0, 1+8* 9, 132, 8, WHITE
);
952 LCDFill(0, 1+8*10, 132, 8, RED
);
953 LCDFill(0, 1+8*11, 132, 8, GREEN
);
954 LCDFill(0, 1+8*12, 132, 8, BLUE
);
955 LCDFill(0, 1+8*13, 132, 8, YELLOW
);
956 LCDFill(0, 1+8*14, 132, 8, CYAN
);
957 LCDFill(0, 1+8*15, 132, 8, MAGENTA
);
962 usbattached
= UsbPoll(FALSE
);
965 if (BUTTON_HELD(1000) > 0)
971 // samy's sniff and repeat routine
974 DbpString("Stand-alone mode! No PC necessary.");
976 // 3 possible options? no just 2 for now
979 int high
[OPTS
], low
[OPTS
];
981 // Oooh pretty -- notify user we're in elite samy mode now
983 LED(LED_ORANGE
, 200);
985 LED(LED_ORANGE
, 200);
987 LED(LED_ORANGE
, 200);
989 LED(LED_ORANGE
, 200);
995 // Turn on selected LED
996 LED(selected
+ 1, 0);
1000 usbattached
= UsbPoll(FALSE
);
1003 // Was our button held down or pressed?
1004 int button_pressed
= BUTTON_HELD(1000);
1007 // Button was held for a second, begin recording
1008 if (button_pressed
> 0)
1011 LED(selected
+ 1, 0);
1015 DbpString("Starting recording");
1017 // wait for button to be released
1018 while(BUTTON_PRESS())
1021 /* need this delay to prevent catching some weird data */
1024 CmdHIDdemodFSK(1, &high
[selected
], &low
[selected
], 0);
1025 DbpString("Recorded");
1026 DbpIntegers(selected
, high
[selected
], low
[selected
]);
1029 LED(selected
+ 1, 0);
1030 // Finished recording
1032 // If we were previously playing, set playing off
1033 // so next button push begins playing what we recorded
1037 // Change where to record (or begin playing)
1038 else if (button_pressed
)
1040 // Next option if we were previously playing
1042 selected
= (selected
+ 1) % OPTS
;
1046 LED(selected
+ 1, 0);
1048 // Begin transmitting
1052 DbpString("Playing");
1053 // wait for button to be released
1054 while(BUTTON_PRESS())
1056 DbpIntegers(selected
, high
[selected
], low
[selected
]);
1057 CmdHIDsimTAG(high
[selected
], low
[selected
], 0);
1058 DbpString("Done playing");
1059 if (BUTTON_HELD(1000) > 0)
1061 DbpString("Exiting");
1066 /* We pressed a button so ignore it here with a delay */
1069 // when done, we're done playing, move to next option
1070 selected
= (selected
+ 1) % OPTS
;
1073 LED(selected
+ 1, 0);
1076 while(BUTTON_PRESS())
1083 // listen for external reader
1084 void ListenReaderField(int limit
)
1086 int lf_av
, lf_av_new
, lf_baseline
= 0, lf_count
= 0;
1087 int hf_av
, hf_av_new
, hf_baseline
= 0, hf_count
= 0;
1097 lf_av
= ReadAdc(ADC_CHAN_LF
);
1099 if(limit
!= HF_ONLY
)
1101 DbpString("LF 125/134 Baseline:");
1102 DbpIntegers(lf_av
,0,0);
1106 hf_av
= ReadAdc(ADC_CHAN_HF
);
1109 if (limit
!= LF_ONLY
)
1111 DbpString("HF 13.56 Baseline:");
1112 DbpIntegers(hf_av
,0,0);
1120 DbpString("Stopped");
1128 if (limit
!= HF_ONLY
)
1130 if (abs(lf_av
- lf_baseline
) > 10)
1135 lf_av_new
= ReadAdc(ADC_CHAN_LF
);
1136 // see if there's a significant change
1137 if(abs(lf_av
- lf_av_new
) > 10)
1139 DbpString("LF 125/134 Field Change:");
1140 DbpIntegers(lf_av
,lf_av_new
,lf_count
);
1146 if (limit
!= LF_ONLY
)
1148 if (abs(hf_av
- hf_baseline
) > 10)
1153 hf_av_new
= ReadAdc(ADC_CHAN_HF
);
1154 // see if there's a significant change
1155 if(abs(hf_av
- hf_av_new
) > 10)
1157 DbpString("HF 13.56 Field Change:");
1158 DbpIntegers(hf_av
,hf_av_new
,hf_count
);