#define TR1 0
// Frame Delay Time PICC to PCD (per 14443-3 Amendment 1)
#define TR2 0
+
+// 4sample
+#define SEND4STUFFBIT(x) ToSendStuffBit(x);ToSendStuffBit(x);ToSendStuffBit(x);ToSendStuffBit(x);
+//#define SEND4STUFFBIT(x) ToSendStuffBit(x);
+
static void switch_off(void);
// the block number for the ISO14443-4 PCB (used with APDUs)
}
void AppendCrc14443b(uint8_t* data, int len) {
- ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1);
+ ComputeCrc14443(CRC_14443_B, data, len, data+len, data+len+1);
}
//-----------------------------------------------------------------------------
*
*/
- // ToSendStuffBit, 40 calls
- // 1 ETU = 1startbit, 1stopbit, 8databits == 10bits.
- // 1 ETU = 10 * 4 == 40 stuffbits ( ETU_TAG_BIT )
int i,j;
uint8_t b;
// Send SOF.
// 10-11 ETU * 4times samples ZEROS
- for(i = 0; i < 10; i++) {
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- }
+ for(i = 0; i < 10; i++) { SEND4STUFFBIT(0); }
+ //for(i = 0; i < 10; i++) { ToSendStuffBit(0); }
// 2-3 ETU * 4times samples ONES
- for(i = 0; i < 3; i++) {
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- }
+ for(i = 0; i < 3; i++) { SEND4STUFFBIT(1); }
+ //for(i = 0; i < 3; i++) { ToSendStuffBit(1); }
// data
for(i = 0; i < len; ++i) {
// Start bit
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
+ SEND4STUFFBIT(0);
+ //ToSendStuffBit(0);
// Data bits
b = cmd[i];
for(j = 0; j < 8; ++j) {
- if(b & 1) {
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
+ if(b & 1) {
+ SEND4STUFFBIT(1);
+ //ToSendStuffBit(1);
} else {
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
+ SEND4STUFFBIT(0);
+ //ToSendStuffBit(0);
}
b >>= 1;
}
// Stop bit
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
+ SEND4STUFFBIT(1);
+ //ToSendStuffBit(1);
// Extra Guard bit
// For PICC it ranges 0-18us (1etu = 9us)
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
-
- ToSendStuffBit(1);
- ToSendStuffBit(1);
+ SEND4STUFFBIT(1);
+ //ToSendStuffBit(1);
}
// Send EOF.
// 10-11 ETU * 4 sample rate = ZEROS
- for(i = 0; i < 10; i++) {
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- ToSendStuffBit(0);
- }
+ for(i = 0; i < 10; i++) { SEND4STUFFBIT(0); }
+ //for(i = 0; i < 10; i++) { ToSendStuffBit(0); }
// why this?
- for(i = 0; i < 40; i++) {
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- ToSendStuffBit(1);
- }
+ for(i = 0; i < 40; i++) { SEND4STUFFBIT(1); }
+ //for(i = 0; i < 40; i++) { ToSendStuffBit(1); }
// Convert from last byte pos to length
++ToSendMax;
switch(Uart.state) {
case STATE_UNSYNCD:
if(!bit) {
- // we went low, so this could be the beginning
- // of an SOF
+ // we went low, so this could be the beginning of an SOF
Uart.state = STATE_GOT_FALLING_EDGE_OF_SOF;
Uart.posCnt = 0;
Uart.bitCnt = 0;
// Signal field is off with the appropriate LED
LED_D_OFF();
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
-
+
StartCountSspClk();
+ volatile uint8_t b;
+
+ // clear receiving shift register and holding register
+ // What does this loop do? Is it TR1?
+ for(uint8_t c = 0; c < 10;) {
+ if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
+ AT91C_BASE_SSC->SSC_THR = 0xFF;
+ ++c;
+ }
+ }
+
// Now run a `software UART' on the stream of incoming samples.
UartInit(received);
- uint8_t b = 0;
- for(;;) {
- WDT_HIT();
- if(BUTTON_PRESS()) return FALSE;
+ b = 0;
+ uint8_t mask;
+ while( !BUTTON_PRESS() ) {
+ WDT_HIT();
- if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
- b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
- for(uint8_t mask = 0x80; mask != 0x00; mask >>= 1) {
- if(Handle14443bReaderUartBit(b & mask)) {
+ if ( AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY ) {
+ b = (uint8_t) AT91C_BASE_SSC->SSC_RHR;
+ for ( mask = 0x80; mask != 0; mask >>= 1) {
+ if ( Handle14443bReaderUartBit(b & mask)) {
*len = Uart.byteCnt;
return TRUE;
}
return FALSE;
}
+void ClearFpgaShiftingRegisters(void){
+
+ volatile uint8_t b;
+
+ // clear receiving shift register and holding register
+ while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
+
+ b = AT91C_BASE_SSC->SSC_RHR; (void) b;
+
+ while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
+
+ b = AT91C_BASE_SSC->SSC_RHR; (void) b;
+
+
+ // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
+ for (uint8_t j = 0; j < 5; j++) { // allow timeout - better late than never
+ while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
+ if (AT91C_BASE_SSC->SSC_RHR) break;
+ }
+
+ // Clear TXRDY:
+ //AT91C_BASE_SSC->SSC_THR = 0xFF;
+}
+
+void WaitForFpgaDelayQueueIsEmpty( uint16_t delay ){
+ // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
+ uint8_t fpga_queued_bits = delay >> 3; // twich /8 ?? >>3,
+ for (uint8_t i = 0; i <= fpga_queued_bits/8 + 1; ) {
+ if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
+ AT91C_BASE_SSC->SSC_THR = 0xFF;
+ i++;
+ }
+ }
+}
+
+static void TransmitFor14443b_AsTag( uint8_t *response, uint16_t len) {
+
+ // Signal field is off with the appropriate LED
+ LED_D_OFF();
+ //uint16_t fpgasendQueueDelay = 0;
+
+ // Modulate BPSK
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
+
+ ClearFpgaShiftingRegisters();
+
+ FpgaSetupSsc();
+ volatile uint32_t b;
+
+ // Transmit the response.
+ for(uint16_t i = 0; i < len;) {
+ if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+ AT91C_BASE_SSC->SSC_THR = response[++i];
+ }
+ if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
+ b = AT91C_BASE_SSC->SSC_RHR;
+ (void)b;
+ }
+ }
+
+ //WaitForFpgaDelayQueueIsEmpty(fpgasendQueueDelay);
+ AT91C_BASE_SSC->SSC_THR = 0xFF;
+}
//-----------------------------------------------------------------------------
// Main loop of simulated tag: receive commands from reader, decide what
// response to send, and send it.
//-----------------------------------------------------------------------------
-void SimulateIso14443bTag(void) {
- // the only commands we understand is WUPB, AFI=0, Select All, N=1:
- static const uint8_t cmd1[] = { ISO14443B_REQB, 0x00, 0x08, 0x39, 0x73 }; // WUPB
- // ... and REQB, AFI=0, Normal Request, N=1:
- static const uint8_t cmd2[] = { ISO14443B_REQB, 0x00, 0x00, 0x71, 0xFF }; // REQB
- // ... and HLTB
- static const uint8_t cmd3[] = { ISO14443B_HALT, 0xff, 0xff, 0xff, 0xff }; // HLTB
- // ... and ATTRIB
- static const uint8_t cmd4[] = { ISO14443B_ATTRIB, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB
+void SimulateIso14443bTag(uint32_t pupi) {
- // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
- // supports only 106kBit/s in both directions, max frame size = 32Bytes,
- // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported:
- static const uint8_t response1[] = {
- 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
- 0x00, 0x21, 0x85, 0x5e, 0xd7
- };
- // response to HLTB and ATTRIB
- static const uint8_t response2[] = {0x00, 0x78, 0xF0};
-
+ ///////////// setup device.
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
// allocate command receive buffer
BigBuf_Clear_ext(false);
clear_trace(); //sim
set_tracing(TRUE);
-
- const uint8_t *resp;
- uint8_t *respCode;
- uint16_t respLen, respCodeLen, len, cmdsRecvd = 0;
- uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
-
- // prepare the (only one) tag answer:
- CodeIso14443bAsTag(response1, sizeof(response1));
- uint8_t *resp1Code = BigBuf_malloc(ToSendMax);
- memcpy(resp1Code, ToSend, ToSendMax);
- uint16_t resp1CodeLen = ToSendMax;
- PrintToSendBuffer();
- DbpString("Printing Resp1Code:");
- Dbhexdump(resp1CodeLen, resp1Code, 0);
-
- // prepare the (other) tag answer:
- CodeIso14443bAsTag(response2, sizeof(response2));
- uint8_t *resp2Code = BigBuf_malloc(ToSendMax);
- memcpy(resp2Code, ToSend, ToSendMax);
- uint16_t resp2CodeLen = ToSendMax;
- PrintToSendBuffer();
-
- // We need to listen to the high-frequency, peak-detected path.
+
+ // connect Demodulated Signal to ADC:
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
+
+ // Set up the synchronous serial port
FpgaSetupSsc();
+ /////////////
- uint32_t time_0 =0;
- uint32_t t2r_time =0;
- uint32_t r2t_time =0;
- cmdsRecvd = 0;
+ uint16_t len, cmdsReceived = 0;
+ int cardSTATE = SIM_NOFIELD;
+ int vHf = 0; // in mV
+ // uint32_t time_0 = 0;
+ // uint32_t t2r_time = 0;
+ // uint32_t r2t_time = 0;
+ uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
+
+ // the only commands we understand is WUPB, AFI=0, Select All, N=1:
+// static const uint8_t cmdWUPB[] = { ISO14443B_REQB, 0x00, 0x08, 0x39, 0x73 }; // WUPB
+ // ... and REQB, AFI=0, Normal Request, N=1:
+// static const uint8_t cmdREQB[] = { ISO14443B_REQB, 0x00, 0x00, 0x71, 0xFF }; // REQB
+ // ... and ATTRIB
+// static const uint8_t cmdATTRIB[] = { ISO14443B_ATTRIB, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB
- for(;;) {
+ // ... if not PUPI/UID is supplied we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
+ // supports only 106kBit/s in both directions, max frame size = 32Bytes,
+ // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported:
+ uint8_t respATQB[] = { 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19,
+ 0x22, 0x00, 0x21, 0x85, 0x5e, 0xd7 };
+
+ // response to HLTB and ATTRIB
+ static const uint8_t respOK[] = {0x00, 0x78, 0xF0};
- if (!GetIso14443bCommandFromReader(receivedCmd, &len)) {
- Dbprintf("button pressed, received %d commands", cmdsRecvd);
- break;
- }
- r2t_time = GetCountSspClk();
+ // ...PUPI/UID supplied from user. Adjust ATQB response accordingly
+ if ( pupi > 0 ) {
+ uint8_t len = sizeof(respATQB);
+ num_to_bytes(pupi, 4, respATQB+1);
+ ComputeCrc14443(CRC_14443_B, respATQB, 12, &respATQB[len-2], &respATQB[len-1]);
+ }
- if (tracing)
- LogTrace(receivedCmd, len, (r2t_time - time_0), (r2t_time - time_0), NULL, TRUE);
-
+ // prepare "ATQB" tag answer (encoded):
+ CodeIso14443bAsTag(respATQB, sizeof(respATQB));
+ uint8_t *encodedATQB = BigBuf_malloc(ToSendMax);
+ uint16_t encodedATQBLen = ToSendMax;
+ memcpy(encodedATQB, ToSend, ToSendMax);
- // Good, look at the command now.
- if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0)
- || (len == sizeof(cmd2) && memcmp(receivedCmd, cmd2, len) == 0) ) {
- resp = response1;
- respLen = sizeof(response1);
- respCode = resp1Code;
- respCodeLen = resp1CodeLen;
- } else if ( (len == sizeof(cmd3) && receivedCmd[0] == cmd3[0])
- || (len == sizeof(cmd4) && receivedCmd[0] == cmd4[0]) ) {
- resp = response2;
- respLen = sizeof(response2);
- respCode = resp2Code;
- respCodeLen = resp2CodeLen;
- } else {
- Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd);
-
- // And print whether the CRC fails, just for good measure
- uint8_t b1, b2;
- if (len >= 3){ // if crc exists
- ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
- if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1])
- DbpString("+++CRC fail");
- else
- DbpString("CRC passes");
- }
- //get rid of compiler warning
- respCodeLen = 0;
- resp = response1;
- respLen = 0;
- respCode = resp1Code;
- //don't crash at new command just wait and see if reader will send other new cmds.
- //break;
- }
+
+ // prepare "OK" tag answer (encoded):
+ CodeIso14443bAsTag(respOK, sizeof(respOK));
+ uint8_t *encodedOK = BigBuf_malloc(ToSendMax);
+ uint16_t encodedOKLen = ToSendMax;
+ memcpy(encodedOK, ToSend, ToSendMax);
+
+ // Simulation loop
+ while (!BUTTON_PRESS() && !usb_poll_validate_length()) {
+ WDT_HIT();
- ++cmdsRecvd;
+ // find reader field
+ if (cardSTATE == SIM_NOFIELD) {
+ vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
+ if ( vHf > MF_MINFIELDV ) {
+ cardSTATE = SIM_IDLE;
+ LED_A_ON();
+ }
+ }
+ if (cardSTATE == SIM_NOFIELD) continue;
- if(cmdsRecvd > 1000) {
- DbpString("1000 commands later...");
+ // Get reader command
+ if (!GetIso14443bCommandFromReader(receivedCmd, &len)) {
+ Dbprintf("button pressed, received %d commands", cmdsReceived);
break;
}
- if(respCodeLen <= 0) continue;
-
- // Modulate BPSK
- // Signal field is off with the appropriate LED
- LED_D_OFF();
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
-
- AT91C_BASE_SSC->SSC_THR = 0xff;
-
- FpgaSetupSsc();
-
- // Transmit the response.
- uint16_t i = 0;
- volatile uint8_t b;
- for(;;) {
- if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
-
- AT91C_BASE_SSC->SSC_THR = respCode[i];
- i++;
- if(i > respCodeLen)
- break;
- }
-
- if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
- b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
- (void)b;
+ // ISO14443-B protocol states:
+ // REQ or WUP request in ANY state
+ // WUP in HALTED state
+ if (len == 5 ) {
+ if ( (receivedCmd[0] == ISO14443B_REQB && (receivedCmd[2] & 0x8)== 0x8 && cardSTATE == SIM_HALTED) ||
+ receivedCmd[0] == ISO14443B_REQB ){
+ LogTrace(receivedCmd, len, 0, 0, NULL, TRUE);
+ cardSTATE = SIM_SELECTING;
}
}
- t2r_time = GetCountSspClk();
+ /*
+ * How should this flow go?
+ * REQB or WUPB
+ * send response ( waiting for Attrib)
+ * ATTRIB
+ * send response ( waiting for commands 7816)
+ * HALT
+ send halt response ( waiting for wupb )
+ */
- if (tracing)
- LogTrace(resp, respLen, (t2r_time-time_0), (t2r_time-time_0), NULL, FALSE);
+ switch(cardSTATE){
+ case SIM_NOFIELD:
+ case SIM_HALTED:
+ case SIM_IDLE:{
+ LogTrace(receivedCmd, len, 0, 0, NULL, TRUE);
+ break;
+ }
+ case SIM_SELECTING: {
+ TransmitFor14443b_AsTag( encodedATQB, encodedATQBLen );
+ LogTrace(respATQB, sizeof(respATQB), 0, 0, NULL, FALSE);
+ cardSTATE = SIM_WORK;
+ break;
+ }
+ case SIM_HALTING: {
+ TransmitFor14443b_AsTag( encodedOK, encodedOKLen );
+ LogTrace(respOK, sizeof(respOK), 0, 0, NULL, FALSE);
+ cardSTATE = SIM_HALTED;
+ break;
+ }
+ case SIM_ACKNOWLEDGE:{
+ TransmitFor14443b_AsTag( encodedOK, encodedOKLen );
+ LogTrace(respOK, sizeof(respOK), 0, 0, NULL, FALSE);
+ cardSTATE = SIM_IDLE;
+ break;
+ }
+ case SIM_WORK:{
+ if ( len == 7 && receivedCmd[0] == ISO14443B_HALT ) {
+ cardSTATE = SIM_HALTED;
+ } else if ( len == 11 && receivedCmd[0] == ISO14443B_ATTRIB ) {
+ cardSTATE = SIM_ACKNOWLEDGE;
+ } else {
+ // Todo:
+ // - SLOT MARKER
+ // - ISO7816
+ // - emulate with a memory dump
+ Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsReceived);
+
+ // CRC Check
+ uint8_t b1, b2;
+ if (len >= 3){ // if crc exists
+ ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
+ if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1])
+ DbpString("+++CRC fail");
+ else
+ DbpString("CRC passes");
+ }
+ cardSTATE = SIM_IDLE;
+ }
+ break;
+ }
+ default: break;
+ }
+
+ ++cmdsReceived;
+ if(cmdsReceived > 1000) {
+ DbpString("14B Simulate, 1000 commands later...");
+ break;
+ }
}
-
+ if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen());
switch_off(); //simulate
}
Demod.posCount = 0; // start of SOF sequence
} else {
// maximum length of TR1 = 200 1/fs
- if(Demod.posCount > 25*2) Demod.state = DEMOD_UNSYNCD;
+ if(Demod.posCount > 26*2) Demod.state = DEMOD_UNSYNCD;
}
++Demod.posCount;
break;
if(v > 0) {
// low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
- if(Demod.posCount < 9*2) {
+ if(Demod.posCount < 8*2) {
Demod.state = DEMOD_UNSYNCD;
} else {
LED_C_ON(); // Got SOF
}
} else {
// low phase of SOF too long (> 12 etu)
- if (Demod.posCount > 12*2) {
+ if (Demod.posCount > 14*2) {
Demod.state = DEMOD_UNSYNCD;
LED_C_OFF();
}
MAKE_SOFT_DECISION();
if (v > 0) {
- if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
+ if(Demod.posCount > 2*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
Demod.state = DEMOD_UNSYNCD;
LED_C_OFF();
}
* Demodulate the samples we received from the tag, also log to tracebuffer
* quiet: set to 'TRUE' to disable debug output
*/
-static void GetTagSamplesFor14443bDemod(bool quiet) {
+static void GetTagSamplesFor14443bDemod() {
bool gotFrame = FALSE;
int lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
int max = 0, ci = 0, cq = 0, samples = 0;
// And put the FPGA in the appropriate mode
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
-
+
while( !BUTTON_PRESS() ) {
WDT_HIT();
FpgaDisableSscDma();
- if (!quiet) {
+ if (MF_DBGLEVEL >= 3) {
Dbprintf("max behindby = %d, samples = %d, gotFrame = %s, Demod.state = %d, Demod.len = %u",
max,
samples,
}
if ( Demod.len > 0 )
LogTrace(Demod.output, Demod.len, Demod.startTime, Demod.endTime, NULL, FALSE);
-
- // free mem refs.
- // if ( dmaBuf ) dmaBuf = NULL;
- // if ( upTo ) upTo = NULL;
}
//-----------------------------------------------------------------------------
static void TransmitFor14443b_AsReader(void) {
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
- SpinDelay(20);
-
- int c;
// we could been in following mode:
// FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ
// if its second call or more
+
+ // while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
+ // AT91C_BASE_SSC->SSC_THR = 0XFF;
+ // }
+
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
+ SpinDelay(40);
+ int c;
+ volatile uint32_t b;
+
// What does this loop do? Is it TR1?
- for(c = 0; c < 10;) {
+ // 0xFF = 8 bits of 1. 1 bit == 1Etu,..
+ // loop 10 * 8 = 80 ETU of delay, with a non modulated signal. why?
+ // 80*9 = 720us.
+ for(c = 0; c < 50;) {
if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
AT91C_BASE_SSC->SSC_THR = 0xFF;
++c;
}
+ if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
+ b = AT91C_BASE_SSC->SSC_RHR;
+ (void)b;
+ }
}
-
+
// Send frame loop
for(c = 0; c < ToSendMax;) {
if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
- AT91C_BASE_SSC->SSC_THR = ToSend[c];
- ++c;
+ AT91C_BASE_SSC->SSC_THR = ToSend[c++];
}
+ if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
+ b = AT91C_BASE_SSC->SSC_RHR;
+ (void)b;
+ }
}
+ //WaitForFpgaDelayQueueIsEmpty(delay);
+ // We should wait here for the FPGA to send all bits.
WDT_HIT();
}
*
* 1 ETU == 1 BIT!
* TR0 - 8 ETUS minimum.
+ *
+ * QUESTION: how long is a 1 or 0 in pulses in the xcorr_848 mode?
+ * 1 "stuffbit" = 1ETU (9us)
*/
int i;
uint8_t b;
// Transition time. TR0 - guard time
// 8ETUS minum?
// Per specification, Subcarrier must be stopped no later than 2 ETUs after EOF.
- for(i = 0; i < 40 ; ++i) ToSendStuffBit(1);
+ // I'm guessing this is for the FPGA to be able to send all bits before we switch to listening mode
+ for(i = 0; i < 32 ; ++i) ToSendStuffBit(1);
// TR1 - Synchronization time
// Convert from last character reference to length
if(trigger) LED_A_ON();
- if (tracing) LogTrace(cmd, len, time_start, GetCountSspClk()-time_start, NULL, TRUE);
+ LogTrace(cmd, len, time_start, GetCountSspClk()-time_start, NULL, TRUE);
}
/* Sends an APDU to the tag
// send
CodeAndTransmit14443bAsReader(message_frame, message_length + 4); //no
// get response
- GetTagSamplesFor14443bDemod(TRUE); //no
+ GetTagSamplesFor14443bDemod(); //no
if(Demod.len < 3)
return 0;
uint8_t crc[2] = {0x00, 0x00};
CodeAndTransmit14443bAsReader(init_srx, sizeof(init_srx));
- GetTagSamplesFor14443bDemod(TRUE); //no
+ GetTagSamplesFor14443bDemod(); //no
if (Demod.len == 0) return 2;
ComputeCrc14443(CRC_14443_B, select_srx, 2, &select_srx[2], &select_srx[3]);
CodeAndTransmit14443bAsReader(select_srx, sizeof(select_srx));
- GetTagSamplesFor14443bDemod(TRUE); //no
+ GetTagSamplesFor14443bDemod(); //no
if (Demod.len != 3) return 2;
ComputeCrc14443(CRC_14443_B, select_srx, 1 , &select_srx[1], &select_srx[2]);
CodeAndTransmit14443bAsReader(select_srx, 3); // Only first three bytes for this one
- GetTagSamplesFor14443bDemod(TRUE); //no
+ GetTagSamplesFor14443bDemod(); //no
if (Demod.len != 10) return 2;
// first, wake up the tag
CodeAndTransmit14443bAsReader(wupb, sizeof(wupb));
- GetTagSamplesFor14443bDemod(TRUE); //select_card
+ GetTagSamplesFor14443bDemod(); //select_card
// ATQB too short?
if (Demod.len < 14) return 2;
ComputeCrc14443(CRC_14443_B, attrib, 9, attrib + 9, attrib + 10);
CodeAndTransmit14443bAsReader(attrib, sizeof(attrib));
- GetTagSamplesFor14443bDemod(TRUE);//select_card
+ GetTagSamplesFor14443bDemod();//select_card
// Answer to ATTRIB too short?
if(Demod.len < 3) return 2;
return 3;
// CID
- if (card) card->cid = Demod.output[0];
-
- uint8_t fwt = card->atqb[6]>>4;
- if ( fwt < 16 ){
- uint32_t fwt_time = (302 << fwt);
- iso14b_set_timeout( fwt_time);
+ if (card) {
+ card->cid = Demod.output[0];
+ uint8_t fwt = card->atqb[6] >> 4;
+ if ( fwt < 16 ){
+ uint32_t fwt_time = (302 << fwt);
+ iso14b_set_timeout( fwt_time);
+ }
}
// reset PCB block number
pcb_blocknum = 0;
// First command: wake up the tag using the INITIATE command
uint8_t cmd1[] = {ISO14443B_INITIATE, 0x00, 0x97, 0x5b};
CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); //no
- GetTagSamplesFor14443bDemod(TRUE); // no
+ GetTagSamplesFor14443bDemod(); // no
if (Demod.len == 0) {
DbpString("No response from tag");
cmd1[1] = Demod.output[0];
ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); //no
- GetTagSamplesFor14443bDemod(TRUE); //no
+ GetTagSamplesFor14443bDemod(); //no
if (Demod.len != 3) {
Dbprintf("Expected 3 bytes from tag, got %d", Demod.len);
set_tracing(FALSE);
cmd1[0] = ISO14443B_GET_UID;
ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]);
CodeAndTransmit14443bAsReader(cmd1, 3); // no -- Only first three bytes for this one
- GetTagSamplesFor14443bDemod(TRUE); //no
+ GetTagSamplesFor14443bDemod(); //no
if (Demod.len != 10) {
Dbprintf("Expected 10 bytes from tag, got %d", Demod.len);
set_tracing(FALSE);
cmd1[1] = i;
ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]);
CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); //no
- GetTagSamplesFor14443bDemod(TRUE); //no
+ GetTagSamplesFor14443bDemod(); //no
if (Demod.len != 6) { // Check if we got an answer from the tag
DbpString("Expected 6 bytes from tag, got less...");
Dbprintf(" Trace length: %i", BigBuf_get_traceLen());
// free mem refs.
- if ( dmaBuf ) dmaBuf = NULL;
if ( upTo ) upTo = NULL;
+
// Uart.byteCntMax should be set with ATQB value..
}
}
CodeAndTransmit14443bAsReader(cmd, len); // raw
- GetTagSamplesFor14443bDemod(TRUE); // raw
+ GetTagSamplesFor14443bDemod(); // raw
sendlen = MIN(Demod.len, USB_CMD_DATA_SIZE);
status = (Demod.len > 0) ? 0 : 1;
projects / proxmark3-svn / blobdiff