CHG: a better micro second (us) spindely function. At average it has 8-10us delay...

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 702f4b1f7b1e5040eb05cc706b3e254f19342586..aa7a9419971e25b1af971159a77929f460caf804 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -17,36 +17,44 @@
 #include "lfdemod.h"
 #include "lfsampling.h"
 #include "protocols.h"
 #include "lfdemod.h"
 #include "lfsampling.h"
 #include "protocols.h"

-#include "usb_cdc.h" //test
+#include "usb_cdc.h" // for usb_poll_validate_length
+
+#ifndef SHORT_COIL
+# define SHORT_COIL()  LOW(GPIO_SSC_DOUT)
+#endif
+#ifndef OPEN_COIL
+# define OPEN_COIL()   HIGH(GPIO_SSC_DOUT)
+#endif

 
 /**
  * Function to do a modulation and then get samples.
  * @param delay_off
 
 /**
  * Function to do a modulation and then get samples.
  * @param delay_off

- * @param period_0
- * @param period_1
+ * @param periods  0xFFFF0000 is period_0,  0x0000FFFF is period_1
+ * @param useHighFreg

  * @param command
  */
  * @param command
  */

-void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint32_t period_1, uint8_t *command)
+void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t periods, uint32_t useHighFreq, uint8_t *command)

 {
 {

+       /* Make sure the tag is reset */
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+       SpinDelay(200);

 
 

-       int divisor_used = 95; // 125 KHz
-       // see if 'h' was specified
-
-       if (command[strlen((char *) command) - 1] == 'h')
-               divisor_used = 88; // 134.8 KHz
-
+       uint16_t period_0 =  periods >> 16;
+       uint16_t period_1 =  periods & 0xFFFF;
+       
+       // 95 == 125 KHz  88 == 124.8 KHz
+       int divisor_used = (useHighFreq) ? 88 : 95;

        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
 
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
 

-       /* Make sure the tag is reset */
-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       SpinDelay(2500);
+       //clear read buffer
+       BigBuf_Clear_keep_EM();

 
        LFSetupFPGAForADC(sc.divisor, 1);
 
        // And a little more time for the tag to fully power up
 
        LFSetupFPGAForADC(sc.divisor, 1);
 
        // And a little more time for the tag to fully power up

-       SpinDelay(2000);
+       SpinDelay(50);

 
        // now modulate the reader field
        while(*command != '\0' && *command != ' ') {
 
        // now modulate the reader field
        while(*command != '\0' && *command != ' ') {


@@ -58,15 +66,14 @@ void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint
                FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
                LED_D_ON();
                if(*(command++) == '0')
                FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
                LED_D_ON();
                if(*(command++) == '0')

-                       SpinDelayUs(period_0);
+                       SpinDelayUs(period_0);  // ICEMAN:  problem with (us) clock is  21.3us increments

                else
                else

-                       SpinDelayUs(period_1);
+                       SpinDelayUs(period_1);  // ICEMAN:  problem with (us) clock is  21.3us increments

        }
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        LED_D_OFF();
        }
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        LED_D_OFF();

-       SpinDelayUs(delay_off);
+       SpinDelayUs(delay_off); // ICEMAN:  problem with (us) clock is  21.3us increments

        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor);
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor);

-

        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // now do the read
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // now do the read


@@ -221,17 +228,17 @@ void WriteTIbyte(uint8_t b)
                if (b&(1<<i)) {
                        // stop modulating antenna
                        LOW(GPIO_SSC_DOUT);
                if (b&(1<<i)) {
                        // stop modulating antenna
                        LOW(GPIO_SSC_DOUT);

-                       SpinDelayUs(1000);
+                       SpinDelayUs(1000);      // ICEMAN:  problem with (us) clock is  21.3us increments

                        // modulate antenna
                        HIGH(GPIO_SSC_DOUT);
                        // modulate antenna
                        HIGH(GPIO_SSC_DOUT);

-                       SpinDelayUs(1000);
+                       SpinDelayUs(1000);      // ICEMAN:  problem with (us) clock is  21.3us increments

                } else {
                        // stop modulating antenna
                        LOW(GPIO_SSC_DOUT);
                } else {
                        // stop modulating antenna
                        LOW(GPIO_SSC_DOUT);

-                       SpinDelayUs(300);
+                       SpinDelayUs(300);       // ICEMAN:  problem with (us) clock is  21.3us increments

                        // modulate antenna
                        HIGH(GPIO_SSC_DOUT);
                        // modulate antenna
                        HIGH(GPIO_SSC_DOUT);

-                       SpinDelayUs(1700);
+                       SpinDelayUs(1700);      // ICEMAN:  problem with (us) clock is  21.3us increments

                }
        }
 }
                }
        }
 }


@@ -268,7 +275,7 @@ void AcquireTiType(void)
        AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(32) | AT91C_SSC_MSBF;
        AT91C_BASE_SSC->SSC_TCMR = 0;
        AT91C_BASE_SSC->SSC_TFMR = 0;
        AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(32) | AT91C_SSC_MSBF;
        AT91C_BASE_SSC->SSC_TCMR = 0;
        AT91C_BASE_SSC->SSC_TFMR = 0;

-
+       // iceman, FpgaSetupSsc() ?? the code above? can it be replaced?

        LED_D_ON();
 
        // modulate antenna
        LED_D_ON();
 
        // modulate antenna


@@ -378,36 +385,35 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
        AcquireTiType();
 
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        AcquireTiType();
 
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       DbpString("Now use 'lf ti read' to check");
+       DbpString("Now use `lf ti read` to check");

 }
 
 void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
 {
 }
 
 void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
 {

-       int i;
+       int i = 0;

        uint8_t *tab = BigBuf_get_addr();
 
        uint8_t *tab = BigBuf_get_addr();
 

-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);

 
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
        AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
        AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
 
 
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
        AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
        AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
 

- #define SHORT_COIL()  LOW(GPIO_SSC_DOUT)
- #define OPEN_COIL()   HIGH(GPIO_SSC_DOUT)
-
-       i = 0;

        for(;;) {
        for(;;) {

+               WDT_HIT();
+
+               if (ledcontrol) LED_D_ON();
+                               

                //wait until SSC_CLK goes HIGH
                while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
                //wait until SSC_CLK goes HIGH
                while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {

-                       if(BUTTON_PRESS() || (usb_poll_validate_length() )) {
-                               DbpString("Stopped");
-                               return;
-                       }

                        WDT_HIT();
                        WDT_HIT();

+                       if ( usb_poll_validate_length() || BUTTON_PRESS() ) {
+                               FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+                               LED_D_OFF();
+                               return;                         
+                       }

                }
                }

-               if (ledcontrol) LED_D_ON();
-
+               

                if(tab[i])
                        OPEN_COIL();
                else
                if(tab[i])
                        OPEN_COIL();
                else


@@ -417,20 +423,21 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
                
                //wait until SSC_CLK goes LOW
                while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
                
                //wait until SSC_CLK goes LOW
                while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {

-                       if(BUTTON_PRESS()) {
-                               DbpString("Stopped");
-                               return;
-                       }

                        WDT_HIT();
                        WDT_HIT();

+                       if ( usb_poll_validate_length() || BUTTON_PRESS() ) {
+                               FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+                               LED_D_OFF();
+                               return;                         
+                       }

                }
 
                i++;
                if(i == period) {
                }
 
                i++;
                if(i == period) {

-

                        i = 0;
                        if (gap) {
                        i = 0;
                        if (gap) {

+                               WDT_HIT();

                                SHORT_COIL();
                                SHORT_COIL();

-                               SpinDelayUs(gap);
+                               SpinDelayUs(gap);       // ICEMAN:  problem with (us) clock is  21.3us increments

                        }
                }
        }
                        }
                }
        }


@@ -524,7 +531,10 @@ static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt)
 // simulate a HID tag until the button is pressed
 void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
 {
 // simulate a HID tag until the button is pressed
 void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
 {

-       int n=0, i=0;
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+       set_tracing(FALSE);
+               
+       int n = 0, i = 0;

        /*
         HID tag bitstream format
         The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits
        /*
         HID tag bitstream format
         The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits


@@ -535,7 +545,7 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
         nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10)
        */
 
         nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10)
        */
 

-       if (hi>0xFFF) {
+       if (hi > 0xFFF) {

                DbpString("Tags can only have 44 bits. - USE lf simfsk for larger tags");
                return;
        }
                DbpString("Tags can only have 44 bits. - USE lf simfsk for larger tags");
                return;
        }


@@ -567,7 +577,8 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
                        fc(8,  &n); fc(10, &n);         // high-low transition
                }
        }
                        fc(8,  &n); fc(10, &n);         // high-low transition
                }
        }

-
+       WDT_HIT();
+       

        if (ledcontrol) LED_A_ON();
        SimulateTagLowFrequency(n, 0, ledcontrol);
        if (ledcontrol) LED_A_OFF();
        if (ledcontrol) LED_A_ON();
        SimulateTagLowFrequency(n, 0, ledcontrol);
        if (ledcontrol) LED_A_OFF();


@@ -578,8 +589,14 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
 // arg1 contains fcHigh and fcLow, arg2 contains invert and clock
 void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 {
 // arg1 contains fcHigh and fcLow, arg2 contains invert and clock
 void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 {

-       int ledcontrol=1;
-       int n=0, i=0;
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+
+       // free eventually allocated BigBuf memory
+       BigBuf_free(); BigBuf_Clear_ext(false);
+       clear_trace();
+       set_tracing(FALSE);
+       
+       int ledcontrol = 1, n = 0, i = 0;

        uint8_t fcHigh = arg1 >> 8;
        uint8_t fcLow = arg1 & 0xFF;
        uint16_t modCnt = 0;
        uint8_t fcHigh = arg1 >> 8;
        uint8_t fcLow = arg1 & 0xFF;
        uint16_t modCnt = 0;


@@ -587,27 +604,19 @@ void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
        uint8_t invert = (arg2 >> 8) & 1;
 
        for (i=0; i<size; i++){
        uint8_t invert = (arg2 >> 8) & 1;
 
        for (i=0; i<size; i++){

-               if (BitStream[i] == invert){
+               
+               if (BitStream[i] == invert)

                        fcAll(fcLow, &n, clk, &modCnt);
                        fcAll(fcLow, &n, clk, &modCnt);

-               } else {
+               else

                        fcAll(fcHigh, &n, clk, &modCnt);
                        fcAll(fcHigh, &n, clk, &modCnt);

-               }

        }
        }

-       Dbprintf("Simulating with fcHigh: %d, fcLow: %d, clk: %d, invert: %d, n: %d",fcHigh, fcLow, clk, invert, n);
-       /*Dbprintf("DEBUG: First 32:");
-       uint8_t *dest = BigBuf_get_addr();
-       i=0;
-       Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-       i+=16;
-       Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-       */
-       if (ledcontrol)
-               LED_A_ON();
+       WDT_HIT();
+       
+       Dbprintf("Simulating with fcHigh: %d, fcLow: %d, clk: %d, invert: %d, n: %d", fcHigh, fcLow, clk, invert, n);

 
 

+       if (ledcontrol) LED_A_ON();

        SimulateTagLowFrequency(n, 0, ledcontrol);
        SimulateTagLowFrequency(n, 0, ledcontrol);

-
-       if (ledcontrol)
-               LED_A_OFF();
+       if (ledcontrol) LED_A_OFF();

 }
 
 // compose ask waveform for one bit(ASK)
 }
 
 // compose ask waveform for one bit(ASK)


@@ -636,25 +645,39 @@ static void biphaseSimBit(uint8_t c, int *n, uint8_t clock, uint8_t *phase)
                memset(dest+(*n), c ^ *phase, clock);
                *phase ^= 1;
        }
                memset(dest+(*n), c ^ *phase, clock);
                *phase ^= 1;
        }

+       *n += clock;
+}

 
 

+static void stAskSimBit(int *n, uint8_t clock) {
+       uint8_t *dest = BigBuf_get_addr();
+       uint8_t halfClk = clock/2;
+       //ST = .5 high .5 low 1.5 high .5 low 1 high    
+       memset(dest+(*n), 1, halfClk);
+       memset(dest+(*n) + halfClk, 0, halfClk);
+       memset(dest+(*n) + clock, 1, clock + halfClk);
+       memset(dest+(*n) + clock*2 + halfClk, 0, halfClk);
+       memset(dest+(*n) + clock*3, 1, clock);
+       *n += clock*4;

 }
 
 // args clock, ask/man or askraw, invert, transmission separator
 void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 {
 }
 
 // args clock, ask/man or askraw, invert, transmission separator
 void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 {

-       int ledcontrol = 1;
-       int n=0, i=0;
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);   
+       set_tracing(FALSE);
+       
+       int ledcontrol = 1, n = 0, i = 0;

        uint8_t clk = (arg1 >> 8) & 0xFF;
        uint8_t encoding = arg1 & 0xFF;
        uint8_t separator = arg2 & 1;
        uint8_t invert = (arg2 >> 8) & 1;
 
        uint8_t clk = (arg1 >> 8) & 0xFF;
        uint8_t encoding = arg1 & 0xFF;
        uint8_t separator = arg2 & 1;
        uint8_t invert = (arg2 >> 8) & 1;
 

-       if (encoding==2){  //biphase
-               uint8_t phase=0;
+       if (encoding == 2){  //biphase
+               uint8_t phase = 0;

                for (i=0; i<size; i++){
                        biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
                }
                for (i=0; i<size; i++){
                        biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
                }

-               if (BitStream[0]==BitStream[size-1]){ //run a second set inverted to keep phase in check
+               if (phase == 1) { //run a second set inverted to keep phase in check

                        for (i=0; i<size; i++){
                                biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
                        }
                        for (i=0; i<size; i++){
                                biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
                        }


@@ -669,9 +692,13 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
                        }
                }
        }
                        }
                }
        }

-       
-       if (separator==1) Dbprintf("sorry but separator option not yet available"); 
+       if (separator==1 && encoding == 1)
+               stAskSimBit(&n, clk);
+       else if (separator==1)
+               Dbprintf("sorry but separator option not yet available");

 
 

+       WDT_HIT();
+       

        Dbprintf("Simulating with clk: %d, invert: %d, encoding: %d, separator: %d, n: %d",clk, invert, encoding, separator, n);
 
        if (ledcontrol) LED_A_ON();
        Dbprintf("Simulating with clk: %d, invert: %d, encoding: %d, separator: %d, n: %d",clk, invert, encoding, separator, n);
 
        if (ledcontrol) LED_A_ON();


@@ -705,8 +732,10 @@ static void pskSimBit(uint8_t waveLen, int *n, uint8_t clk, uint8_t *curPhase, b
 // args clock, carrier, invert,
 void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 {
 // args clock, carrier, invert,
 void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 {

-       int ledcontrol = 1;
-       int n=0, i=0;
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);   
+       set_tracing(FALSE);
+       
+       int ledcontrol = 1, n = 0, i = 0;

        uint8_t clk = arg1 >> 8;
        uint8_t carrier = arg1 & 0xFF;
        uint8_t invert = arg2 & 0xFF;
        uint8_t clk = arg1 >> 8;
        uint8_t carrier = arg1 & 0xFF;
        uint8_t invert = arg2 & 0xFF;


@@ -718,6 +747,9 @@ void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
                        pskSimBit(carrier, &n, clk, &curPhase, TRUE);
                }
        }
                        pskSimBit(carrier, &n, clk, &curPhase, TRUE);
                }
        }

+       
+       WDT_HIT();
+       

        Dbprintf("Simulating with Carrier: %d, clk: %d, invert: %d, n: %d",carrier, clk, invert, n);
                   
        if (ledcontrol) LED_A_ON();
        Dbprintf("Simulating with Carrier: %d, clk: %d, invert: %d, n: %d",carrier, clk, invert, n);
                   
        if (ledcontrol) LED_A_ON();


@@ -735,6 +767,9 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 

+       //clear read buffer
+       BigBuf_Clear_keep_EM();
+

        while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
                WDT_HIT();
        while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
                WDT_HIT();


@@ -754,7 +789,7 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
                                  (unsigned int) lo,
                                  (unsigned int) (lo>>1) & 0xFFFF
                                  );
                                  (unsigned int) lo,
                                  (unsigned int) (lo>>1) & 0xFFFF
                                  );

-                       }else {  //standard HID tags 44/96 bits
+                       } else {  //standard HID tags 44/96 bits

                                uint8_t bitlen = 0;
                                uint32_t fc = 0;
                                uint32_t cardnum = 0;
                                uint8_t bitlen = 0;
                                uint32_t fc = 0;
                                uint32_t cardnum = 0;


@@ -825,6 +860,8 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
        uint8_t *dest = BigBuf_get_addr();
        size_t size; 
        int idx=0;
        uint8_t *dest = BigBuf_get_addr();
        size_t size; 
        int idx=0;

+       //clear read buffer
+       BigBuf_Clear_keep_EM();

        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 


@@ -859,7 +896,6 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 
                size = removeParity(dest, idx+8, 4, 1, 88);
                if (size != 66) continue;
 
                size = removeParity(dest, idx+8, 4, 1, 88);
                if (size != 66) continue;

-               // ok valid card found!

 
                // Index map
                // 0           10         20        30          40        50        60
 
                // Index map
                // 0           10         20        30          40        50        60


@@ -869,37 +905,51 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
                // 00011010 1 01110101 0000000010001110 1 000000000000000000000000000000000
                // bbbbbbbb w ffffffff cccccccccccccccc w xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
                // |26 bit|   |-117--| |-----142------|
                // 00011010 1 01110101 0000000010001110 1 000000000000000000000000000000000
                // bbbbbbbb w ffffffff cccccccccccccccc w xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
                // |26 bit|   |-117--| |-----142------|

+                       //
+                       // 00110010 0 0000011111010000000000000001000100101000100001111 0 00000000 
+                       // bbbbbbbb w ffffffffffffffffccccccccccccccccccccccccccccccccc w xxxxxxxx
+                       // |50 bit|   |----4000------||-----------2248975-------------|                         
+                       //

                // b = format bit len, o = odd parity of last 3 bits
                // f = facility code, c = card number
                // w = wiegand parity
                // b = format bit len, o = odd parity of last 3 bits
                // f = facility code, c = card number
                // w = wiegand parity

-               // (26 bit format shown)

 
                uint32_t fc = 0;
                uint32_t cardnum = 0;
                uint32_t code1 = 0;
                uint32_t code2 = 0;
                uint8_t fmtLen = bytebits_to_byte(dest,8);
 
                uint32_t fc = 0;
                uint32_t cardnum = 0;
                uint32_t code1 = 0;
                uint32_t code2 = 0;
                uint8_t fmtLen = bytebits_to_byte(dest,8);

-               if (fmtLen==26){
-                       fc = bytebits_to_byte(dest+9, 8);
-                       cardnum = bytebits_to_byte(dest+17, 16);
-                       code1 = bytebits_to_byte(dest+8,fmtLen);
-                       Dbprintf("AWID Found - BitLength: %d, FC: %d, Card: %d - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, fc, cardnum, code1, rawHi2, rawHi, rawLo);
-               } else {
-                       cardnum = bytebits_to_byte(dest+8+(fmtLen-17), 16);
-                       if (fmtLen>32){
-                        code1 = bytebits_to_byte(dest+8,fmtLen-32);
-                        code2 = bytebits_to_byte(dest+8+(fmtLen-32),32);
-                        Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%d) - Wiegand: %x%08x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, code2, rawHi2, rawHi, rawLo);
-                } else{
-                        code1 = bytebits_to_byte(dest+8,fmtLen);
-                        Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%d) - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, rawHi2, rawHi, rawLo);
-                }
+                       switch(fmtLen) {
+                               case 26: 
+                                       fc = bytebits_to_byte(dest + 9, 8);
+                                       cardnum = bytebits_to_byte(dest + 17, 16);
+                                       code1 = bytebits_to_byte(dest + 8,fmtLen);
+                                       Dbprintf("AWID Found - BitLength: %d, FC: %d, Card: %u - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, fc, cardnum, code1, rawHi2, rawHi, rawLo);
+                                       break;
+                               case 50:
+                                       fc = bytebits_to_byte(dest + 9, 16);
+                                       cardnum = bytebits_to_byte(dest + 25, 32);
+                                       code1 = bytebits_to_byte(dest + 8, (fmtLen-32) );
+                                       code2 = bytebits_to_byte(dest + 8 + (fmtLen-32), 32);
+                                       Dbprintf("AWID Found - BitLength: %d, FC: %d, Card: %u - Wiegand: %x%08x, Raw: %08x%08x%08x", fmtLen, fc, cardnum, code1, code2, rawHi2, rawHi, rawLo);
+                                       break;
+                               default:
+                                       if (fmtLen > 32 ) {
+                                               cardnum = bytebits_to_byte(dest+8+(fmtLen-17), 16);
+                                               code1 = bytebits_to_byte(dest+8,fmtLen-32);
+                                               code2 = bytebits_to_byte(dest+8+(fmtLen-32),32);
+                                               Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%u) - Wiegand: %x%08x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, code2, rawHi2, rawHi, rawLo);
+                                       } else {
+                                               cardnum = bytebits_to_byte(dest+8+(fmtLen-17), 16);
+                                               code1 = bytebits_to_byte(dest+8,fmtLen);
+                                               Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%u) - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, rawHi2, rawHi, rawLo);
+                                       }
+                                       break;          

                        }
                        if (findone){
                                if (ledcontrol) LED_A_OFF();
                                return;
                        }
                        }
                        if (findone){
                                if (ledcontrol) LED_A_OFF();
                                return;
                        }

-                       // reset

                idx = 0;
                WDT_HIT();
        }
                idx = 0;
                WDT_HIT();
        }


@@ -915,6 +965,8 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
        int clk=0, invert=0, errCnt=0, maxErr=20;
        uint32_t hi=0;
        uint64_t lo=0;
        int clk=0, invert=0, errCnt=0, maxErr=20;
        uint32_t hi=0;
        uint64_t lo=0;

+       //clear read buffer
+       BigBuf_Clear_keep_EM();

        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 


@@ -976,6 +1028,10 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
        uint16_t number=0;
        uint8_t crc = 0;
        uint16_t calccrc = 0;
        uint16_t number=0;
        uint8_t crc = 0;
        uint16_t calccrc = 0;

+
+       //clear read buffer
+       BigBuf_Clear_keep_EM();
+       

        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 


@@ -1062,7 +1118,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 
 #define START_GAP 50*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (or 15fc)
 #define WRITE_GAP 20*8 // was 160 // SPEC:  1*8 to 20*8 - typ 10*8 (or 10fc)
 
 #define START_GAP 50*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (or 15fc)
 #define WRITE_GAP 20*8 // was 160 // SPEC:  1*8 to 20*8 - typ 10*8 (or 10fc)

-#define WRITE_0   16*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
+#define WRITE_0   18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)

 #define WRITE_1   50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc)  432 for T55x7; 448 for E5550
 #define READ_GAP  15*8 
 
 #define WRITE_1   50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc)  432 for T55x7; 448 for E5550
 #define READ_GAP  15*8 
 


@@ -1088,7 +1144,7 @@ void TurnReadLFOn(int delay) {
        //int adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
        // where to save it
        
        //int adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
        // where to save it
        

-       SpinDelayUs(delay);
+       SpinDelayUs(delay);     // ICEMAN:  problem with (us) clock is  21.3us increments

 }
 
 // Write one bit to card
 }
 
 // Write one bit to card


@@ -1098,21 +1154,21 @@ void T55xxWriteBit(int bit) {
        else
                TurnReadLFOn(WRITE_1);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        else
                TurnReadLFOn(WRITE_1);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       SpinDelayUs(WRITE_GAP);
+       SpinDelayUs(WRITE_GAP); // ICEMAN:  problem with (us) clock is  21.3us increments

 }
 
 // Send T5577 reset command then read stream (see if we can identify the start of the stream)
 void T55xxResetRead(void) {
        LED_A_ON();
        //clear buffer now so it does not interfere with timing later
 }
 
 // Send T5577 reset command then read stream (see if we can identify the start of the stream)
 void T55xxResetRead(void) {
        LED_A_ON();
        //clear buffer now so it does not interfere with timing later

-       BigBuf_Clear_ext(false);
+       BigBuf_Clear_keep_EM();

 
        // Set up FPGA, 125kHz
        LFSetupFPGAForADC(95, true);
 
        // Trigger T55x7 in mode.
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 
        // Set up FPGA, 125kHz
        LFSetupFPGAForADC(95, true);
 
        // Trigger T55x7 in mode.
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       SpinDelayUs(START_GAP);
+       SpinDelayUs(START_GAP); // ICEMAN:  problem with (us) clock is  21.3us increments

 
        // reset tag - op code 00
        T55xxWriteBit(0);
 
        // reset tag - op code 00
        T55xxWriteBit(0);


@@ -1142,7 +1198,7 @@ void T55xxWriteBlockExt(uint32_t Data, uint8_t Block, uint32_t Pwd, uint8_t arg)
        
        // Trigger T55x7 in mode.
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        
        // Trigger T55x7 in mode.
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       SpinDelayUs(START_GAP);
+       SpinDelayUs(START_GAP); // ICEMAN:  problem with (us) clock is  21.3us increments

 
        // Opcode 10
        T55xxWriteBit(1);
 
        // Opcode 10
        T55xxWriteBit(1);


@@ -1191,17 +1247,18 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
        bool RegReadMode = (Block == 0xFF);
        
        //clear buffer now so it does not interfere with timing later
        bool RegReadMode = (Block == 0xFF);
        
        //clear buffer now so it does not interfere with timing later

-       BigBuf_Clear_ext(false);
+       BigBuf_Clear_keep_EM();

 
        //make sure block is at max 7
        Block &= 0x7;
 
        // Set up FPGA, 125kHz to power up the tag
        LFSetupFPGAForADC(95, true);
 
        //make sure block is at max 7
        Block &= 0x7;
 
        // Set up FPGA, 125kHz to power up the tag
        LFSetupFPGAForADC(95, true);

+       SpinDelay(3);

        
        // Trigger T55x7 Direct Access Mode with start gap
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        
        // Trigger T55x7 Direct Access Mode with start gap
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       SpinDelayUs(START_GAP);
+       SpinDelayUs(START_GAP); // ICEMAN:  problem with (us) clock is  21.3us increments

        
        // Opcode 1[page]
        T55xxWriteBit(1);
        
        // Opcode 1[page]
        T55xxWriteBit(1);


@@ -1217,8 +1274,8 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
        
        // Send Block number (if direct access mode)
        if (!RegReadMode)
        
        // Send Block number (if direct access mode)
        if (!RegReadMode)

-       for (i = 0x04; i != 0; i >>= 1)
-               T55xxWriteBit(Block & i);
+               for (i = 0x04; i != 0; i >>= 1)
+                       T55xxWriteBit(Block & i);

 
        // Turn field on to read the response
        TurnReadLFOn(READ_GAP);
 
        // Turn field on to read the response
        TurnReadLFOn(READ_GAP);


@@ -1241,7 +1298,7 @@ void T55xxWakeUp(uint32_t Pwd){
        
        // Trigger T55x7 Direct Access Mode
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        
        // Trigger T55x7 Direct Access Mode
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       SpinDelayUs(START_GAP);
+       SpinDelayUs(START_GAP); // ICEMAN:  problem with (us) clock is  21.3us increments

        
        // Opcode 10
        T55xxWriteBit(1);
        
        // Opcode 10
        T55xxWriteBit(1);


@@ -1256,11 +1313,10 @@ void T55xxWakeUp(uint32_t Pwd){
 }
 
 /*-------------- Cloning routines -----------*/
 }
 
 /*-------------- Cloning routines -----------*/

-

 void WriteT55xx(uint32_t *blockdata, uint8_t startblock, uint8_t numblocks) {
        // write last block first and config block last (if included)
        for (uint8_t i = numblocks+startblock; i > startblock; i--)
 void WriteT55xx(uint32_t *blockdata, uint8_t startblock, uint8_t numblocks) {
        // write last block first and config block last (if included)
        for (uint8_t i = numblocks+startblock; i > startblock; i--)

-               T55xxWriteBlockExt(blockdata[i-1],i-1,0,0);
+               T55xxWriteBlockExt(blockdata[i-1], i-1, 0, 0);

 }
 
 // Copy HID id to card and setup block 0 config
 }
 
 // Copy HID id to card and setup block 0 config


@@ -1270,7 +1326,7 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) {
 
        if (longFMT){
                // Ensure no more than 84 bits supplied
 
        if (longFMT){
                // Ensure no more than 84 bits supplied

-               if (hi2>0xFFFFF) {
+               if (hi2 > 0xFFFFF) {

                        DbpString("Tags can only have 84 bits.");
                        return;
                }
                        DbpString("Tags can only have 84 bits.");
                        return;
                }


@@ -1286,7 +1342,7 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) {
                data[6] = manchesterEncode2Bytes(lo & 0xFFFF);
        }       else {
                // Ensure no more than 44 bits supplied
                data[6] = manchesterEncode2Bytes(lo & 0xFFFF);
        }       else {
                // Ensure no more than 44 bits supplied

-               if (hi>0xFFF) {
+               if (hi > 0xFFF) {

                        DbpString("Tags can only have 44 bits.");
                        return;
                }
                        DbpString("Tags can only have 44 bits.");
                        return;
                }


@@ -1316,15 +1372,14 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) {
 void CopyIOtoT55x7(uint32_t hi, uint32_t lo) {
        uint32_t data[] = {T55x7_BITRATE_RF_64 | T55x7_MODULATION_FSK2a | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
        //TODO add selection of chip for Q5 or T55x7
 void CopyIOtoT55x7(uint32_t hi, uint32_t lo) {
        uint32_t data[] = {T55x7_BITRATE_RF_64 | T55x7_MODULATION_FSK2a | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
        //TODO add selection of chip for Q5 or T55x7

-       // data[0] = (((64-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | 2 << T5555_MAXBLOCK_SHIFT;
+       //t5555 (Q5) BITRATE = (RF-2)/2 (iceman)
+       // data[0] = (64 << T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | 2 << T5555_MAXBLOCK_SHIFT;

 
        LED_D_ON();
        // Program the data blocks for supplied ID
        // and the block 0 config
        WriteT55xx(data, 0, 3);
 
        LED_D_ON();
        // Program the data blocks for supplied ID
        // and the block 0 config
        WriteT55xx(data, 0, 3);

-

        LED_D_OFF();
        LED_D_OFF();

-

        DbpString("DONE!");
 }
 
        DbpString("DONE!");
 }
 


@@ -1358,6 +1413,7 @@ void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t
 // clone viking tag to T55xx
 void CopyVikingtoT55xx(uint32_t block1, uint32_t block2, uint8_t Q5) {
        uint32_t data[] = {T55x7_BITRATE_RF_32 | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT), block1, block2};
 // clone viking tag to T55xx
 void CopyVikingtoT55xx(uint32_t block1, uint32_t block2, uint8_t Q5) {
        uint32_t data[] = {T55x7_BITRATE_RF_32 | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT), block1, block2};

+       //t5555 (Q5) BITRATE = (RF-2)/2 (iceman)

        if (Q5) data[0] = (32 << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | 2 << T5555_MAXBLOCK_SHIFT;
        // Program the data blocks for supplied ID and the block 0 config
        WriteT55xx(data, 0, 3);
        if (Q5) data[0] = (32 << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | 2 << T5555_MAXBLOCK_SHIFT;
        // Program the data blocks for supplied ID and the block 0 config
        WriteT55xx(data, 0, 3);


@@ -1429,11 +1485,11 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo) {
        LED_D_ON();
 
        // Write EM410x ID
        LED_D_ON();
 
        // Write EM410x ID

-       uint32_t data[] = {0, id>>32, id & 0xFFFFFFFF};
+       uint32_t data[] = {0, (uint32_t)(id>>32), (uint32_t)(id & 0xFFFFFFFF)};

 
 

-               clock = (card & 0xFF00) >> 8;
-               clock = (clock == 0) ? 64 : clock;
-               Dbprintf("Clock rate: %d", clock);
+       clock = (card & 0xFF00) >> 8;
+       clock = (clock == 0) ? 64 : clock;
+       Dbprintf("Clock rate: %d", clock);

        if (card & 0xFF) { //t55x7
                clock = GetT55xxClockBit(clock);
                if (clock == 0) {
        if (card & 0xFF) { //t55x7
                clock = GetT55xxClockBit(clock);
                if (clock == 0) {


@@ -1445,12 +1501,14 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo) {
                clock = (clock-2)>>1;  //n = (RF-2)/2
                data[0] = (clock << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | (2 << T5555_MAXBLOCK_SHIFT);
        }
                clock = (clock-2)>>1;  //n = (RF-2)/2
                data[0] = (clock << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | (2 << T5555_MAXBLOCK_SHIFT);
        }

-
+ 

        WriteT55xx(data, 0, 3);
 
        LED_D_OFF();
        WriteT55xx(data, 0, 3);
 
        LED_D_OFF();

-       Dbprintf("Tag %s written with 0x%08x%08x\n", card ? "T55x7":"T5555",
-                        (uint32_t)(id >> 32), (uint32_t)id);
+       Dbprintf("Tag %s written with 0x%08x%08x\n",
+                       card ? "T55x7":"T5555",
+                       (uint32_t)(id >> 32),
+                       (uint32_t)id);

 }
 
 //-----------------------------------
 }
 
 //-----------------------------------


@@ -1571,20 +1629,20 @@ void SendForward(uint8_t fwd_bit_count) {
        fwd_bit_sz--; //prepare next bit modulation
        fwd_write_ptr++;
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        fwd_bit_sz--; //prepare next bit modulation
        fwd_write_ptr++;
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off

-       SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
+       SpinDelayUs(55*8); //55 cycles off (8us each)for 4305   // ICEMAN:  problem with (us) clock is  21.3us increments

        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on

-       SpinDelayUs(16*8); //16 cycles on (8us each)
+       SpinDelayUs(16*8); //16 cycles on (8us each)    // ICEMAN:  problem with (us) clock is  21.3us increments

 
        // now start writting
        while(fwd_bit_sz-- > 0) { //prepare next bit modulation
                if(((*fwd_write_ptr++) & 1) == 1)
 
        // now start writting
        while(fwd_bit_sz-- > 0) { //prepare next bit modulation
                if(((*fwd_write_ptr++) & 1) == 1)

-                       SpinDelayUs(32*8); //32 cycles at 125Khz (8us each)
+                       SpinDelayUs(32*8); //32 cycles at 125Khz (8us each)     // ICEMAN:  problem with (us) clock is  21.3us increments

                else {
                        //These timings work for 4469/4269/4305 (with the 55*8 above)
                        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
                else {
                        //These timings work for 4469/4269/4305 (with the 55*8 above)
                        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off

-                       SpinDelayUs(23*8); //16-4 cycles off (8us each)
+                       SpinDelayUs(23*8); //16-4 cycles off (8us each) // ICEMAN:  problem with (us) clock is  21.3us increments

                        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
                        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on

-                       SpinDelayUs(9*8); //16 cycles on (8us each)
+                       SpinDelayUs(9*8); //16 cycles on (8us each)     // ICEMAN:  problem with (us) clock is  21.3us increments

                }
        }
 }
                }
        }
 }


@@ -1610,7 +1668,7 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
        uint16_t bufsize = BigBuf_max_traceLen();
        uint32_t i = 0;
 
        uint16_t bufsize = BigBuf_max_traceLen();
        uint32_t i = 0;
 

-       //clear buffer now so it does not interfere with timing later
+       // Clear destination buffer before sending the command

        BigBuf_Clear_ext(false);
        
        //If password mode do login
        BigBuf_Clear_ext(false);
        
        //If password mode do login