-INCLUDE ../common/ldscript.common\r
-\r
-ENTRY(Vector)\r
-SECTIONS\r
-{\r
- .fpgaimage : {\r
- *(fpga_bit.data)\r
- } >fpgaimage\r
- .start : { *(.startos) } >osimage\r
- .text : { \r
- *(.text)\r
- *(.text.*)\r
- *(.eh_frame)\r
- *(.glue_7)\r
- *(.glue_7t)\r
- *(.rodata) \r
- *(.rodata*) \r
- *(.version_information)\r
- } >osimage\r
- __end_of_text__ = .;\r
- \r
- .data : {\r
- __data_start__ = .;\r
- __data_src_start__ = __end_of_text__; \r
- *(.data)\r
- *(.data.*)\r
- __data_end__ = .;\r
- } >ram AT>osimage\r
- \r
- .bss : {\r
- __bss_start__ = .; \r
- *(.bss)\r
- *(.bss.*) \r
- } >ram\r
- . = ALIGN(32 / 8);\r
- __bss_end__ = .;\r
-\r
- .commonarea (NOLOAD) : {\r
- *(.commonarea)\r
- } >commonarea\r
-}\r
+/*
+-----------------------------------------------------------------------------
+ This code is licensed to you under the terms of the GNU GPL, version 2 or,
+ at your option, any later version. See the LICENSE.txt file for the text of
+ the license.
+-----------------------------------------------------------------------------
+ Linker script for the ARM binary
+-----------------------------------------------------------------------------
+*/
+INCLUDE ../common/ldscript.common
+
+PHDRS
+{
+ fpgaimage PT_LOAD FLAGS(4);
+ text PT_LOAD;
+ data PT_LOAD;
+ bss PT_LOAD;
+}
+
+ENTRY(Vector)
+SECTIONS
+{
+ .fpgaimage : {
+ *(fpga_bit.data)
+ } >fpgaimage :fpgaimage
+
+ .start : {
+ *(.startos)
+ } >osimage :text
+
+ .text : {
+ *(.text)
+ *(.text.*)
+ *(.eh_frame)
+ *(.glue_7)
+ *(.glue_7t)
+ } >osimage :text
+
+ .rodata : {
+ *(.rodata)
+ *(.rodata.*)
+ *(.version_information)
+ } >osimage :text
+
+ . = ALIGN(4);
+
+ .data : {
+ *(.data)
+ *(.data.*)
+ . = ALIGN(4);
+ } >ram AT>osimage :data
+
+ __data_src_start__ = LOADADDR(.data);
+ __data_start__ = ADDR(.data);
+ __data_end__ = __data_start__ + SIZEOF(.data);
+
+ .bss : {
+ __bss_start__ = .;
+ *(.bss)
+ *(.bss.*)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } >ram :bss
+
+ .commonarea (NOLOAD) : {
+ *(.commonarea)
+ } >commonarea :NONE
+}