add l/h option to hw tune and optimize order of tuning

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 47fec7c2a95d3b6737361b401e56fb0e2297847e..14b62673f0b540b29445b78b83574039d6160513 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -37,6 +37,8 @@ void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint
 
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
 
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);

+       //clear read buffer
+       BigBuf_Clear_keep_EM();

 
        /* Make sure the tag is reset */
        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
 
        /* Make sure the tag is reset */
        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);


@@ -752,6 +754,9 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 

+       //clear read buffer
+       BigBuf_Clear_keep_EM();
+

        while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
                WDT_HIT();
        while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
                WDT_HIT();


@@ -837,6 +842,8 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
        uint8_t *dest = BigBuf_get_addr();
        size_t size; 
        int idx=0;
        uint8_t *dest = BigBuf_get_addr();
        size_t size; 
        int idx=0;

+       //clear read buffer
+       BigBuf_Clear_keep_EM();

        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 


@@ -927,6 +934,8 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
        int clk=0, invert=0, errCnt=0, maxErr=20;
        uint32_t hi=0;
        uint64_t lo=0;
        int clk=0, invert=0, errCnt=0, maxErr=20;
        uint32_t hi=0;
        uint64_t lo=0;

+       //clear read buffer
+       BigBuf_Clear_keep_EM();

        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 


@@ -986,6 +995,8 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
        uint8_t version=0;
        uint8_t facilitycode=0;
        uint16_t number=0;
        uint8_t version=0;
        uint8_t facilitycode=0;
        uint16_t number=0;

+       //clear read buffer
+       BigBuf_Clear_keep_EM();

        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 


@@ -1079,7 +1090,7 @@ void T55xxWriteBit(int bit) {
 void T55xxResetRead(void) {
        LED_A_ON();
        //clear buffer now so it does not interfere with timing later
 void T55xxResetRead(void) {
        LED_A_ON();
        //clear buffer now so it does not interfere with timing later

-       BigBuf_Clear_ext(false);
+       BigBuf_Clear_keep_EM();

 
        // Set up FPGA, 125kHz
        LFSetupFPGAForADC(95, true);
 
        // Set up FPGA, 125kHz
        LFSetupFPGAForADC(95, true);