// Jonathan Westhues, Mar 2006\r
// Edits by Gerhard de Koning Gans, Sep 2007 (##)\r
//-----------------------------------------------------------------------------\r
+\r
#include <proxmark3.h>\r
+#include <stdlib.h>\r
#include "apps.h"\r
+#include "legicrf.h"\r
+#ifdef WITH_LCD\r
#include "fonts.h"\r
#include "LCD.h"\r
-\r
-// The large multi-purpose buffer, typically used to hold A/D samples,\r
-// maybe pre-processed in some way.\r
-DWORD BigBuf[16000];\r
-\r
+#endif\r
+\r
+#define va_list __builtin_va_list\r
+#define va_start __builtin_va_start\r
+#define va_arg __builtin_va_arg\r
+#define va_end __builtin_va_end\r
+int kvsprintf(char const *fmt, void *arg, int radix, va_list ap);\r
+ \r
//=============================================================================\r
// A buffer where we can queue things up to be sent through the FPGA, for\r
// any purpose (fake tag, as reader, whatever). We go MSB first, since that\r
BYTE ToSend[256];\r
int ToSendMax;\r
static int ToSendBit;\r
+struct common_area common_area __attribute__((section(".commonarea")));\r
+\r
+void BufferClear(void)\r
+{\r
+ memset(BigBuf,0,sizeof(BigBuf));\r
+ DbpString("Buffer cleared");\r
+}\r
\r
void ToSendReset(void)\r
{\r
\r
void DbpString(char *str)\r
{\r
+ /* this holds up stuff unless we're connected to usb */\r
+ if (!UsbConnected())\r
+ return;\r
+\r
UsbCommand c;\r
c.cmd = CMD_DEBUG_PRINT_STRING;\r
- c.ext1 = strlen(str);\r
- memcpy(c.d.asBytes, str, c.ext1);\r
+ c.arg[0] = strlen(str);\r
+ memcpy(c.d.asBytes, str, c.arg[0]);\r
\r
UsbSendPacket((BYTE *)&c, sizeof(c));\r
// TODO fix USB so stupid things like this aren't req'd\r
SpinDelay(50);\r
}\r
\r
+#if 0\r
void DbpIntegers(int x1, int x2, int x3)\r
{\r
+ /* this holds up stuff unless we're connected to usb */\r
+ if (!UsbConnected())\r
+ return;\r
+\r
UsbCommand c;\r
c.cmd = CMD_DEBUG_PRINT_INTEGERS;\r
- c.ext1 = x1;\r
- c.ext2 = x2;\r
- c.ext3 = x3;\r
+ c.arg[0] = x1;\r
+ c.arg[1] = x2;\r
+ c.arg[2] = x3;\r
\r
UsbSendPacket((BYTE *)&c, sizeof(c));\r
// XXX\r
SpinDelay(50);\r
}\r
-\r
-void AcquireRawAdcSamples125k(BOOL at134khz)\r
-{\r
- BYTE *dest = (BYTE *)BigBuf;\r
- int n = sizeof(BigBuf);\r
- int i;\r
-\r
- memset(dest,0,n);\r
-\r
- if(at134khz) {\r
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_134_KHZ);\r
- } else {\r
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_125_KHZ);\r
- }\r
-\r
- // Connect the A/D to the peak-detected low-frequency path.\r
- SetAdcMuxFor(GPIO_MUXSEL_LOPKD);\r
-\r
- // Give it a bit of time for the resonant antenna to settle.\r
- SpinDelay(50);\r
-\r
- // Now set up the SSC to get the ADC samples that are now streaming at us.\r
- FpgaSetupSsc();\r
-\r
- i = 0;\r
- for(;;) {\r
- if(SSC_STATUS & (SSC_STATUS_TX_READY)) {\r
- SSC_TRANSMIT_HOLDING = 0x43;\r
- LED_D_ON();\r
- }\r
- if(SSC_STATUS & (SSC_STATUS_RX_READY)) {\r
- dest[i] = (BYTE)SSC_RECEIVE_HOLDING;\r
- i++;\r
- LED_D_OFF();\r
- if(i >= n) {\r
- break;\r
- }\r
- }\r
- }\r
- DbpIntegers(dest[0], dest[1], at134khz);\r
+#endif\r
+\r
+void Dbprintf(const char *fmt, ...) {\r
+// should probably limit size here; oh well, let's just use a big buffer\r
+ char output_string[128];\r
+ va_list ap;\r
+\r
+ va_start(ap, fmt);\r
+ kvsprintf(fmt, output_string, 10, ap);\r
+ va_end(ap);\r
+ \r
+ DbpString(output_string);\r
}\r
\r
//-----------------------------------------------------------------------------\r
{\r
DWORD d;\r
\r
- ADC_CONTROL = ADC_CONTROL_RESET;\r
- ADC_MODE = ADC_MODE_PRESCALE(32) | ADC_MODE_STARTUP_TIME(16) |\r
+ AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;\r
+ AT91C_BASE_ADC->ADC_MR =\r
+ ADC_MODE_PRESCALE(32) |\r
+ ADC_MODE_STARTUP_TIME(16) |\r
ADC_MODE_SAMPLE_HOLD_TIME(8);\r
- ADC_CHANNEL_ENABLE = ADC_CHANNEL(ch);\r
+ AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ch);\r
\r
- ADC_CONTROL = ADC_CONTROL_START;\r
- while(!(ADC_STATUS & ADC_END_OF_CONVERSION(ch)))\r
+ AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;\r
+ while(!(AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ch)))\r
;\r
- d = ADC_CHANNEL_DATA(ch);\r
+ d = AT91C_BASE_ADC->ADC_CDR[ch];\r
\r
return d;\r
}\r
\r
return (a + 15) >> 5;\r
}\r
-
-/*
- * Sweeps the useful LF range of the proxmark from
- * 46.8kHz (divisor=255) to 600kHz (divisor=19) and
- * reads the voltage in the antenna: the result is a graph
- * which should clearly show the resonating frequency of your
- * LF antenna ( hopefully around 90 if it is tuned to 125kHz!)
- */\r
-void SweepLFrange()\r
+\r
+void MeasureAntennaTuning(void)\r
{\r
BYTE *dest = (BYTE *)BigBuf;\r
- int i;\r
+ int i, ptr = 0, adcval = 0, peak = 0, peakv = 0, peakf = 0;;\r
+ int vLf125 = 0, vLf134 = 0, vHf = 0; // in mV\r
\r
- // clear buffer\r
+ UsbCommand c;\r
+\r
+ DbpString("Measuring antenna characteristics, please wait.");\r
memset(BigBuf,0,sizeof(BigBuf));\r
\r
+/*\r
+ * Sweeps the useful LF range of the proxmark from\r
+ * 46.8kHz (divisor=255) to 600kHz (divisor=19) and\r
+ * read the voltage in the antenna, the result left\r
+ * in the buffer is a graph which should clearly show\r
+ * the resonating frequency of your LF antenna\r
+ * ( hopefully around 95 if it is tuned to 125kHz!)\r
+ */\r
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);\r
for (i=255; i>19; i--) {\r
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i);\r
SpinDelay(20);\r
- dest[i] = (137500 * AvgAdc(4)) >> 18;\r
+ // Vref = 3.3V, and a 10000:240 voltage divider on the input\r
+ // can measure voltages up to 137500 mV\r
+ adcval = ((137500 * AvgAdc(ADC_CHAN_LF)) >> 10);\r
+ if (i==95) vLf125 = adcval; // voltage at 125Khz\r
+ if (i==89) vLf134 = adcval; // voltage at 134Khz\r
+\r
+ dest[i] = adcval>>8; // scale int to fit in byte for graphing purposes\r
+ if(dest[i] > peak) {\r
+ peakv = adcval;\r
+ peak = dest[i];\r
+ peakf = i;\r
+ ptr = i;\r
+ }\r
}\r
-}\r
-\r
-void MeasureAntennaTuning(void)\r
-{\r
-// Impedances are Zc = 1/(j*omega*C), in ohms\r
-#define LF_TUNING_CAP_Z 1273 // 1 nF @ 125 kHz\r
-#define HF_TUNING_CAP_Z 235 // 50 pF @ 13.56 MHz\r
-\r
- int vLf125, vLf134, vHf; // in mV\r
-\r
- UsbCommand c;\r
-\r
- // Let the FPGA drive the low-frequency antenna around 125 kHz.\r
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_125_KHZ);\r
- SpinDelay(20);\r
- vLf125 = AvgAdc(4);\r
- // Vref = 3.3V, and a 10000:240 voltage divider on the input\r
- // can measure voltages up to 137500 mV\r
- vLf125 = (137500 * vLf125) >> 10;\r
-\r
- // Let the FPGA drive the low-frequency antenna around 134 kHz.\r
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_134_KHZ);\r
- SpinDelay(20);\r
- vLf134 = AvgAdc(4);\r
- // Vref = 3.3V, and a 10000:240 voltage divider on the input\r
- // can measure voltages up to 137500 mV\r
- vLf134 = (137500 * vLf134) >> 10;\r
\r
// Let the FPGA drive the high-frequency antenna around 13.56 MHz.\r
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);\r
SpinDelay(20);\r
- vHf = AvgAdc(5);\r
// Vref = 3300mV, and an 10:1 voltage divider on the input\r
// can measure voltages up to 33000 mV\r
- vHf = (33000 * vHf) >> 10;\r
+ vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;\r
\r
c.cmd = CMD_MEASURED_ANTENNA_TUNING;\r
- c.ext1 = (vLf125 << 0) | (vLf134 << 16);\r
- c.ext2 = vHf;\r
- c.ext3 = (LF_TUNING_CAP_Z << 0) | (HF_TUNING_CAP_Z << 16);\r
+ c.arg[0] = (vLf125 << 0) | (vLf134 << 16);\r
+ c.arg[1] = vHf;\r
+ c.arg[2] = peakf | (peakv << 16);\r
UsbSendPacket((BYTE *)&c, sizeof(c));\r
}\r
\r
-void SimulateTagLowFrequency(int period)\r
+void SimulateTagHfListen(void)\r
{\r
+ BYTE *dest = (BYTE *)BigBuf;\r
+ int n = sizeof(BigBuf);\r
+ BYTE v = 0;\r
int i;\r
- BYTE *tab = (BYTE *)BigBuf;\r
-\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_SIMULATOR);\r
+ int p = 0;\r
\r
- PIO_ENABLE = (1 << GPIO_SSC_DOUT) | (1 << GPIO_SSC_CLK);\r
+ // We're using this mode just so that I can test it out; the simulated\r
+ // tag mode would work just as well and be simpler.\r
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP);\r
\r
- PIO_OUTPUT_ENABLE = (1 << GPIO_SSC_DOUT);\r
- PIO_OUTPUT_DISABLE = (1 << GPIO_SSC_CLK);\r
+ // We need to listen to the high-frequency, peak-detected path.\r
+ SetAdcMuxFor(GPIO_MUXSEL_HIPKD);\r
\r
-#define SHORT_COIL() LOW(GPIO_SSC_DOUT)\r
-#define OPEN_COIL() HIGH(GPIO_SSC_DOUT)\r
+ FpgaSetupSsc();\r
\r
i = 0;\r
for(;;) {\r
- while(!(PIO_PIN_DATA_STATUS & (1<<GPIO_SSC_CLK))) {\r
- if(BUTTON_PRESS()) {\r
- return;\r
- }\r
- WDT_HIT();\r
+ if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {\r
+ AT91C_BASE_SSC->SSC_THR = 0xff;\r
}\r
+ if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {\r
+ BYTE r = (BYTE)AT91C_BASE_SSC->SSC_RHR;\r
\r
- LED_D_ON();\r
- if(tab[i]) {\r
- OPEN_COIL();\r
- } else {\r
- SHORT_COIL();\r
- }\r
- LED_D_OFF();\r
+ v <<= 1;\r
+ if(r & 1) {\r
+ v |= 1;\r
+ }\r
+ p++;\r
\r
- while(PIO_PIN_DATA_STATUS & (1<<GPIO_SSC_CLK)) {\r
- if(BUTTON_PRESS()) {\r
- return;\r
+ if(p >= 8) {\r
+ dest[i] = v;\r
+ v = 0;\r
+ p = 0;\r
+ i++;\r
+\r
+ if(i >= n) {\r
+ break;\r
+ }\r
}\r
- WDT_HIT();\r
}\r
-\r
- i++;\r
- if(i == period) i = 0;\r
}\r
+ DbpString("simulate tag (now type bitsamples)");\r
}\r
\r
-// compose fc/8 fc/10 waveform\r
-static void fc(int c, int *n) {\r
- BYTE *dest = (BYTE *)BigBuf;\r
- int idx;\r
-\r
- // for when we want an fc8 pattern every 4 logical bits\r
- if(c==0) {\r
- dest[((*n)++)]=1;\r
- dest[((*n)++)]=1;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- }\r
- // an fc/8 encoded bit is a bit pattern of 11000000 x6 = 48 samples\r
- if(c==8) {\r
- for (idx=0; idx<6; idx++) {\r
- dest[((*n)++)]=1;\r
- dest[((*n)++)]=1;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- }\r
- }\r
+void ReadMem(int addr)\r
+{\r
+ const DWORD *data = ((DWORD *)addr);\r
\r
- // an fc/10 encoded bit is a bit pattern of 1110000000 x5 = 50 samples\r
- if(c==10) {\r
- for (idx=0; idx<5; idx++) {\r
- dest[((*n)++)]=1;\r
- dest[((*n)++)]=1;\r
- dest[((*n)++)]=1;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- dest[((*n)++)]=0;\r
- }\r
- }\r
+ Dbprintf("%x: %02x %02x %02x %02x %02x %02x %02x %02x",\r
+ addr, data[0], data[1], data[2], data[3], data[4], data[5], data[6], data[7]);\r
}\r
\r
-// prepare a waveform pattern in the buffer based on the ID given then\r
-// simulate a HID tag until the button is pressed\r
-static void CmdHIDsimTAG(int hi, int lo)\r
+/* osimage version information is linked in */\r
+extern struct version_information version_information;\r
+/* bootrom version information is pointed to from _bootphase1_version_pointer */\r
+extern char *_bootphase1_version_pointer, _flash_start, _flash_end;\r
+void SendVersion(void)\r
{\r
- int n=0, i=0;\r
- /*\r
- HID tag bitstream format\r
- The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits\r
- A 1 bit is represented as 6 fc8 and 5 fc10 patterns\r
- A 0 bit is represented as 5 fc10 and 6 fc8 patterns\r
- A fc8 is inserted before every 4 bits\r
- A special start of frame pattern is used consisting a0b0 where a and b are neither 0\r
- nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10)\r
- */\r
-\r
- if (hi>0xFFF) {\r
- DbpString("Tags can only have 44 bits.");\r
- return;\r
- }\r
- fc(0,&n);\r
- // special start of frame marker containing invalid bit sequences\r
- fc(8, &n); fc(8, &n); // invalid\r
- fc(8, &n); fc(10, &n); // logical 0\r
- fc(10, &n); fc(10, &n); // invalid\r
- fc(8, &n); fc(10, &n); // logical 0\r
-\r
- WDT_HIT();\r
- // manchester encode bits 43 to 32\r
- for (i=11; i>=0; i--) {\r
- if ((i%4)==3) fc(0,&n);\r
- if ((hi>>i)&1) {\r
- fc(10, &n); fc(8, &n); // low-high transition\r
- } else {\r
- fc(8, &n); fc(10, &n); // high-low transition\r
- }\r
- }\r
-\r
- WDT_HIT();\r
- // manchester encode bits 31 to 0\r
- for (i=31; i>=0; i--) {\r
- if ((i%4)==3) fc(0,&n);\r
- if ((lo>>i)&1) {\r
- fc(10, &n); fc(8, &n); // low-high transition\r
- } else {\r
- fc(8, &n); fc(10, &n); // high-low transition\r
- }\r
+ char temp[48]; /* Limited data payload in USB packets */\r
+ DbpString("Prox/RFID mark3 RFID instrument");\r
+ \r
+ /* Try to find the bootrom version information. Expect to find a pointer at \r
+ * symbol _bootphase1_version_pointer, perform slight sanity checks on the\r
+ * pointer, then use it.\r
+ */\r
+ char *bootrom_version = *(char**)&_bootphase1_version_pointer;\r
+ if( bootrom_version < &_flash_start || bootrom_version >= &_flash_end ) {\r
+ DbpString("bootrom version information appears invalid");\r
+ } else {\r
+ FormatVersionInformation(temp, sizeof(temp), "bootrom: ", bootrom_version);\r
+ DbpString(temp);\r
}\r
-\r
- LED_A_ON();\r
- SimulateTagLowFrequency(n);\r
- LED_A_OFF();\r
+ \r
+ FormatVersionInformation(temp, sizeof(temp), "os: ", &version_information);\r
+ DbpString(temp);\r
+ \r
+ FpgaGatherVersion(temp, sizeof(temp));\r
+ DbpString(temp);\r
}\r
\r
-// loop to capture raw HID waveform then FSK demodulate the TAG ID from it\r
-static void CmdHIDdemodFSK(void)\r
+#ifdef WITH_LF\r
+// samy's sniff and repeat routine\r
+void SamyRun()\r
{\r
- BYTE *dest = (BYTE *)BigBuf;\r
- int m=0, n=0, i=0, idx=0, found=0, lastval=0;\r
- DWORD hi=0, lo=0;\r
+ DbpString("Stand-alone mode! No PC necessary.");\r
\r
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_125_KHZ);\r
+ // 3 possible options? no just 2 for now\r
+#define OPTS 2\r
\r
- // Connect the A/D to the peak-detected low-frequency path.\r
- SetAdcMuxFor(GPIO_MUXSEL_LOPKD);\r
+ int high[OPTS], low[OPTS];\r
\r
- // Give it a bit of time for the resonant antenna to settle.\r
- SpinDelay(50);\r
+ // Oooh pretty -- notify user we're in elite samy mode now\r
+ LED(LED_RED, 200);\r
+ LED(LED_ORANGE, 200);\r
+ LED(LED_GREEN, 200);\r
+ LED(LED_ORANGE, 200);\r
+ LED(LED_RED, 200);\r
+ LED(LED_ORANGE, 200);\r
+ LED(LED_GREEN, 200);\r
+ LED(LED_ORANGE, 200);\r
+ LED(LED_RED, 200);\r
\r
- // Now set up the SSC to get the ADC samples that are now streaming at us.\r
- FpgaSetupSsc();\r
+ int selected = 0;\r
+ int playing = 0;\r
\r
- for(;;) {\r
+ // Turn on selected LED\r
+ LED(selected + 1, 0);\r
+\r
+ for (;;)\r
+ {\r
+ UsbPoll(FALSE);\r
WDT_HIT();\r
- LED_A_ON();\r
- if(BUTTON_PRESS()) {\r
- LED_A_OFF();\r
- return;\r
- }\r
\r
- i = 0;\r
- m = sizeof(BigBuf);\r
- memset(dest,128,m);\r
- for(;;) {\r
- if(SSC_STATUS & (SSC_STATUS_TX_READY)) {\r
- SSC_TRANSMIT_HOLDING = 0x43;\r
- LED_D_ON();\r
- }\r
- if(SSC_STATUS & (SSC_STATUS_RX_READY)) {\r
- dest[i] = (BYTE)SSC_RECEIVE_HOLDING;\r
- // we don't care about actual value, only if it's more or less than a\r
- // threshold essentially we capture zero crossings for later analysis\r
- if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;\r
- i++;\r
- LED_D_OFF();\r
- if(i >= m) {\r
- break;\r
- }\r
- }\r
- }\r
+ // Was our button held down or pressed?\r
+ int button_pressed = BUTTON_HELD(1000);\r
+ SpinDelay(300);\r
\r
- // FSK demodulator\r
+ // Button was held for a second, begin recording\r
+ if (button_pressed > 0)\r
+ {\r
+ LEDsoff();\r
+ LED(selected + 1, 0);\r
+ LED(LED_RED2, 0);\r
\r
- // sync to first lo-hi transition\r
- for( idx=1; idx<m; idx++) {\r
- if (dest[idx-1]<dest[idx])\r
- lastval=idx;\r
- break;\r
- }\r
- WDT_HIT();\r
+ // record\r
+ DbpString("Starting recording");\r
\r
- // count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)\r
- // or 10 (fc/10) cycles but in practice due to noise etc we may end up with with anywhere\r
- // between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10\r
- for( i=0; idx<m; idx++) {\r
- if (dest[idx-1]<dest[idx]) {\r
- dest[i]=idx-lastval;\r
- if (dest[i] <= 8) {\r
- dest[i]=1;\r
- } else {\r
- dest[i]=0;\r
- }\r
+ // wait for button to be released\r
+ while(BUTTON_PRESS())\r
+ WDT_HIT();\r
\r
- lastval=idx;\r
- i++;\r
- }\r
- }\r
- m=i;\r
- WDT_HIT();\r
+ /* need this delay to prevent catching some weird data */\r
+ SpinDelay(500);\r
\r
- // we now have a set of cycle counts, loop over previous results and aggregate data into bit patterns\r
- lastval=dest[0];\r
- idx=0;\r
- i=0;\r
- n=0;\r
- for( idx=0; idx<m; idx++) {\r
- if (dest[idx]==lastval) {\r
- n++;\r
- } else {\r
- // a bit time is five fc/10 or six fc/8 cycles so figure out how many bits a pattern width represents,\r
- // an extra fc/8 pattern preceeds every 4 bits (about 200 cycles) just to complicate things but it gets\r
- // swallowed up by rounding\r
- // expected results are 1 or 2 bits, any more and it's an invalid manchester encoding\r
- // special start of frame markers use invalid manchester states (no transitions) by using sequences\r
- // like 111000\r
- if (dest[idx-1]) {\r
- n=(n+1)/6; // fc/8 in sets of 6\r
- } else {\r
- n=(n+1)/5; // fc/10 in sets of 5\r
- }\r
- switch (n) { // stuff appropriate bits in buffer\r
- case 0:\r
- case 1: // one bit\r
- dest[i++]=dest[idx-1];\r
- break;\r
- case 2: // two bits\r
- dest[i++]=dest[idx-1];\r
- dest[i++]=dest[idx-1];\r
- break;\r
- case 3: // 3 bit start of frame markers\r
- dest[i++]=dest[idx-1];\r
- dest[i++]=dest[idx-1];\r
- dest[i++]=dest[idx-1];\r
- break;\r
- // When a logic 0 is immediately followed by the start of the next transmisson\r
- // (special pattern) a pattern of 4 bit duration lengths is created.\r
- case 4:\r
- dest[i++]=dest[idx-1];\r
- dest[i++]=dest[idx-1];\r
- dest[i++]=dest[idx-1];\r
- dest[i++]=dest[idx-1];\r
- break;\r
- default: // this shouldn't happen, don't stuff any bits\r
- break;\r
- }\r
- n=0;\r
- lastval=dest[idx];\r
- }\r
+ CmdHIDdemodFSK(1, &high[selected], &low[selected], 0);\r
+ Dbprintf("Recorded %x %x %x", selected, high[selected], low[selected]);\r
+\r
+ LEDsoff();\r
+ LED(selected + 1, 0);\r
+ // Finished recording\r
+\r
+ // If we were previously playing, set playing off\r
+ // so next button push begins playing what we recorded\r
+ playing = 0;\r
}\r
- m=i;\r
- WDT_HIT();\r
\r
- // final loop, go over previously decoded manchester data and decode into usable tag ID\r
- // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0\r
- for( idx=0; idx<m-6; idx++) {\r
- // search for a start of frame marker\r
- if ( dest[idx] && dest[idx+1] && dest[idx+2] && (!dest[idx+3]) && (!dest[idx+4]) && (!dest[idx+5]) )\r
- {\r
- found=1;\r
- idx+=6;\r
- if (found && (hi|lo)) {\r
- DbpString("TAG ID");\r
- DbpIntegers(hi, lo, (lo>>1)&0xffff);\r
- hi=0;\r
- lo=0;\r
- found=0;\r
- }\r
- }\r
- if (found) {\r
- if (dest[idx] && (!dest[idx+1]) ) {\r
- hi=(hi<<1)|(lo>>31);\r
- lo=(lo<<1)|0;\r
- } else if ( (!dest[idx]) && dest[idx+1]) {\r
- hi=(hi<<1)|(lo>>31);\r
- lo=(lo<<1)|1;\r
- } else {\r
- found=0;\r
- hi=0;\r
- lo=0;\r
- }\r
- idx++;\r
- }\r
- if ( dest[idx] && dest[idx+1] && dest[idx+2] && (!dest[idx+3]) && (!dest[idx+4]) && (!dest[idx+5]) )\r
+ // Change where to record (or begin playing)\r
+ else if (button_pressed)\r
+ {\r
+ // Next option if we were previously playing\r
+ if (playing)\r
+ selected = (selected + 1) % OPTS;\r
+ playing = !playing;\r
+\r
+ LEDsoff();\r
+ LED(selected + 1, 0);\r
+\r
+ // Begin transmitting\r
+ if (playing)\r
{\r
- found=1;\r
- idx+=6;\r
- if (found && (hi|lo)) {\r
- DbpString("TAG ID");\r
- DbpIntegers(hi, lo, (lo>>1)&0xffff);\r
- hi=0;\r
- lo=0;\r
- found=0;\r
- }\r
+ LED(LED_GREEN, 0);\r
+ DbpString("Playing");\r
+ // wait for button to be released\r
+ while(BUTTON_PRESS())\r
+ WDT_HIT();\r
+ Dbprintf("%x %x %x", selected, high[selected], low[selected]);\r
+ CmdHIDsimTAG(high[selected], low[selected], 0);\r
+ DbpString("Done playing");\r
+ if (BUTTON_HELD(1000) > 0)\r
+ {\r
+ DbpString("Exiting");\r
+ LEDsoff();\r
+ return;\r
+ }\r
+\r
+ /* We pressed a button so ignore it here with a delay */\r
+ SpinDelay(300);\r
+\r
+ // when done, we're done playing, move to next option\r
+ selected = (selected + 1) % OPTS;\r
+ playing = !playing;\r
+ LEDsoff();\r
+ LED(selected + 1, 0);\r
}\r
+ else\r
+ while(BUTTON_PRESS())\r
+ WDT_HIT();\r
}\r
- WDT_HIT();\r
}\r
}\r
-\r
-void SimulateTagHfListen(void)\r
+#endif\r
+\r
+/*\r
+OBJECTIVE\r
+Listen and detect an external reader. Determine the best location\r
+for the antenna.\r
+\r
+INSTRUCTIONS:\r
+Inside the ListenReaderField() function, there is two mode.\r
+By default, when you call the function, you will enter mode 1.\r
+If you press the PM3 button one time, you will enter mode 2.\r
+If you press the PM3 button a second time, you will exit the function.\r
+\r
+DESCRIPTION OF MODE 1:\r
+This mode just listens for an external reader field and lights up green\r
+for HF and/or red for LF. This is the original mode of the detectreader\r
+function.\r
+\r
+DESCRIPTION OF MODE 2:\r
+This mode will visually represent, using the LEDs, the actual strength of the\r
+current compared to the maximum current detected. Basically, once you know\r
+what kind of external reader is present, it will help you spot the best location to place\r
+your antenna. You will probably not get some good results if there is a LF and a HF reader\r
+at the same place! :-)\r
+\r
+LIGHT SCHEME USED:\r
+*/\r
+static const char LIGHT_SCHEME[] = {\r
+ 0x0, /* ---- | No field detected */\r
+ 0x1, /* X--- | 14% of maximum current detected */\r
+ 0x2, /* -X-- | 29% of maximum current detected */\r
+ 0x4, /* --X- | 43% of maximum current detected */\r
+ 0x8, /* ---X | 57% of maximum current detected */\r
+ 0xC, /* --XX | 71% of maximum current detected */\r
+ 0xE, /* -XXX | 86% of maximum current detected */\r
+ 0xF, /* XXXX | 100% of maximum current detected */\r
+};\r
+static const int LIGHT_LEN = sizeof(LIGHT_SCHEME)/sizeof(LIGHT_SCHEME[0]);\r
+\r
+void ListenReaderField(int limit)\r
{\r
- BYTE *dest = (BYTE *)BigBuf;\r
- int n = sizeof(BigBuf);\r
- BYTE v = 0;\r
- int i;\r
- int p = 0;\r
+ int lf_av, lf_av_new, lf_baseline= 0, lf_count= 0, lf_max;\r
+ int hf_av, hf_av_new, hf_baseline= 0, hf_count= 0, hf_max;\r
+ int mode=1, display_val, display_max, i;\r
\r
- // We're using this mode just so that I can test it out; the simulated\r
- // tag mode would work just as well and be simpler.\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP);\r
+#define LF_ONLY 1\r
+#define HF_ONLY 2\r
\r
- // We need to listen to the high-frequency, peak-detected path.\r
- SetAdcMuxFor(GPIO_MUXSEL_HIPKD);\r
+ LEDsoff();\r
\r
- FpgaSetupSsc();\r
+ lf_av=lf_max=ReadAdc(ADC_CHAN_LF);\r
+\r
+ if(limit != HF_ONLY) {\r
+ Dbprintf("LF 125/134 Baseline: %d", lf_av);\r
+ lf_baseline = lf_av;\r
+ }\r
+\r
+ hf_av=hf_max=ReadAdc(ADC_CHAN_HF);\r
+\r
+ if (limit != LF_ONLY) {\r
+ Dbprintf("HF 13.56 Baseline: %d", hf_av);\r
+ hf_baseline = hf_av;\r
+ }\r
\r
- i = 0;\r
for(;;) {\r
- if(SSC_STATUS & (SSC_STATUS_TX_READY)) {\r
- SSC_TRANSMIT_HOLDING = 0xff;\r
+ if (BUTTON_PRESS()) {\r
+ SpinDelay(500);\r
+ switch (mode) {\r
+ case 1:\r
+ mode=2;\r
+ DbpString("Signal Strength Mode");\r
+ break;\r
+ case 2:\r
+ default:\r
+ DbpString("Stopped");\r
+ LEDsoff();\r
+ return;\r
+ break;\r
+ }\r
}\r
- if(SSC_STATUS & (SSC_STATUS_RX_READY)) {\r
- BYTE r = (BYTE)SSC_RECEIVE_HOLDING;\r
+ WDT_HIT();\r
\r
- v <<= 1;\r
- if(r & 1) {\r
- v |= 1;\r
+ if (limit != HF_ONLY) {\r
+ if(mode==1) {\r
+ if (abs(lf_av - lf_baseline) > 10) LED_D_ON();\r
+ else LED_D_OFF();\r
}\r
- p++;\r
-\r
- if(p >= 8) {\r
- dest[i] = v;\r
- v = 0;\r
- p = 0;\r
- i++;\r
+ \r
+ ++lf_count;\r
+ lf_av_new= ReadAdc(ADC_CHAN_LF);\r
+ // see if there's a significant change\r
+ if(abs(lf_av - lf_av_new) > 10) {\r
+ Dbprintf("LF 125/134 Field Change: %x %x %x", lf_av, lf_av_new, lf_count);\r
+ lf_av = lf_av_new;\r
+ if (lf_av > lf_max)\r
+ lf_max = lf_av;\r
+ lf_count= 0;\r
+ }\r
+ }\r
\r
- if(i >= n) {\r
+ if (limit != LF_ONLY) {\r
+ if (mode == 1){\r
+ if (abs(hf_av - hf_baseline) > 10) LED_B_ON();\r
+ else LED_B_OFF();\r
+ }\r
+ \r
+ ++hf_count;\r
+ hf_av_new= ReadAdc(ADC_CHAN_HF);\r
+ // see if there's a significant change\r
+ if(abs(hf_av - hf_av_new) > 10) {\r
+ Dbprintf("HF 13.56 Field Change: %x %x %x", hf_av, hf_av_new, hf_count);\r
+ hf_av = hf_av_new;\r
+ if (hf_av > hf_max)\r
+ hf_max = hf_av;\r
+ hf_count= 0;\r
+ }\r
+ }\r
+ \r
+ if(mode == 2) {\r
+ if (limit == LF_ONLY) {\r
+ display_val = lf_av;\r
+ display_max = lf_max;\r
+ } else if (limit == HF_ONLY) {\r
+ display_val = hf_av;\r
+ display_max = hf_max;\r
+ } else { /* Pick one at random */\r
+ if( (hf_max - hf_baseline) > (lf_max - lf_baseline) ) {\r
+ display_val = hf_av;\r
+ display_max = hf_max;\r
+ } else {\r
+ display_val = lf_av;\r
+ display_max = lf_max;\r
+ }\r
+ }\r
+ for (i=0; i<LIGHT_LEN; i++) {\r
+ if (display_val >= ((display_max/LIGHT_LEN)*i) && display_val <= ((display_max/LIGHT_LEN)*(i+1))) {\r
+ if (LIGHT_SCHEME[i] & 0x1) LED_C_ON(); else LED_C_OFF();\r
+ if (LIGHT_SCHEME[i] & 0x2) LED_A_ON(); else LED_A_OFF();\r
+ if (LIGHT_SCHEME[i] & 0x4) LED_B_ON(); else LED_B_OFF();\r
+ if (LIGHT_SCHEME[i] & 0x8) LED_D_ON(); else LED_D_OFF();\r
break;\r
}\r
}\r
}\r
}\r
- DbpString("simulate tag (now type bitsamples)");\r
}\r
\r
void UsbPacketReceived(BYTE *packet, int len)\r
UsbCommand *c = (UsbCommand *)packet;\r
\r
switch(c->cmd) {\r
+#ifdef WITH_LF\r
case CMD_ACQUIRE_RAW_ADC_SAMPLES_125K:\r
- AcquireRawAdcSamples125k(c->ext1);\r
+ AcquireRawAdcSamples125k(c->arg[0]);\r
break;\r
+#endif\r
\r
+#ifdef WITH_LF\r
+ case CMD_MOD_THEN_ACQUIRE_RAW_ADC_SAMPLES_125K:\r
+ ModThenAcquireRawAdcSamples125k(c->arg[0],c->arg[1],c->arg[2],c->d.asBytes);\r
+ break;\r
+#endif\r
+\r
+#ifdef WITH_ISO15693\r
case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_15693:\r
AcquireRawAdcSamplesIso15693();\r
break;\r
+#endif\r
+\r
+ case CMD_BUFF_CLEAR:\r
+ BufferClear();\r
+ break;\r
\r
+#ifdef WITH_ISO15693\r
case CMD_READER_ISO_15693:\r
- ReaderIso15693(c->ext1);\r
+ ReaderIso15693(c->arg[0]);\r
break;\r
+#endif\r
\r
+ case CMD_READER_LEGIC_RF:\r
+ LegicRfReader();\r
+ break;\r
+\r
+#ifdef WITH_ISO15693\r
case CMD_SIMTAG_ISO_15693:\r
- SimTagIso15693(c->ext1);\r
+ SimTagIso15693(c->arg[0]);\r
break;\r
+#endif\r
\r
+#ifdef WITH_ISO14443b\r
case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_14443:\r
- AcquireRawAdcSamplesIso14443(c->ext1);\r
+ AcquireRawAdcSamplesIso14443(c->arg[0]);\r
+ break;\r
+#endif\r
+\r
+#ifdef WITH_ISO14443b\r
+ case CMD_READ_SRI512_TAG:\r
+ ReadSRI512Iso14443(c->arg[0]);\r
break;\r
+ case CMD_READ_SRIX4K_TAG:\r
+ ReadSRIX4KIso14443(c->arg[0]);\r
+ break;\r
+#endif\r
\r
+#ifdef WITH_ISO14443a\r
case CMD_READER_ISO_14443a:\r
- ReaderIso14443a(c->ext1);\r
+ ReaderIso14443a(c->arg[0]);\r
break;\r
+#endif\r
\r
+#ifdef WITH_ISO14443a\r
+ case CMD_READER_MIFARE:\r
+ ReaderMifare(c->arg[0]);\r
+ break;\r
+#endif\r
+ \r
+#ifdef WITH_ISO14443b\r
case CMD_SNOOP_ISO_14443:\r
SnoopIso14443();\r
break;\r
+#endif\r
\r
+#ifdef WITH_ISO14443a\r
case CMD_SNOOP_ISO_14443a:\r
SnoopIso14443a();\r
break;\r
+#endif\r
\r
case CMD_SIMULATE_TAG_HF_LISTEN:\r
SimulateTagHfListen();\r
break;\r
\r
+#ifdef WITH_ISO14443b\r
case CMD_SIMULATE_TAG_ISO_14443:\r
SimulateIso14443Tag();\r
break;\r
-\r
+#endif\r
+ \r
+#ifdef WITH_ISO14443a\r
case CMD_SIMULATE_TAG_ISO_14443a:\r
- SimulateIso14443aTag(c->ext1, c->ext2); // ## Simulate iso14443a tag - pass tag type & UID\r
+ SimulateIso14443aTag(c->arg[0], c->arg[1]); // ## Simulate iso14443a tag - pass tag type & UID\r
break;\r
+#endif\r
\r
case CMD_MEASURE_ANTENNA_TUNING:\r
MeasureAntennaTuning();\r
break;\r
\r
+ case CMD_LISTEN_READER_FIELD:\r
+ ListenReaderField(c->arg[0]);\r
+ break;\r
+\r
+#ifdef WITH_LF\r
case CMD_HID_DEMOD_FSK:\r
- CmdHIDdemodFSK(); // Demodulate HID tag\r
+ CmdHIDdemodFSK(0, 0, 0, 1); // Demodulate HID tag\r
break;\r
+#endif\r
\r
+#ifdef WITH_LF\r
case CMD_HID_SIM_TAG:\r
- CmdHIDsimTAG(c->ext1, c->ext2); // Simulate HID tag by ID\r
+ CmdHIDsimTAG(c->arg[0], c->arg[1], 1); // Simulate HID tag by ID\r
break;\r
+#endif\r
\r
case CMD_FPGA_MAJOR_MODE_OFF: // ## FPGA Control\r
- LED_C_ON();\r
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
SpinDelay(200);\r
- LED_C_OFF();\r
+ LED_D_OFF(); // LED D indicates field ON or OFF\r
+ break;\r
+\r
+#ifdef WITH_LF\r
+ case CMD_READ_TI_TYPE:\r
+ ReadTItag();\r
+ break;\r
+#endif\r
+\r
+#ifdef WITH_LF\r
+ case CMD_WRITE_TI_TYPE:\r
+ WriteTItag(c->arg[0],c->arg[1],c->arg[2]);\r
break;\r
+#endif\r
\r
- case CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K:\r
- case CMD_DOWNLOAD_RAW_BITS_TI_TYPE: {\r
+ case CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K: {\r
UsbCommand n;\r
if(c->cmd == CMD_DOWNLOAD_RAW_ADC_SAMPLES_125K) {\r
n.cmd = CMD_DOWNLOADED_RAW_ADC_SAMPLES_125K;\r
} else {\r
n.cmd = CMD_DOWNLOADED_RAW_BITS_TI_TYPE;\r
}\r
- n.ext1 = c->ext1;\r
- memcpy(n.d.asDwords, BigBuf+c->ext1, 12*sizeof(DWORD));\r
+ n.arg[0] = c->arg[0];\r
+ memcpy(n.d.asDwords, BigBuf+c->arg[0], 12*sizeof(DWORD));\r
UsbSendPacket((BYTE *)&n, sizeof(n));\r
break;\r
}\r
+\r
case CMD_DOWNLOADED_SIM_SAMPLES_125K: {\r
BYTE *b = (BYTE *)BigBuf;\r
- memcpy(b+c->ext1, c->d.asBytes, 48);\r
+ memcpy(b+c->arg[0], c->d.asBytes, 48);\r
break;\r
}\r
+\r
+#ifdef WITH_LF\r
case CMD_SIMULATE_TAG_125K:\r
LED_A_ON();\r
- SimulateTagLowFrequency(c->ext1);\r
+ SimulateTagLowFrequency(c->arg[0], 1);\r
LED_A_OFF();\r
break;\r
+#endif\r
\r
- case CMD_LCD_RESET:\r
- LCDReset();\r
+ case CMD_READ_MEM:\r
+ ReadMem(c->arg[0]);\r
break;\r
\r
- case CMD_SWEEP_LF:\r
- SweepLFrange();\r
+ case CMD_SET_LF_DIVISOR:\r
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, c->arg[0]);\r
break;\r
\r
- case CMD_SET_LF_DIVISOR:\r
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, c->ext1);\r
+ case CMD_SET_ADC_MUX:\r
+ switch(c->arg[0]) {\r
+ case 0: SetAdcMuxFor(GPIO_MUXSEL_LOPKD); break;\r
+ case 1: SetAdcMuxFor(GPIO_MUXSEL_LORAW); break;\r
+ case 2: SetAdcMuxFor(GPIO_MUXSEL_HIPKD); break;\r
+ case 3: SetAdcMuxFor(GPIO_MUXSEL_HIRAW); break;\r
+ }\r
break;\r
\r
- case CMD_LCD:\r
- LCDSend(c->ext1);\r
+ case CMD_VERSION:\r
+ SendVersion();\r
+ break;\r
+\r
+#ifdef WITH_LF\r
+ case CMD_LF_SIMULATE_BIDIR:\r
+ SimulateTagLowFrequencyBidir(c->arg[0], c->arg[1]);\r
break;\r
+#endif\r
\r
- case CMD_SETUP_WRITE:\r
+#ifdef WITH_LCD\r
+ case CMD_LCD_RESET:\r
+ LCDReset();\r
+ break;\r
+ case CMD_LCD:\r
+ LCDSend(c->arg[0]);\r
+ break;\r
+#endif\r
+ case CMD_SETUP_WRITE:\r
case CMD_FINISH_WRITE:\r
+ case CMD_HARDWARE_RESET:\r
USB_D_PLUS_PULLUP_OFF();\r
SpinDelay(1000);\r
SpinDelay(1000);\r
- RSTC_CONTROL = RST_CONTROL_KEY | RST_CONTROL_PROCESSOR_RESET;\r
+ AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;\r
for(;;) {\r
// We're going to reset, and the bootrom will take control.\r
}\r
break;\r
\r
+ case CMD_START_FLASH:\r
+ if(common_area.flags.bootrom_present) {\r
+ common_area.command = COMMON_AREA_COMMAND_ENTER_FLASH_MODE;\r
+ }\r
+ USB_D_PLUS_PULLUP_OFF();\r
+ AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;\r
+ for(;;);\r
+ break;\r
+ \r
+ case CMD_DEVICE_INFO: {\r
+ UsbCommand c;\r
+ c.cmd = CMD_DEVICE_INFO;\r
+ c.arg[0] = DEVICE_INFO_FLAG_OSIMAGE_PRESENT | DEVICE_INFO_FLAG_CURRENT_MODE_OS;\r
+ if(common_area.flags.bootrom_present) c.arg[0] |= DEVICE_INFO_FLAG_BOOTROM_PRESENT;\r
+ UsbSendPacket((BYTE*)&c, sizeof(c));\r
+ }\r
+ break;\r
default:\r
DbpString("unknown command");\r
break;\r
}\r
}\r
\r
-void AppMain(void)\r
+void __attribute__((noreturn)) AppMain(void)\r
{\r
- memset(BigBuf,0,sizeof(BigBuf));\r
SpinDelay(100);\r
+ \r
+ if(common_area.magic != COMMON_AREA_MAGIC || common_area.version != 1) {\r
+ /* Initialize common area */\r
+ memset(&common_area, 0, sizeof(common_area));\r
+ common_area.magic = COMMON_AREA_MAGIC;\r
+ common_area.version = 1;\r
+ }\r
+ common_area.flags.osimage_present = 1;\r
\r
- LED_D_OFF();\r
- LED_C_OFF();\r
- LED_B_OFF();\r
- LED_A_OFF();\r
+ LED_D_OFF();\r
+ LED_C_OFF();\r
+ LED_B_OFF();\r
+ LED_A_OFF();\r
\r
UsbStart();\r
\r
// The FPGA gets its clock from us from PCK0 output, so set that up.\r
- PIO_PERIPHERAL_B_SEL = (1 << GPIO_PCK0);\r
- PIO_DISABLE = (1 << GPIO_PCK0);\r
- PMC_SYS_CLK_ENABLE = PMC_SYS_CLK_PROGRAMMABLE_CLK_0;\r
+ AT91C_BASE_PIOA->PIO_BSR = GPIO_PCK0;\r
+ AT91C_BASE_PIOA->PIO_PDR = GPIO_PCK0;\r
+ AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_PCK0;\r
// PCK0 is PLL clock / 4 = 96Mhz / 4 = 24Mhz\r
- PMC_PROGRAMMABLE_CLK_0 = PMC_CLK_SELECTION_PLL_CLOCK |\r
- PMC_CLK_PRESCALE_DIV_4;\r
- PIO_OUTPUT_ENABLE = (1 << GPIO_PCK0);\r
+ AT91C_BASE_PMC->PMC_PCKR[0] = AT91C_PMC_CSS_PLL_CLK |\r
+ AT91C_PMC_PRES_CLK_4;\r
+ AT91C_BASE_PIOA->PIO_OER = GPIO_PCK0;\r
\r
// Reset SPI\r
- SPI_CONTROL = SPI_CONTROL_RESET;\r
+ AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;\r
// Reset SSC\r
- SSC_CONTROL = SSC_CONTROL_RESET;\r
+ AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;\r
\r
// Load the FPGA image, which we have stored in our flash.\r
FpgaDownloadAndGo();\r
\r
+#ifdef WITH_LCD\r
+\r
LCDInit();\r
\r
// test text on different colored backgrounds\r
- LCDString(" The quick brown fox ", &FONT6x8,1,1+8*0,WHITE ,BLACK );\r
- LCDString(" jumped over the ", &FONT6x8,1,1+8*1,BLACK ,WHITE );\r
- LCDString(" lazy dog. ", &FONT6x8,1,1+8*2,YELLOW ,RED );\r
- LCDString(" AaBbCcDdEeFfGgHhIiJj ", &FONT6x8,1,1+8*3,RED ,GREEN );\r
- LCDString(" KkLlMmNnOoPpQqRrSsTt ", &FONT6x8,1,1+8*4,MAGENTA,BLUE );\r
- LCDString("UuVvWwXxYyZz0123456789", &FONT6x8,1,1+8*5,BLUE ,YELLOW);\r
- LCDString("`-=[]_;',./~!@#$%^&*()", &FONT6x8,1,1+8*6,BLACK ,CYAN );\r
- LCDString(" _+{}|:\\\"<>? ",&FONT6x8,1,1+8*7,BLUE ,MAGENTA);\r
+ LCDString(" The quick brown fox ", (char *)&FONT6x8,1,1+8*0,WHITE ,BLACK );\r
+ LCDString(" jumped over the ", (char *)&FONT6x8,1,1+8*1,BLACK ,WHITE );\r
+ LCDString(" lazy dog. ", (char *)&FONT6x8,1,1+8*2,YELLOW ,RED );\r
+ LCDString(" AaBbCcDdEeFfGgHhIiJj ", (char *)&FONT6x8,1,1+8*3,RED ,GREEN );\r
+ LCDString(" KkLlMmNnOoPpQqRrSsTt ", (char *)&FONT6x8,1,1+8*4,MAGENTA,BLUE );\r
+ LCDString("UuVvWwXxYyZz0123456789", (char *)&FONT6x8,1,1+8*5,BLUE ,YELLOW);\r
+ LCDString("`-=[]_;',./~!@#$%^&*()", (char *)&FONT6x8,1,1+8*6,BLACK ,CYAN );\r
+ LCDString(" _+{}|:\\\"<>? ",(char *)&FONT6x8,1,1+8*7,BLUE ,MAGENTA);\r
\r
// color bands\r
LCDFill(0, 1+8* 8, 132, 8, BLACK);\r
LCDFill(0, 1+8*14, 132, 8, CYAN);\r
LCDFill(0, 1+8*15, 132, 8, MAGENTA);\r
\r
+#endif\r
+\r
for(;;) {\r
UsbPoll(FALSE);\r
WDT_HIT();\r
- }\r
-}\r
\r
-void SpinDelay(int ms)\r
-{\r
- int ticks = (48000*ms) >> 10;\r
-\r
- // Borrow a PWM unit for my real-time clock\r
- PWM_ENABLE = PWM_CHANNEL(0);\r
- // 48 MHz / 1024 gives 46.875 kHz\r
- PWM_CH_MODE(0) = PWM_CH_MODE_PRESCALER(10);\r
- PWM_CH_DUTY_CYCLE(0) = 0;\r
- PWM_CH_PERIOD(0) = 0xffff;\r
-\r
- WORD start = (WORD)PWM_CH_COUNTER(0);\r
-\r
- for(;;) {\r
- WORD now = (WORD)PWM_CH_COUNTER(0);\r
- if(now == (WORD)(start + ticks)) {\r
- return;\r
- }\r
- WDT_HIT();\r
+#ifdef WITH_LF\r
+ if (BUTTON_HELD(1000) > 0)\r
+ SamyRun();\r
+#endif\r
}\r
}\r
projects / proxmark3-svn / blobdiff