// Miscellaneous routines for low frequency sampling.
//-----------------------------------------------------------------------------
-#include "proxmark3.h"
-#include "apps.h"
-#include "util.h"
-#include "string.h"
-
#include "lfsampling.h"
sample_config config = { 1, 8, 1, 95, 0 } ;
-void printConfig()
-{
- Dbprintf("Sampling config: ");
+void printConfig() {
+ Dbprintf("LF Sampling config: ");
Dbprintf(" [q] divisor: %d ", config.divisor);
Dbprintf(" [b] bps: %d ", config.bits_per_sample);
Dbprintf(" [d] decimation: %d ", config.decimation);
* @brief setSamplingConfig
* @param sc
*/
-void setSamplingConfig(sample_config *sc)
-{
+void setSamplingConfig(sample_config *sc) {
if(sc->divisor != 0) config.divisor = sc->divisor;
- if(sc->bits_per_sample!= 0) config.bits_per_sample= sc->bits_per_sample;
- if(sc->decimation!= 0) config.decimation= sc->decimation;
- if(sc->trigger_threshold != -1) config.trigger_threshold= sc->trigger_threshold;
+ if(sc->bits_per_sample != 0) config.bits_per_sample = sc->bits_per_sample;
+ if(sc->decimation != 0) config.decimation = sc->decimation;
+ if(sc->trigger_threshold != -1) config.trigger_threshold = sc->trigger_threshold;
- config.averaging= sc->averaging;
+ config.averaging = sc->averaging;
if(config.bits_per_sample > 8) config.bits_per_sample = 8;
if(config.decimation < 1) config.decimation = 1;
printConfig();
}
-sample_config* getSamplingConfig()
-{
+sample_config* getSamplingConfig() {
return &config;
}
-typedef struct {
+struct BitstreamOut {
uint8_t * buffer;
uint32_t numbits;
uint32_t position;
-} BitstreamOut;
+};
/**
* @brief Pushes bit onto the stream
* @param stream
* @param bit
*/
-void pushBit( BitstreamOut* stream, uint8_t bit)
-{
+void pushBit( BitstreamOut* stream, uint8_t bit) {
int bytepos = stream->position >> 3; // divide by 8
int bitpos = stream->position & 7;
*(stream->buffer+bytepos) |= (bit > 0) << (7 - bitpos);
* 0 or 95 ==> 125 KHz
*
**/
-void LFSetupFPGAForADC(int divisor, bool lf_field)
-{
+void LFSetupFPGAForADC(int divisor, bool lf_field) {
FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
if ( (divisor == 1) || (divisor < 0) || (divisor > 255) )
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
// Connect the A/D to the peak-detected low-frequency path.
SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
- // Give it a bit of time for the resonant antenna to settle.
+ // 50ms for the resonant antenna to settle.
SpinDelay(50);
// Now set up the SSC to get the ADC samples that are now streaming at us.
FpgaSetupSsc();
+ // start a 1.5ticks is 1us
+ StartTicks();
}
-
/**
* Does the sample acquisition. If threshold is specified, the actual sampling
* is not commenced until the threshold has been reached.
* @param silent - is true, now outputs are made. If false, dbprints the status
* @return the number of bits occupied by the samples.
*/
-
-uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averaging, int trigger_threshold,bool silent)
-{
- //.
+uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averaging, int trigger_threshold,bool silent) {
+ //bigbuf, to hold the aquired raw data signal
uint8_t *dest = BigBuf_get_addr();
- int bufsize = BigBuf_max_traceLen();
+ uint16_t bufsize = BigBuf_max_traceLen();
- memset(dest, 0, bufsize);
+ //BigBuf_Clear_ext(false); //creates issues with cmdread (marshmellow)
if(bits_per_sample < 1) bits_per_sample = 1;
if(bits_per_sample > 8) bits_per_sample = 8;
uint32_t sample_total_numbers =0 ;
uint32_t sample_total_saved =0 ;
- while(!BUTTON_PRESS()) {
+ while(!BUTTON_PRESS() && !usb_poll_validate_length() ) {
WDT_HIT();
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
AT91C_BASE_SSC->SSC_THR = 0x43;
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
sample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
LED_D_OFF();
- if (trigger_threshold > 0 && sample < trigger_threshold)
+ // threshold either high or low values 128 = center 0. if trigger = 178
+ if ((trigger_threshold > 0) && (sample < (trigger_threshold+128)) && (sample > (128-trigger_threshold))) //
continue;
trigger_threshold = 0;
* @param silent
* @return number of bits sampled
*/
-uint32_t DoAcquisition_default(int trigger_threshold, bool silent)
-{
+uint32_t DoAcquisition_default(int trigger_threshold, bool silent) {
return DoAcquisition(1,8,0,trigger_threshold,silent);
}
-uint32_t DoAcquisition_config( bool silent)
-{
+uint32_t DoAcquisition_config( bool silent) {
return DoAcquisition(config.decimation
,config.bits_per_sample
,config.averaging
,silent);
}
-uint32_t ReadLF(bool activeField)
-{
- printConfig();
+uint32_t ReadLF(bool activeField, bool silent) {
+ if (!silent)
+ printConfig();
LFSetupFPGAForADC(config.divisor, activeField);
- // Now call the acquisition routine
- return DoAcquisition_config(false);
+ return DoAcquisition_config(silent);
}
/**
* Initializes the FPGA for reader-mode (field on), and acquires the samples.
* @return number of bits sampled
**/
-uint32_t SampleLF()
-{
- return ReadLF(true);
+uint32_t SampleLF(bool printCfg) {
+ return ReadLF(true, printCfg);
}
/**
* Initializes the FPGA for snoop-mode (field off), and acquires the samples.
* @return number of bits sampled
**/
+uint32_t SnoopLF() {
+ return ReadLF(false, true);
+}
+
+/**
+* acquisition of T55x7 LF signal. Similart to other LF, but adjusted with @marshmellows thresholds
+* the data is collected in BigBuf.
+**/
+void doT55x7Acquisition(size_t sample_size) {
+
+ #define T55xx_READ_UPPER_THRESHOLD 128+40 // 60 grph
+ #define T55xx_READ_LOWER_THRESHOLD 128-40 // -60 grph
+ #define T55xx_READ_TOL 2
+
+ uint8_t *dest = BigBuf_get_addr();
+ uint16_t bufsize = BigBuf_max_traceLen();
+
+ if ( bufsize > sample_size )
+ bufsize = sample_size;
-uint32_t SnoopLF()
-{
- return ReadLF(false);
+ uint8_t curSample = 0, lastSample = 0;
+ uint16_t i = 0, skipCnt = 0;
+ bool startFound = false;
+ bool highFound = false;
+ bool lowFound = false;
+
+ while(!BUTTON_PRESS() && !usb_poll_validate_length() && skipCnt < 1000 && (i < bufsize) ) {
+ WDT_HIT();
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+ AT91C_BASE_SSC->SSC_THR = 0x43; //43
+ LED_D_ON();
+ }
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
+ curSample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
+ LED_D_OFF();
+
+ // skip until the first high sample above threshold
+ if (!startFound && curSample > T55xx_READ_UPPER_THRESHOLD) {
+ //if (curSample > lastSample)
+ // lastSample = curSample;
+ highFound = true;
+ } else if (!highFound) {
+ skipCnt++;
+ continue;
+ }
+ // skip until the first low sample below threshold
+ if (!startFound && curSample < T55xx_READ_LOWER_THRESHOLD) {
+ //if (curSample > lastSample)
+ lastSample = curSample;
+ lowFound = true;
+ } else if (!lowFound) {
+ skipCnt++;
+ continue;
+ }
+
+ // skip until first high samples begin to change
+ if (startFound || curSample > T55xx_READ_LOWER_THRESHOLD + T55xx_READ_TOL){
+ // if just found start - recover last sample
+ if (!startFound) {
+ dest[i++] = lastSample;
+ startFound = true;
+ }
+ // collect samples
+ dest[i++] = curSample;
+ }
+ }
+ }
}
+
\ No newline at end of file
projects / proxmark3-svn / blobdiff