Fix some printf/scanf format strings

[proxmark3-svn] / fpga / min_max_tracker.v

diff --git a/fpga/min_max_tracker.v b/fpga/min_max_tracker.v
index 516f0d6f32ebe1e13bd7dce0af687d1dff4e033b..c47cfd3d289021a939a31217f3bd0f87903f2236 100644 (file)
--- a/fpga/min_max_tracker.v
+++ b/fpga/min_max_tracker.v
@@ -11,7 +11,7 @@
 // (resp. low peak) is reached/detected, since you can't know it isn't a
 // local minima (resp. maxima) until then.
 // This also means the peaks are detected with an unpredictable delay.
 // (resp. low peak) is reached/detected, since you can't know it isn't a
 // local minima (resp. maxima) until then.
 // This also means the peaks are detected with an unpredictable delay.

-// This algorithm can't therefore be used directly for realtime peak detections,
+// This algorithm therefore can't be used directly for realtime peak detections,

 // but it can be used as a simple envelope follower.
 module min_max_tracker(input clk, input [7:0] adc_d, input [7:0] threshold,
        output [7:0] min, output [7:0] max);
 // but it can be used as a simple envelope follower.
 module min_max_tracker(input clk, input [7:0] adc_d, input [7:0] threshold,
        output [7:0] min, output [7:0] max);


@@ -25,7 +25,7 @@ module min_max_tracker(input clk, input [7:0] adc_d, input [7:0] threshold,
        always @(posedge clk)
        begin
                case (state)
        always @(posedge clk)
        begin
                case (state)

-               0:
+               0: // initialize

                        begin
                                if (cur_max_val >= ({1'b0, adc_d} + threshold))
                                        state <= 2;
                        begin
                                if (cur_max_val >= ({1'b0, adc_d} + threshold))
                                        state <= 2;


@@ -36,7 +36,7 @@ module min_max_tracker(input clk, input [7:0] adc_d, input [7:0] threshold,
                                else if (adc_d <= cur_min_val)
                                        cur_min_val <= adc_d;                                   
                        end
                                else if (adc_d <= cur_min_val)
                                        cur_min_val <= adc_d;                                   
                        end

-               1:
+               1: // high phase

                        begin
                                if (cur_max_val <= adc_d)
                                        cur_max_val <= adc_d;
                        begin
                                if (cur_max_val <= adc_d)
                                        cur_max_val <= adc_d;


@@ -46,7 +46,7 @@ module min_max_tracker(input clk, input [7:0] adc_d, input [7:0] threshold,
                                        max_val <= cur_max_val;
                                end
                        end
                                        max_val <= cur_max_val;
                                end
                        end

-               2:
+               2: // low phase

                        begin
                                if (adc_d <= cur_min_val)
                                        cur_min_val <= adc_d;                                   
                        begin
                                if (adc_d <= cur_min_val)
                                        cur_min_val <= adc_d;