-reg ssp_clk;
-reg ssp_frame;
-
-reg fc_div_2;
-always @(posedge ck_1356meg)
- fc_div_2 = ~fc_div_2;
-
-reg fc_div_4;
-always @(posedge fc_div_2)
- fc_div_4 = ~fc_div_4;
-
-reg fc_div_8;
-always @(posedge fc_div_4)
- fc_div_8 = ~fc_div_8;
-
-reg adc_clk;
-
-always @(xcorr_is_848 or xcorr_quarter_freq or ck_1356meg)
- if(~xcorr_quarter_freq)
- begin
- if(xcorr_is_848)
- // The subcarrier frequency is fc/16; we will sample at fc, so that
- // means the subcarrier is 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 ...
- adc_clk <= ck_1356meg;
- else
- // The subcarrier frequency is fc/32; we will sample at fc/2, and
- // the subcarrier will look identical.
- adc_clk <= fc_div_2;
- end
- else
- begin
- if(xcorr_is_848)
- // The subcarrier frequency is fc/64
- adc_clk <= fc_div_4;
- else
- // The subcarrier frequency is fc/128
- adc_clk <= fc_div_8;
- end
-
+reg [2:0] fc_div;
+always @(negedge ck_1356megb)
+ fc_div <= fc_div + 1;
+
+(* clock_signal = "yes" *) reg adc_clk; // sample frequency, always 16 * fc
+always @(ck_1356megb, xcorr_is_848, xcorr_quarter_freq, fc_div)
+ if (xcorr_is_848 & ~xcorr_quarter_freq) // fc = 847.5 kHz, standard ISO14443B
+ adc_clk <= ck_1356megb;
+ else if (~xcorr_is_848 & ~xcorr_quarter_freq) // fc = 423.75 kHz
+ adc_clk <= fc_div[0];
+ else if (xcorr_is_848 & xcorr_quarter_freq) // fc = 211.875 kHz
+ adc_clk <= fc_div[1];
+ else // fc = 105.9375 kHz
+ adc_clk <= fc_div[2];
+