-#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0)
-#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0)
-#define FPGA_HF_SIMULATOR_MODULATE_212K (2<<0)
-#define FPGA_HF_SIMULATOR_MODULATE_424K (4<<0)
-#define FPGA_HF_SIMULATOR_MODULATE_424K_8BIT 0x5//101
+#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0) // 0000
+#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0) // 0001
+#define FPGA_HF_SIMULATOR_MODULATE_212K (2<<0) // 0010
+#define FPGA_HF_SIMULATOR_MODULATE_424K (4<<0) // 0100
+#define FPGA_HF_SIMULATOR_MODULATE_424K_8BIT 0x5 // 0101