syntax sugar

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 16e55573951c7bd538048cd62f0dc7d6f135d649..3c69770e3bd69dcf39e2550bf98d3f381865274c 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -43,7 +43,7 @@ void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t periods, uint3
        uint16_t period_0 =  periods >> 16;
        uint16_t period_1 =  periods & 0xFFFF;
        
        uint16_t period_0 =  periods >> 16;
        uint16_t period_1 =  periods & 0xFFFF;
        

-       // 95 == 125 KHz  88 == 124.8 KHz
+       // 95 == 125 KHz  88 == 134.8 KHz

        int divisor_used = (useHighFreq) ? 88 : 95;
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
        int divisor_used = (useHighFreq) ? 88 : 95;
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);


@@ -78,6 +78,8 @@ void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t periods, uint3
 
        // now do the read
        DoAcquisition_config(false);
 
        // now do the read
        DoAcquisition_config(false);

+       
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

 }
 
 /* blank r/w tag data stream
 }
 
 /* blank r/w tag data stream


@@ -400,6 +402,17 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
        //FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
        //FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE );
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
        //FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
        //FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE );

+
+       // set frequency,  get values from 'lf config' command
+       sample_config *sc = getSamplingConfig();
+
+       if ( (sc->divisor == 1) || (sc->divisor < 0) || (sc->divisor > 255) )
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
+       else if (sc->divisor == 0)
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       else
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc->divisor);
+       

        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;


@@ -786,7 +799,7 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
 
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
 

-               DoAcquisition_default(-1,true);
+               DoAcquisition_default(0, true);

                // FSK demodulator
                size = 50*128*2; //big enough to catch 2 sequences of largest format
                idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
                // FSK demodulator
                size = 50*128*2; //big enough to catch 2 sequences of largest format
                idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);


@@ -854,14 +867,13 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
                                if (ledcontrol) LED_A_OFF();
                                *high = hi;
                                *low = lo;
                                if (ledcontrol) LED_A_OFF();
                                *high = hi;
                                *low = lo;

-                               goto OUT;
+                               break;

                        }
                        // reset
                }
                hi2 = hi = lo = idx = 0;
                WDT_HIT();
        }
                        }
                        // reset
                }
                hi2 = hi = lo = idx = 0;
                WDT_HIT();
        }

-OUT:   

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();


@@ -960,12 +972,12 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
                                        break;          
                        }
                        if (findone)
                                        break;          
                        }
                        if (findone)

-                               goto OUT;
+                               break;

 
                idx = 0;
                WDT_HIT();
        }
 
                idx = 0;
                WDT_HIT();
        }

-OUT:   
+

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); 
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); 
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();


@@ -1021,13 +1033,14 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
                                if (ledcontrol) LED_A_OFF();
                                *high=lo>>32;
                                *low=lo & 0xFFFFFFFF;
                                if (ledcontrol) LED_A_OFF();
                                *high=lo>>32;
                                *low=lo & 0xFFFFFFFF;

-                               return;
+                               break;

                        }
                }
                WDT_HIT();
                hi = lo = size = idx = 0;
                clk = invert = errCnt = 0;
        }
                        }
                }
                WDT_HIT();
                hi = lo = size = idx = 0;
                clk = invert = errCnt = 0;
        }

+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);         

        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
 }
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
 }


@@ -1106,7 +1119,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
                                if (ledcontrol) LED_A_OFF();
                                *high=code;
                                *low=code2;
                                if (ledcontrol) LED_A_OFF();
                                *high=code;
                                *low=code2;

-                               goto out;
+                               break;

                        }
                        code=code2=0;
                        version=facilitycode=0;
                        }
                        code=code2=0;
                        version=facilitycode=0;


@@ -1115,7 +1128,6 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 
                WDT_HIT();
        }
 
                WDT_HIT();
        }

-OUT:   

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);         
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);         
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();


@@ -1273,7 +1285,7 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
 
        // Set up FPGA, 125kHz to power up the tag
        LFSetupFPGAForADC(95, true);
 
        // Set up FPGA, 125kHz to power up the tag
        LFSetupFPGAForADC(95, true);

-       SpinDelay(3);
+       //SpinDelay(3);

        
        // Trigger T55x7 Direct Access Mode with start gap
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        
        // Trigger T55x7 Direct Access Mode with start gap
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);


@@ -1300,7 +1312,7 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
        TurnReadLFOn(READ_GAP);
        
        // Acquisition
        TurnReadLFOn(READ_GAP);
        
        // Acquisition

-       doT55x7Acquisition(12000);
+       doT55x7Acquisition(7679);

        
        // Turn the field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        
        // Turn the field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off


@@ -1359,7 +1371,7 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) {
                data[4] = manchesterEncode2Bytes(hi & 0xFFFF);
                data[5] = manchesterEncode2Bytes(lo >> 16);
                data[6] = manchesterEncode2Bytes(lo & 0xFFFF);
                data[4] = manchesterEncode2Bytes(hi & 0xFFFF);
                data[5] = manchesterEncode2Bytes(lo >> 16);
                data[6] = manchesterEncode2Bytes(lo & 0xFFFF);

-       }       else {
+       } else {

                // Ensure no more than 44 bits supplied
                if (hi > 0xFFF) {
                        DbpString("Tags can only have 44 bits.");
                // Ensure no more than 44 bits supplied
                if (hi > 0xFFF) {
                        DbpString("Tags can only have 44 bits.");


@@ -1379,13 +1391,8 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) {
        // data[0] = (((50-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | last_block << T5555_MAXBLOCK_SHIFT;
 
        LED_D_ON();
        // data[0] = (((50-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | last_block << T5555_MAXBLOCK_SHIFT;
 
        LED_D_ON();

-       // Program the data blocks for supplied ID
-       // and the block 0 for HID format

        WriteT55xx(data, 0, last_block+1);
        WriteT55xx(data, 0, last_block+1);

-

        LED_D_OFF();
        LED_D_OFF();

-
-       DbpString("DONE!");

 }
 
 void CopyIOtoT55x7(uint32_t hi, uint32_t lo) {
 }
 
 void CopyIOtoT55x7(uint32_t hi, uint32_t lo) {


@@ -1399,7 +1406,6 @@ void CopyIOtoT55x7(uint32_t hi, uint32_t lo) {
        // and the block 0 config
        WriteT55xx(data, 0, 3);
        LED_D_OFF();
        // and the block 0 config
        WriteT55xx(data, 0, 3);
        LED_D_OFF();

-       DbpString("DONE!");

 }
 
 // Clone Indala 64-bit tag by UID to T55x7
 }
 
 // Clone Indala 64-bit tag by UID to T55x7


@@ -1413,7 +1419,6 @@ void CopyIndala64toT55x7(uint32_t hi, uint32_t lo) {
        WriteT55xx(data, 0, 3);
        //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
        //      T5567WriteBlock(0x603E1042,0);
        WriteT55xx(data, 0, 3);
        //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
        //      T5567WriteBlock(0x603E1042,0);

-       DbpString("DONE!");

 }
 // Clone Indala 224-bit tag by UID to T55x7
 void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t uid4, uint32_t uid5, uint32_t uid6, uint32_t uid7) {
 }
 // Clone Indala 224-bit tag by UID to T55x7
 void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t uid4, uint32_t uid5, uint32_t uid6, uint32_t uid7) {


@@ -1427,7 +1432,6 @@ void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t
        WriteT55xx(data, 0, 8);
        //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
        //      T5567WriteBlock(0x603E10E2,0);
        WriteT55xx(data, 0, 8);
        //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
        //      T5567WriteBlock(0x603E10E2,0);

-       DbpString("DONE!");

 }
 // clone viking tag to T55xx
 void CopyVikingtoT55xx(uint32_t block1, uint32_t block2, uint8_t Q5) {
 }
 // clone viking tag to T55xx
 void CopyVikingtoT55xx(uint32_t block1, uint32_t block2, uint8_t Q5) {


@@ -1735,3 +1739,63 @@ void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        LED_D_OFF();
 }
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        LED_D_OFF();
 }

+
+/*
+Reading a COTAG.
+
+COTAG needs the reader to send a startsequence and the card has an extreme slow datarate.
+because of this, we can "sample" the data signal but we interpreate it to Manchester direct.
+
+READER START SEQUENCE:
+burst 800 us,    gap   2.2 msecs
+burst 3.6 msecs  gap   2.2 msecs
+burst 800 us     gap   2.2 msecs
+pulse 3.6 msecs
+
+This triggers a COTAG tag to response
+*/
+void Cotag(uint32_t arg0) {
+
+#define OFF    { FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); WaitUS(2035); }
+#define ON(x)   { FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD); WaitUS((x)); }
+
+       uint8_t rawsignal = arg0 & 0xF;
+
+       LED_A_ON();     
+
+       // Switching to LF image on FPGA. This might empty BigBuff
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+       
+       //clear buffer now so it does not interfere with timing later
+       BigBuf_Clear_ext(false);
+       
+       // Set up FPGA, 132kHz to power up the tag      
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 89);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+       // Connect the A/D to the peak-detected low-frequency path.
+       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+       
+       // Now set up the SSC to get the ADC samples that are now streaming at us.
+       FpgaSetupSsc();
+
+       // start clock - 1.5ticks is 1us
+       StartTicks();
+       
+       //send COTAG start pulse
+       ON(740)  OFF
+       ON(3330) OFF
+       ON(740)  OFF
+       ON(1000)
+
+       switch(rawsignal) {
+               case 0: doCotagAcquisition(50000); break;
+               case 1: doCotagAcquisitionManchester(); break;
+               case 2: DoAcquisition_config(TRUE); break;
+       }
+       
+       // Turn the field off
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       cmd_send(CMD_ACK,0,0,0,0,0);    
+       LED_A_OFF();
+}