// Set up FPGA, 125kHz
LFSetupFPGAForADC(95, true);
-
+
// force 1st mod pulse (start gap must be longer for 4305)
fwd_bit_sz--; //prepare next bit modulation
fwd_write_ptr++;
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
- SpinDelayUs(56*8); //55 cycles off (8us each)for 4305
+ SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
SpinDelayUs(16*8); //16 cycles on (8us each)
SendForward(fwd_bit_count);
// Now do the acquisition
- DoAcquisition_config(TRUE);
+ DoAcquisition_default(0,TRUE);
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
LED_A_OFF();
SendForward(fwd_bit_count);
//Wait for write to complete
- SpinDelay(20);
+ SpinDelay(10);
//Capture response if one exists
- DoAcquisition_config(TRUE);
+ DoAcquisition_default(20, TRUE);
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
LED_A_OFF();