- */\r
- if( (bootrom_unlocked || ((cmd_start >= prot_end) || (cmd_end < prot_start)))\r
- && (cmd_start >= allow_start) && (cmd_end <= allow_end) ) {\r
- start_addr = cmd_start;\r
- end_addr = cmd_end;\r
- } else {\r
- start_addr = end_addr = 0;\r
- dont_ack = 1;\r
- c->cmd = CMD_NACK;\r
- UsbSendPacket(packet, len);\r
- }\r
- }\r
- break;\r
- \r
- default:\r
- Fatal();\r
- break;\r
- }\r
-\r
- if(!dont_ack) {\r
- c->cmd = CMD_ACK;\r
- UsbSendPacket(packet, len);\r
- }\r
-}\r
-\r
-static void flash_mode(int externally_entered)\r
-{\r
- start_addr = 0;\r
- end_addr = 0;\r
- bootrom_unlocked = 0;\r
- \r
- UsbStart();\r
- for(;;) {\r
- WDT_HIT();\r
- \r
- UsbPoll(TRUE);\r
- \r
- if(!externally_entered && !BUTTON_PRESS()) {\r
- /* Perform a reset to leave flash mode */\r
- USB_D_PLUS_PULLUP_OFF();\r
- LED_B_ON();\r
- RSTC_CONTROL = RST_CONTROL_KEY | RST_CONTROL_PROCESSOR_RESET;\r
- for(;;);\r
- }\r
- if(externally_entered && BUTTON_PRESS()) {\r
- /* Let the user's button press override the automatic leave */\r
- externally_entered = 0;\r
- }\r
- }\r
-}\r
-\r
-extern char _osimage_entry;\r
-void BootROM(void)\r
-{\r
- //------------\r
- // First set up all the I/O pins; GPIOs configured directly, other ones\r
- // just need to be assigned to the appropriate peripheral.\r
-\r
- // Kill all the pullups, especially the one on USB D+; leave them for\r
- // the unused pins, though.\r
- PIO_NO_PULL_UP_ENABLE = (1 << GPIO_USB_PU) |\r
- (1 << GPIO_LED_A) |\r
- (1 << GPIO_LED_B) |\r
- (1 << GPIO_LED_C) |\r
- (1 << GPIO_LED_D) |\r
- (1 << GPIO_FPGA_DIN) |\r
- (1 << GPIO_FPGA_DOUT) |\r
- (1 << GPIO_FPGA_CCLK) |\r
- (1 << GPIO_FPGA_NINIT) |\r
- (1 << GPIO_FPGA_NPROGRAM) |\r
- (1 << GPIO_FPGA_DONE) |\r
- (1 << GPIO_MUXSEL_HIPKD) |\r
- (1 << GPIO_MUXSEL_HIRAW) |\r
- (1 << GPIO_MUXSEL_LOPKD) |\r
- (1 << GPIO_MUXSEL_LORAW) |\r
- (1 << GPIO_RELAY) |\r
- (1 << GPIO_NVDD_ON);\r
- // (and add GPIO_FPGA_ON)\r
- // These pins are outputs\r
- PIO_OUTPUT_ENABLE = (1 << GPIO_LED_A) |\r
- (1 << GPIO_LED_B) |\r
- (1 << GPIO_LED_C) |\r
- (1 << GPIO_LED_D) |\r
- (1 << GPIO_RELAY) |\r
- (1 << GPIO_NVDD_ON);\r
- // PIO controls the following pins\r
- PIO_ENABLE = (1 << GPIO_USB_PU) |\r
- (1 << GPIO_LED_A) |\r
- (1 << GPIO_LED_B) |\r
- (1 << GPIO_LED_C) |\r
- (1 << GPIO_LED_D);\r
-\r
- USB_D_PLUS_PULLUP_OFF();\r
- LED_D_OFF();\r
- LED_C_ON();\r
- LED_B_OFF();\r
- LED_A_OFF();\r
- \r
- // if 512K FLASH part - TODO make some defines :)\r
- if ((DBGU_CIDR | 0xf00) == 0xa00) {\r
- MC_FLASH_MODE0 = MC_FLASH_MODE_FLASH_WAIT_STATES(1) |\r
- MC_FLASH_MODE_MASTER_CLK_IN_MHZ(0x48);\r
- MC_FLASH_MODE1 = MC_FLASH_MODE_FLASH_WAIT_STATES(1) |\r
- MC_FLASH_MODE_MASTER_CLK_IN_MHZ(0x48);\r
- } else {\r
- MC_FLASH_MODE0 = MC_FLASH_MODE_FLASH_WAIT_STATES(0) |\r
- MC_FLASH_MODE_MASTER_CLK_IN_MHZ(48);\r
- }\r
- \r
- // Initialize all system clocks\r
- ConfigClocks();\r
- \r
- LED_A_ON();\r
- \r
- int common_area_present = 0;\r
- switch(RSTC_STATUS & RST_STATUS_TYPE_MASK) {\r
- case RST_STATUS_TYPE_WATCHDOG:\r
- case RST_STATUS_TYPE_SOFTWARE:\r
- case RST_STATUS_TYPE_USER:\r
- /* In these cases the common_area in RAM should be ok, retain it if it's there */\r
- if(common_area.magic == COMMON_AREA_MAGIC && common_area.version == 1) {\r
- common_area_present = 1;\r
- }\r
- break;\r
- default: /* Otherwise, initialize it from scratch */\r
- break;\r
- }\r
- \r
- if(!common_area_present){\r
- /* Common area not ok, initialize it */\r
- int i; for(i=0; i<sizeof(common_area); i++) { /* Makeshift memset, no need to drag util.c into this */\r
- ((char*)&common_area)[i] = 0;\r
- }\r
- common_area.magic = COMMON_AREA_MAGIC;\r
- common_area.version = 1;\r
- common_area.flags.bootrom_present = 1;\r
- }\r
- \r
- common_area.flags.bootrom_present = 1;\r
- if(common_area.command == COMMON_AREA_COMMAND_ENTER_FLASH_MODE) {\r
- common_area.command = COMMON_AREA_COMMAND_NONE;\r
- flash_mode(1);\r
- } else if(BUTTON_PRESS()) {\r
- flash_mode(0);\r
- } else {\r
- // jump to Flash address of the osimage entry point (LSBit set for thumb mode)\r
- asm("bx %0\n" : : "r" ( ((int)&_osimage_entry) | 0x1 ) );\r
- }\r
-}\r
+ */
+ if( (bootrom_unlocked || ((cmd_start >= prot_end) || (cmd_end < prot_start)))
+ && (cmd_start >= allow_start) && (cmd_end <= allow_end) ) {
+ start_addr = cmd_start;
+ end_addr = cmd_end;
+ } else {
+ start_addr = end_addr = 0;
+ dont_ack = 1;
+ c->cmd = CMD_NACK;
+ UsbSendPacket(packet, len);
+ }
+ }
+ break;
+
+ default:
+ Fatal();
+ break;
+ }
+
+ if(!dont_ack) {
+ c->cmd = CMD_ACK;
+ UsbSendPacket(packet, len);
+ }
+}
+
+static void flash_mode(int externally_entered)
+{
+ start_addr = 0;
+ end_addr = 0;
+ bootrom_unlocked = 0;
+
+ UsbStart();
+ for(;;) {
+ WDT_HIT();
+
+ UsbPoll(TRUE);
+
+ if(!externally_entered && !BUTTON_PRESS()) {
+ /* Perform a reset to leave flash mode */
+ USB_D_PLUS_PULLUP_OFF();
+ LED_B_ON();
+ AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;
+ for(;;);
+ }
+ if(externally_entered && BUTTON_PRESS()) {
+ /* Let the user's button press override the automatic leave */
+ externally_entered = 0;
+ }
+ }
+}
+
+extern char _osimage_entry;
+void BootROM(void)
+{
+ //------------
+ // First set up all the I/O pins; GPIOs configured directly, other ones
+ // just need to be assigned to the appropriate peripheral.
+
+ // Kill all the pullups, especially the one on USB D+; leave them for
+ // the unused pins, though.
+ AT91C_BASE_PIOA->PIO_PPUDR =
+ GPIO_USB_PU |
+ GPIO_LED_A |
+ GPIO_LED_B |
+ GPIO_LED_C |
+ GPIO_LED_D |
+ GPIO_FPGA_DIN |
+ GPIO_FPGA_DOUT |
+ GPIO_FPGA_CCLK |
+ GPIO_FPGA_NINIT |
+ GPIO_FPGA_NPROGRAM |
+ GPIO_FPGA_DONE |
+ GPIO_MUXSEL_HIPKD |
+ GPIO_MUXSEL_HIRAW |
+ GPIO_MUXSEL_LOPKD |
+ GPIO_MUXSEL_LORAW |
+ GPIO_RELAY |
+ GPIO_NVDD_ON;
+ // (and add GPIO_FPGA_ON)
+ // These pins are outputs
+ AT91C_BASE_PIOA->PIO_OER =
+ GPIO_LED_A |
+ GPIO_LED_B |
+ GPIO_LED_C |
+ GPIO_LED_D |
+ GPIO_RELAY |
+ GPIO_NVDD_ON;
+ // PIO controls the following pins
+ AT91C_BASE_PIOA->PIO_PER =
+ GPIO_USB_PU |
+ GPIO_LED_A |
+ GPIO_LED_B |
+ GPIO_LED_C |
+ GPIO_LED_D;
+
+ USB_D_PLUS_PULLUP_OFF();
+ LED_D_OFF();
+ LED_C_ON();
+ LED_B_OFF();
+ LED_A_OFF();
+
+ AT91C_BASE_EFC0->EFC_FMR =
+ AT91C_MC_FWS_1FWS |
+ MC_FLASH_MODE_MASTER_CLK_IN_MHZ(48);
+
+ // Initialize all system clocks
+ ConfigClocks();
+
+ LED_A_ON();
+
+ int common_area_present = 0;
+ switch(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_RSTTYP) {
+ case AT91C_RSTC_RSTTYP_WATCHDOG:
+ case AT91C_RSTC_RSTTYP_SOFTWARE:
+ case AT91C_RSTC_RSTTYP_USER:
+ /* In these cases the common_area in RAM should be ok, retain it if it's there */
+ if(common_area.magic == COMMON_AREA_MAGIC && common_area.version == 1) {
+ common_area_present = 1;
+ }
+ break;
+ default: /* Otherwise, initialize it from scratch */
+ break;
+ }
+
+ if(!common_area_present){
+ /* Common area not ok, initialize it */
+ int i; for(i=0; i<sizeof(common_area); i++) { /* Makeshift memset, no need to drag util.c into this */
+ ((char*)&common_area)[i] = 0;
+ }
+ common_area.magic = COMMON_AREA_MAGIC;
+ common_area.version = 1;
+ common_area.flags.bootrom_present = 1;
+ }
+
+ common_area.flags.bootrom_present = 1;
+ if(common_area.command == COMMON_AREA_COMMAND_ENTER_FLASH_MODE) {
+ common_area.command = COMMON_AREA_COMMAND_NONE;
+ flash_mode(1);
+ } else if(BUTTON_PRESS()) {
+ flash_mode(0);
+ } else if(*(uint32_t*)&_osimage_entry == 0xffffffffU) {
+ flash_mode(1);
+ } else {
+ // jump to Flash address of the osimage entry point (LSBit set for thumb mode)
+ __asm("bx %0\n" : : "r" ( ((int)&_osimage_entry) | 0x1 ) );
+ }
+}
projects / proxmark3-svn / blobdiff