// is the order in which they go out on the wire.
//=============================================================================
-uint8_t ToSend[512];
+#define TOSEND_BUFFER_SIZE (9*MAX_FRAME_SIZE + 1 + 1 + 2) // 8 data bits and 1 parity bit per payload byte, 1 correction bit, 1 SOC bit, 2 EOC bits
+uint8_t ToSend[TOSEND_BUFFER_SIZE];
int ToSendMax;
static int ToSendBit;
struct common_area common_area __attribute__((section(".commonarea")));
ToSendBit++;
- if(ToSendBit >= sizeof(ToSend)) {
+ if(ToSendMax >= sizeof(ToSend)) {
ToSendBit = 0;
DbpString("ToSendStuffBit overflowed!");
}
void MeasureAntennaTuning(void)
{
- uint8_t *dest = (uint8_t *)BigBuf+FREE_BUFFER_OFFSET;
+ uint8_t LF_Results[256];
int i, adcval = 0, peak = 0, peakv = 0, peakf = 0; //ptr = 0
int vLf125 = 0, vLf134 = 0, vHf = 0; // in mV
-// UsbCommand c;
-
- LED_B_ON();
- DbpString("Measuring antenna characteristics, please wait...");
- memset(dest,0,sizeof(FREE_BUFFER_SIZE));
+ LED_B_ON();
/*
* Sweeps the useful LF range of the proxmark from
* ( hopefully around 95 if it is tuned to 125kHz!)
*/
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
- for (i=255; i>19; i--) {
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+ for (i=255; i>=19; i--) {
WDT_HIT();
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i);
SpinDelay(20);
if (i==95) vLf125 = adcval; // voltage at 125Khz
if (i==89) vLf134 = adcval; // voltage at 134Khz
- dest[i] = adcval>>8; // scale int to fit in byte for graphing purposes
- if(dest[i] > peak) {
+ LF_Results[i] = adcval>>8; // scale int to fit in byte for graphing purposes
+ if(LF_Results[i] > peak) {
peakv = adcval;
- peak = dest[i];
+ peak = LF_Results[i];
peakf = i;
//ptr = i;
}
}
- LED_A_ON();
+ for (i=18; i >= 0; i--) LF_Results[i] = 0;
+
+ LED_A_ON();
// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
SpinDelay(20);
// Vref = 3300mV, and an 10:1 voltage divider on the input
// can measure voltages up to 33000 mV
vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
-// c.cmd = CMD_MEASURED_ANTENNA_TUNING;
-// c.arg[0] = (vLf125 << 0) | (vLf134 << 16);
-// c.arg[1] = vHf;
-// c.arg[2] = peakf | (peakv << 16);
-
- DbpString("Measuring complete, sending report back to host");
- cmd_send(CMD_MEASURED_ANTENNA_TUNING,vLf125|(vLf134<<16),vHf,peakf|(peakv<<16),0,0);
-// UsbSendPacket((uint8_t *)&c, sizeof(c));
+ cmd_send(CMD_MEASURED_ANTENNA_TUNING,vLf125|(vLf134<<16),vHf,peakf|(peakv<<16),LF_Results,256);
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
- LED_A_OFF();
- LED_B_OFF();
- return;
+ LED_A_OFF();
+ LED_B_OFF();
+ return;
}
void MeasureAntennaTuningHf(void)
for (;;) {
// Let the FPGA drive the high-frequency antenna around 13.56 MHz.
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
SpinDelay(20);
// Vref = 3300mV, and an 10:1 voltage divider on the input
// We're using this mode just so that I can test it out; the simulated
// tag mode would work just as well and be simpler.
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ | FPGA_HF_READER_RX_XCORR_SNOOP);
// We need to listen to the high-frequency, peak-detected path.
void SamyRun()
{
DbpString("Stand-alone mode! No PC necessary.");
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
// 3 possible options? no just 2 for now
#define OPTS 2
case CMD_MOD_THEN_ACQUIRE_RAW_ADC_SAMPLES_125K:
ModThenAcquireRawAdcSamples125k(c->arg[0],c->arg[1],c->arg[2],c->d.asBytes);
break;
+ case CMD_LF_SNOOP_RAW_ADC_SAMPLES:
+ SnoopLFRawAdcSamples(c->arg[0], c->arg[1]);
+ cmd_send(CMD_ACK,0,0,0,0,0);
+ break;
case CMD_HID_DEMOD_FSK:
- CmdHIDdemodFSK(0, 0, 0, 1); // Demodulate HID tag
+ CmdHIDdemodFSK(c->arg[0], 0, 0, 1); // Demodulate HID tag
break;
case CMD_HID_SIM_TAG:
CmdHIDsimTAG(c->arg[0], c->arg[1], 1); // Simulate HID tag by ID
CopyHIDtoT55x7(c->arg[0], c->arg[1], c->arg[2], c->d.asBytes[0]);
break;
case CMD_IO_DEMOD_FSK:
- CmdIOdemodFSK(1, 0, 0, 1); // Demodulate IO tag
+ CmdIOdemodFSK(c->arg[0], 0, 0, 1); // Demodulate IO tag
break;
case CMD_IO_CLONE_TAG: // Clone IO tag by ID to T55x7
CopyIOtoT55x7(c->arg[0], c->arg[1], c->d.asBytes[0]);
break;
+ case CMD_EM410X_DEMOD:
+ CmdEM410xdemod(c->arg[0], 0, 0, 1);
+ break;
case CMD_EM410X_WRITE_TAG:
WriteEM410x(c->arg[0], c->arg[1], c->arg[2]);
break;
case CMD_READER_ICLASS:
ReaderIClass(c->arg[0]);
break;
+ case CMD_READER_ICLASS_REPLAY:
+ ReaderIClass_Replay(c->arg[0], c->d.asBytes);
+ break;
#endif
case CMD_SIMULATE_TAG_HF_LISTEN:
break;
case CMD_SET_LF_DIVISOR:
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
FpgaSendCommand(FPGA_CMD_SET_DIVISOR, c->arg[0]);
break;
AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
// Load the FPGA image, which we have stored in our flash.
- FpgaDownloadAndGo();
+ // (the HF version by default)
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
StartTickCount();
projects / proxmark3-svn / blobdiff