Added script to dump ndef-compliant tags. Written in collaboration with @asper

[proxmark3-svn] / armsrc / fpgaloader.c

diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c
index 50a6521dcd9fda0302c073bfe1fea0704668b0a7..e3784bf5b4bade1a8b1d68e34868ada4c6c9660a 100644 (file)
--- a/armsrc/fpgaloader.c
+++ b/armsrc/fpgaloader.c
@@ -1,9 +1,14 @@
 //-----------------------------------------------------------------------------
 //-----------------------------------------------------------------------------

+// Jonathan Westhues, April 2006
+//
+// This code is licensed to you under the terms of the GNU GPL, version 2 or,
+// at your option, any later version. See the LICENSE.txt file for the text of
+// the license.
+//-----------------------------------------------------------------------------

 // Routines to load the FPGA image, and then to configure the FPGA's major
 // mode once it is configured.
 // Routines to load the FPGA image, and then to configure the FPGA's major
 // mode once it is configured.

-//
-// Jonathan Westhues, April 2006

 //-----------------------------------------------------------------------------
 //-----------------------------------------------------------------------------

+

 #include "proxmark3.h"
 #include "apps.h"
 #include "util.h"
 #include "proxmark3.h"
 #include "apps.h"
 #include "util.h"


@@ -111,13 +116,11 @@ void FpgaSetupSsc(void)
 
        // 8 bits per transfer, no loopback, MSB first, 1 transfer per sync
        // pulse, no output sync, start on positive-going edge of sync
 
        // 8 bits per transfer, no loopback, MSB first, 1 transfer per sync
        // pulse, no output sync, start on positive-going edge of sync

-       AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(8) |
-               AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0);
+       AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(8) |     AT91C_SSC_MSBF | SSC_FRAME_MODE_WORDS_PER_TRANSFER(0);

 
        // clock comes from TK pin, no clock output, outputs change on falling
        // edge of TK, start on rising edge of TF
 
        // clock comes from TK pin, no clock output, outputs change on falling
        // edge of TK, start on rising edge of TF

-       AT91C_BASE_SSC->SSC_TCMR = SSC_CLOCK_MODE_SELECT(2) |
-               SSC_CLOCK_MODE_START(5);
+       AT91C_BASE_SSC->SSC_TCMR = SSC_CLOCK_MODE_SELECT(2) |   SSC_CLOCK_MODE_START(5);

 
        // tx framing is the same as the rx framing
        AT91C_BASE_SSC->SSC_TFMR = AT91C_BASE_SSC->SSC_RFMR;
 
        // tx framing is the same as the rx framing
        AT91C_BASE_SSC->SSC_TFMR = AT91C_BASE_SSC->SSC_RFMR;


@@ -131,13 +134,20 @@ void FpgaSetupSsc(void)
 // ourselves, not to another buffer). The stuff to manipulate those buffers
 // is in apps.h, because it should be inlined, for speed.
 //-----------------------------------------------------------------------------
 // ourselves, not to another buffer). The stuff to manipulate those buffers
 // is in apps.h, because it should be inlined, for speed.
 //-----------------------------------------------------------------------------

-void FpgaSetupSscDma(uint8_t *buf, int len)
+bool FpgaSetupSscDma(uint8_t *buf, int len)

 {
 {

+       if (buf == NULL) {
+        return false;
+    }
+
+       AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;

        AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) buf;
        AT91C_BASE_PDC_SSC->PDC_RCR = len;
        AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) buf;
        AT91C_BASE_PDC_SSC->PDC_RNCR = len;
        AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;
        AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) buf;
        AT91C_BASE_PDC_SSC->PDC_RCR = len;
        AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) buf;
        AT91C_BASE_PDC_SSC->PDC_RNCR = len;
        AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;

+    
+    return true;

 }
 
 static void DownloadFPGA_byte(unsigned char w)
 }
 
 static void DownloadFPGA_byte(unsigned char w)