#include "util.h"
#include "string.h"
#include "apps.h"
-
-uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
-int traceLen = 0;
-int tracing = TRUE;
-
+#include "BigBuf.h"
void print_result(char *name, uint8_t *buf, size_t len) {
- uint8_t *p = buf;
+ uint8_t *p = buf;
- if ( len % 16 == 0 ) {
- for(; p-buf < len; p += 16)
- Dbprintf("[%s:%d/%d] %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
+ if ( len % 16 == 0 ) {
+ for(; p-buf < len; p += 16)
+ Dbprintf("[%s:%d/%d] %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
name,
p-buf,
len,
p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7],p[8], p[9], p[10], p[11], p[12], p[13], p[14], p[15]
- );
- }
- else {
- for(; p-buf < len; p += 8)
- Dbprintf("[%s:%d/%d] %02x %02x %02x %02x %02x %02x %02x %02x", name, p-buf, len, p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
- }
+ );
+ }
+ else {
+ for(; p-buf < len; p += 8)
+ Dbprintf("[%s:%d/%d] %02x %02x %02x %02x %02x %02x %02x %02x",
+ name,
+ p-buf,
+ len,
+ p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7]);
+ }
}
size_t nbytes(size_t nbits) {
- return (nbits/8)+((nbits%8)>0);
+ return (nbits >> 3)+((nbits % 8) > 0);
}
uint32_t SwapBits(uint32_t value, int nrbits) {
- int i;
uint32_t newvalue = 0;
- for(i = 0; i < nrbits; i++) {
+ for(int i = 0; i < nrbits; i++) {
newvalue ^= ((value >> i) & 1) << (nrbits - 1 - i);
}
return newvalue;
}
-void num_to_bytes(uint64_t n, size_t len, uint8_t* dest)
-{
+void num_to_bytes(uint64_t n, size_t len, uint8_t* dest) {
while (len--) {
dest[len] = (uint8_t) n;
n >>= 8;
}
}
-uint64_t bytes_to_num(uint8_t* src, size_t len)
-{
+uint64_t bytes_to_num(uint8_t* src, size_t len) {
uint64_t num = 0;
- while (len--)
- {
+ while (len--) {
num = (num << 8) | (*src);
src++;
}
}
// RotateLeft - Ultralight, Desfire
-void rol(uint8_t *data, const size_t len){
+void rol(uint8_t *data, const size_t len) {
uint8_t first = data[0];
for (size_t i = 0; i < len-1; i++) {
data[i] = data[i+1];
}
data[len-1] = first;
}
+
void lsl (uint8_t *data, size_t len) {
for (size_t n = 0; n < len - 1; n++) {
data[n] = (data[n] << 1) | (data[n+1] >> 7);
dst[0] = 0;
strncat(dst, prefix, len-1);
if(v->magic != VERSION_INFORMATION_MAGIC) {
- strncat(dst, "Missing/Invalid version information", len - strlen(dst) - 1);
+ strncat(dst, "Missing/Invalid version information\n", len - strlen(dst) - 1);
return;
}
if(v->versionversion != 1) {
- strncat(dst, "Version information not understood", len - strlen(dst) - 1);
+ strncat(dst, "Version information not understood\n", len - strlen(dst) - 1);
return;
}
if(!v->present) {
- strncat(dst, "Version information not available", len - strlen(dst) - 1);
+ strncat(dst, "Version information not available\n", len - strlen(dst) - 1);
return;
}
strncat(dst, " ", len - strlen(dst) - 1);
strncat(dst, v->buildtime, len - strlen(dst) - 1);
+ strncat(dst, "\n", len - strlen(dst) - 1);
}
// -------------------------------------------------------------------------
void StartTickCount()
{
-// must be 0x40, but on my cpu - included divider is optimal
-// 0x20 - 1 ms / bit
-// 0x40 - 2 ms / bit
-
- AT91C_BASE_RTTC->RTTC_RTMR = AT91C_RTTC_RTTRST + 0x001D; // was 0x003B
+ // This timer is based on the slow clock. The slow clock frequency is between 22kHz and 40kHz.
+ // We can determine the actual slow clock frequency by looking at the Main Clock Frequency Register.
+ uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & 0xffff; // = 16 * main clock frequency (16MHz) / slow clock frequency
+ // set RealTimeCounter divider to count at 1kHz:
+ AT91C_BASE_RTTC->RTTC_RTMR = AT91C_RTTC_RTTRST | ((256000 + (mainf/2)) / mainf);
+ // note: worst case precision is approx 2.5%
}
/*
// fast clock
AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; // timer disable
AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK | // MCK(48MHz)/32 -- tick=1.5mks
- AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO | AT91C_TC_ACPA_CLEAR |
- AT91C_TC_ACPC_SET | AT91C_TC_ASWTRG_SET;
+ AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO | AT91C_TC_ACPA_CLEAR |
+ AT91C_TC_ACPC_SET | AT91C_TC_ASWTRG_SET;
AT91C_BASE_TC0->TC_RA = 1;
AT91C_BASE_TC0->TC_RC = 0xBFFF + 1; // 0xC000
}
uint32_t RAMFUNC GetCountUS(){
- return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
+ //return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
+ // By suggestion from PwPiwi, http://www.proxmark.org/forum/viewtopic.php?pid=17548#p17548
+ //return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV * 2) / 3);
+ return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV << 1) / 3);
}
-static uint32_t GlobalUsCounter = 0;
+// static uint32_t GlobalUsCounter = 0;
-uint32_t RAMFUNC GetDeltaCountUS(){
- uint32_t g_cnt = GetCountUS();
- uint32_t g_res = g_cnt - GlobalUsCounter;
- GlobalUsCounter = g_cnt;
- return g_res;
-}
+// uint32_t RAMFUNC GetDeltaCountUS(){
+ // uint32_t g_cnt = GetCountUS();
+ // uint32_t g_res = g_cnt - GlobalUsCounter;
+ // GlobalUsCounter = g_cnt;
+ // return g_res;
+// }
// -------------------------------------------------------------------------
AT91C_BASE_TC2->TC_CMR = AT91C_TC_CLKS_XC2 // TC2 clock = XC2 clock = TIOA0
| AT91C_TC_WAVE // Waveform Mode
| AT91C_TC_WAVESEL_UP; // just count
-
+
AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN; // enable TC0
AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN; // enable TC1
AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKEN; // enable TC2
- //
- // synchronize the counter with the ssp_frame signal. Note: FPGA must be in any iso14446 mode, otherwise the frame signal would not be present
- //
+ // synchronize the counter with the ssp_frame signal.
+ // Note: FPGA must be in any iso14443 mode, otherwise the frame signal would not be present
while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_FRAME)); // wait for ssp_frame to go high (start of frame)
while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_FRAME); // wait for ssp_frame to be low
while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)); // wait for ssp_clk to go high
+
// note: up to now two ssp_clk rising edges have passed since the rising edge of ssp_frame
// it is now safe to assert a sync signal. This sets all timers to 0 on next active clock edge
AT91C_BASE_TCB->TCB_BCR = 1; // assert Sync (set all timers to 0 on next active clock edge)
// at the next (4th) ssp_clk rising edge, TC0 (the low word of our counter) will be reset. From now on,
// whenever the last three bits of our counter go 0, we can be sure to be in the middle of a frame transfer.
// (just started with the transfer of the 4th Bit).
- // The high word of the counter (TC2) will not reset until the low word (TC0) overflows. Therefore need to wait quite some time before
- // we can use the counter.
+
+ // The high word of the counter (TC2) will not reset until the low word (TC0) overflows.
+ // Therefore need to wait quite some time before we can use the counter.
while (AT91C_BASE_TC0->TC_CV < 0xFFF0);
}
-
uint32_t RAMFUNC GetCountSspClk(){
- uint32_t tmp_count;
- tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
- if ((tmp_count & 0x0000ffff) == 0) { //small chance that we may have missed an increment in TC2
+ uint32_t tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
+ if ((tmp_count & 0x0000ffff) == 0) //small chance that we may have missed an increment in TC2
return (AT91C_BASE_TC2->TC_CV << 16);
- }
- else {
- return tmp_count;
- }
-}
-void iso14a_clear_trace() {
- clear_trace();
-}
-
-void iso14a_set_tracing(bool enable) {
- set_tracing(enable);
-}
-
-void clear_trace() {
- memset(trace, 0x44, TRACE_SIZE);
- traceLen = 0;
-}
-
-void set_tracing(bool enable) {
- tracing = enable;
-}
-
-/**
- This is a function to store traces. All protocols can use this generic tracer-function.
- The traces produced by calling this function can be fetched on the client-side
- by 'hf list raw', alternatively 'hf list <proto>' for protocol-specific
- annotation of commands/responses.
-
-**/
-bool RAMFUNC LogTrace(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag)
-{
- if (!tracing) return FALSE;
-
- uint16_t num_paritybytes = (iLen-1)/8 + 1; // number of valid paritybytes in *parity
- uint16_t duration = timestamp_end - timestamp_start;
-
- // Return when trace is full
- if (traceLen + sizeof(iLen) + sizeof(timestamp_start) + sizeof(duration) + num_paritybytes + iLen >= TRACE_SIZE) {
- tracing = FALSE; // don't trace any more
- return FALSE;
- }
- // Traceformat:
- // 32 bits timestamp (little endian)
- // 16 bits duration (little endian)
- // 16 bits data length (little endian, Highest Bit used as readerToTag flag)
- // y Bytes data
- // x Bytes parity (one byte per 8 bytes data)
-
- // timestamp (start)
- trace[traceLen++] = ((timestamp_start >> 0) & 0xff);
- trace[traceLen++] = ((timestamp_start >> 8) & 0xff);
- trace[traceLen++] = ((timestamp_start >> 16) & 0xff);
- trace[traceLen++] = ((timestamp_start >> 24) & 0xff);
-
- // duration
- trace[traceLen++] = ((duration >> 0) & 0xff);
- trace[traceLen++] = ((duration >> 8) & 0xff);
-
- // data length
- trace[traceLen++] = ((iLen >> 0) & 0xff);
- trace[traceLen++] = ((iLen >> 8) & 0xff);
-
- // readerToTag flag
- if (!readerToTag) {
- trace[traceLen - 1] |= 0x80;
- }
-
- // data bytes
- if (btBytes != NULL && iLen != 0) {
- memcpy(trace + traceLen, btBytes, iLen);
- }
- traceLen += iLen;
-
- // parity bytes
- if (parity != NULL && iLen != 0) {
- memcpy(trace + traceLen, parity, num_paritybytes);
- }
- traceLen += num_paritybytes;
-
- if(traceLen +4 < TRACE_SIZE)
- { //If it hadn't been cleared, for whatever reason..
- memset(trace+traceLen,0x44, 4);
- }
-
- return TRUE;
+ return tmp_count;
}