CHG: adding the HID wiegand calcs again. Still need to set the bit37 indicator...

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 15af6d6576f30dcdc3535685e613de0ae6b0735a..90b8d0b3689b8351920531a8ac3a69c4f2b3a3ee 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -8,135 +8,76 @@
 // Also routines for raw mode reading/simulating of LF waveform
 //-----------------------------------------------------------------------------
 
 // Also routines for raw mode reading/simulating of LF waveform
 //-----------------------------------------------------------------------------
 

-#include "../include/proxmark3.h"
+#include "proxmark3.h"

 #include "apps.h"
 #include "util.h"
 #include "apps.h"
 #include "util.h"

-#include "../include/hitag2.h"
-#include "../common/crc16.h"
+#include "hitag2.h"
+#include "crc16.h"

 #include "string.h"
 #include "string.h"

-#include "crapto1.h"
-#include "mifareutil.h"
-
-// Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK)
-// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
-// Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
-// T0 = TIMER_CLOCK1 / 125000 = 192
-#define T0 192
-
-#define SHORT_COIL()   LOW(GPIO_SSC_DOUT)
-#define OPEN_COIL()            HIGH(GPIO_SSC_DOUT)
-
-void LFSetupFPGAForADC(int divisor, bool lf_field)
+#include "lfdemod.h"
+#include "lfsampling.h"
+#include "protocols.h"
+#include "usb_cdc.h" // for usb_poll_validate_length
+
+#ifndef SHORT_COIL
+# define SHORT_COIL()  LOW(GPIO_SSC_DOUT)
+#endif
+#ifndef OPEN_COIL
+# define OPEN_COIL()   HIGH(GPIO_SSC_DOUT)
+#endif
+
+/**
+ * Function to do a modulation and then get samples.
+ * @param delay_off
+ * @param periods  0xFFFF0000 is period_0,  0x0000FFFF is period_1
+ * @param useHighFreg
+ * @param command
+ */
+void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t periods, uint32_t useHighFreq, uint8_t *command)

 {
 {

+       /* Make sure the tag is reset */

        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);

-       if ( (divisor == 1) || (divisor < 0) || (divisor > 255) )
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-       else if (divisor == 0)
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       else
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor);
-
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | (lf_field ? FPGA_LF_ADC_READER_FIELD : 0));
-
-       // Connect the A/D to the peak-detected low-frequency path.
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-       
-       // Give it a bit of time for the resonant antenna to settle.
-       SpinDelay(150);
-       
-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
-}
-
-void AcquireRawAdcSamples125k(int divisor)
-{
-       LFSetupFPGAForADC(divisor, true);
-       DoAcquisition125k();
-}
-
-void SnoopLFRawAdcSamples(int divisor, int trigger_threshold)
-{
-       LFSetupFPGAForADC(divisor, false);
-       DoAcquisition125k_threshold(trigger_threshold);
-}
-
-// split into two routines so we can avoid timing issues after sending commands //
-void DoAcquisition125k_internal(int trigger_threshold, bool silent)
-{
-       uint8_t *dest = get_bigbufptr_recvrespbuf();
-       uint16_t i = 0;
-       memset(dest, 0x00, FREE_BUFFER_SIZE);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+       SpinDelay(200);

 
 

-       for(;;) {
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
-                       AT91C_BASE_SSC->SSC_THR = 0x43;
-                       LED_D_ON();
-               }
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-                       dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                       LED_D_OFF();
-                       if (trigger_threshold != -1 && dest[i] < trigger_threshold)
-                               continue;
-                       else
-                               trigger_threshold = -1;
-                       if (++i >= FREE_BUFFER_SIZE) break;
-               }
-       }
-       if (!silent){
-               Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
-                       dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
-       }
-}
-void DoAcquisition125k_threshold(int trigger_threshold) {
-        DoAcquisition125k_internal(trigger_threshold, true);
-}
-void DoAcquisition125k() {
-        DoAcquisition125k_internal(-1, true);
-}      
-       
-void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, uint8_t *command)
-{
-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+       uint16_t period_0 =  periods >> 16;
+       uint16_t period_1 =  periods & 0xFFFF;

        
        

-       /* Make sure the tag is reset */
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       SpinDelay(2500);
+       // 95 == 125 KHz  88 == 124.8 KHz
+       int divisor_used = (useHighFreq) ? 88 : 95;
+       sample_config sc = { 0,0,1, divisor_used, 0};
+       setSamplingConfig(&sc);

 
 

-       int divisor = 95; // 125 KHz
-       // see if 'h' was specified
-       if (command[strlen((char *) command) - 1] == 'h')
-               divisor = 88; // 134.8 KHz
+       //clear read buffer
+       BigBuf_Clear_keep_EM();

 
 

-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor); 
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-       // Give it a bit of time for the resonant antenna to settle.
-       SpinDelay(2000);
+       LFSetupFPGAForADC(sc.divisor, 1);

 
 

-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
+       // And a little more time for the tag to fully power up
+       SpinDelay(50);

 
        // now modulate the reader field
        while(*command != '\0' && *command != ' ') {
                FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
                LED_D_OFF();
 
        // now modulate the reader field
        while(*command != '\0' && *command != ' ') {
                FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
                LED_D_OFF();

-               SpinDelayUs(delay_off);
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor); 
+               WaitUS(delay_off);
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor);

 
                FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
                LED_D_ON();
                if(*(command++) == '0')
 
                FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
                LED_D_ON();
                if(*(command++) == '0')

-                       SpinDelayUs(period_0);
+                       WaitUS(period_0);

                else
                else

-                       SpinDelayUs(period_1);
+                       WaitUS(period_1);

        }
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        LED_D_OFF();
        }
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        LED_D_OFF();

-       SpinDelayUs(delay_off);
-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor); 
+       WaitUS(delay_off);
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor);

        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // now do the read
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // now do the read

-       DoAcquisition125k(-1);
+       DoAcquisition_config(false);

 }
 
 /* blank r/w tag data stream
 }
 
 /* blank r/w tag data stream


@@ -150,6 +91,7 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
 */
 void ReadTItag(void)
 {
 */
 void ReadTItag(void)
 {

+       StartTicks();

        // some hardcoded initial params
        // when we read a TI tag we sample the zerocross line at 2Mhz
        // TI tags modulate a 1 as 16 cycles of 123.2Khz
        // some hardcoded initial params
        // when we read a TI tag we sample the zerocross line at 2Mhz
        // TI tags modulate a 1 as 16 cycles of 123.2Khz


@@ -158,11 +100,8 @@ void ReadTItag(void)
        #define FREQLO 123200
        #define FREQHI 134200
 
        #define FREQLO 123200
        #define FREQHI 134200
 

-       signed char *dest = (signed char *)BigBuf;
-       int n = sizeof(BigBuf);
-//     int *dest = GraphBuffer;
-//     int n = GraphTraceLen;
-
+       signed char *dest = (signed char *)BigBuf_get_addr();
+       uint16_t n = BigBuf_max_traceLen();

        // 128 bit shift register [shift3:shift2:shift1:shift0]
        uint32_t shift3 = 0, shift2 = 0, shift1 = 0, shift0 = 0;
 
        // 128 bit shift register [shift3:shift2:shift1:shift0]
        uint32_t shift3 = 0, shift2 = 0, shift1 = 0, shift0 = 0;
 


@@ -198,10 +137,10 @@ void ReadTItag(void)
 
                                // TI bits are coming to us lsb first so shift them
                                // right through our 128 bit right shift register
 
                                // TI bits are coming to us lsb first so shift them
                                // right through our 128 bit right shift register

-                         shift0 = (shift0>>1) | (shift1 << 31);
-                         shift1 = (shift1>>1) | (shift2 << 31);
-                         shift2 = (shift2>>1) | (shift3 << 31);
-                         shift3 >>= 1;
+                               shift0 = (shift0>>1) | (shift1 << 31);
+                               shift1 = (shift1>>1) | (shift2 << 31);
+                               shift2 = (shift2>>1) | (shift3 << 31);
+                               shift3 >>= 1;

 
                                // check if the cycles fall close to the number
                                // expected for either the low or high frequency
 
                                // check if the cycles fall close to the number
                                // expected for either the low or high frequency


@@ -236,18 +175,18 @@ void ReadTItag(void)
        if (cycles!=0xF0B) {
                DbpString("Info: No valid tag detected.");
        } else {
        if (cycles!=0xF0B) {
                DbpString("Info: No valid tag detected.");
        } else {

-         // put 64 bit data into shift1 and shift0
-         shift0 = (shift0>>24) | (shift1 << 8);
-         shift1 = (shift1>>24) | (shift2 << 8);
+               // put 64 bit data into shift1 and shift0
+               shift0 = (shift0>>24) | (shift1 << 8);
+               shift1 = (shift1>>24) | (shift2 << 8);

 
                // align 16 bit crc into lower half of shift2
 
                // align 16 bit crc into lower half of shift2

-         shift2 = ((shift2>>24) | (shift3 << 8)) & 0x0ffff;
+               shift2 = ((shift2>>24) | (shift3 << 8)) & 0x0ffff;

 
                // if r/w tag, check ident match
 
                // if r/w tag, check ident match

-               if ( shift3&(1<<15) ) {
+               if (shift3 & (1<<15) ) {

                        DbpString("Info: TI tag is rewriteable");
                        // only 15 bits compare, last bit of ident is not valid
                        DbpString("Info: TI tag is rewriteable");
                        // only 15 bits compare, last bit of ident is not valid

-                       if ( ((shift3>>16)^shift0)&0x7fff ) {
+                       if (((shift3 >> 16) ^ shift0) & 0x7fff ) {

                                DbpString("Error: Ident mismatch!");
                        } else {
                                DbpString("Info: TI tag ident is valid");
                                DbpString("Error: Ident mismatch!");
                        } else {
                                DbpString("Info: TI tag ident is valid");


@@ -262,7 +201,7 @@ void ReadTItag(void)
                // calculate CRC
                uint32_t crc=0;
 
                // calculate CRC
                uint32_t crc=0;
 

-               crc = update_crc16(crc, (shift0)&0xff);
+               crc = update_crc16(crc, (shift0)&0xff);

                crc = update_crc16(crc, (shift0>>8)&0xff);
                crc = update_crc16(crc, (shift0>>16)&0xff);
                crc = update_crc16(crc, (shift0>>24)&0xff);
                crc = update_crc16(crc, (shift0>>8)&0xff);
                crc = update_crc16(crc, (shift0>>16)&0xff);
                crc = update_crc16(crc, (shift0>>24)&0xff);


@@ -271,14 +210,14 @@ void ReadTItag(void)
                crc = update_crc16(crc, (shift1>>16)&0xff);
                crc = update_crc16(crc, (shift1>>24)&0xff);
 
                crc = update_crc16(crc, (shift1>>16)&0xff);
                crc = update_crc16(crc, (shift1>>24)&0xff);
 

-               Dbprintf("Info: Tag data: %x%08x, crc=%x",
-                       (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
+               Dbprintf("Info: Tag data: %x%08x, crc=%x", (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);

                if (crc != (shift2&0xffff)) {
                        Dbprintf("Error: CRC mismatch, expected %x", (unsigned int)crc);
                } else {
                        DbpString("Info: CRC is good");
                }
        }
                if (crc != (shift2&0xffff)) {
                        Dbprintf("Error: CRC mismatch, expected %x", (unsigned int)crc);
                } else {
                        DbpString("Info: CRC is good");
                }
        }

+       StopTicks();

 }
 
 void WriteTIbyte(uint8_t b)
 }
 
 void WriteTIbyte(uint8_t b)


@@ -288,20 +227,20 @@ void WriteTIbyte(uint8_t b)
        // modulate 8 bits out to the antenna
        for (i=0; i<8; i++)
        {
        // modulate 8 bits out to the antenna
        for (i=0; i<8; i++)
        {

-               if (b&(1<<i)) {
-                       // stop modulating antenna
-                       SHORT_COIL();
-                       SpinDelayUs(1000);
-                       // modulate antenna
-                       OPEN_COIL();
-                       SpinDelayUs(1000);
+               if ( b & ( 1 << i ) ) {
+                       // stop modulating antenna 1ms
+                       LOW(GPIO_SSC_DOUT);
+                       WaitUS(1000);
+                       // modulate antenna 1ms
+                       HIGH(GPIO_SSC_DOUT); 
+                       WaitUS(1000);

                } else {
                } else {

-                       // stop modulating antenna
-                       SHORT_COIL();
-                       SpinDelayUs(300);
-                       // modulate antenna
-                       OPEN_COIL();
-                       SpinDelayUs(1700);
+                       // stop modulating antenna 1ms
+                       LOW(GPIO_SSC_DOUT);
+                       WaitUS(300);
+                       // modulate antenna 1m
+                       HIGH(GPIO_SSC_DOUT);
+                       WaitUS(1700);

                }
        }
 }
                }
        }
 }


@@ -314,7 +253,10 @@ void AcquireTiType(void)
        #define TIBUFLEN 1250
 
        // clear buffer
        #define TIBUFLEN 1250
 
        // clear buffer

-       memset(BigBuf,0,sizeof(BigBuf));
+       uint32_t *buf = (uint32_t *)BigBuf_get_addr();
+
+       //clear buffer now so it does not interfere with timing later
+       BigBuf_Clear_ext(false);

 
        // Set up the synchronous serial port
        AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DIN;
 
        // Set up the synchronous serial port
        AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DIN;


@@ -335,14 +277,14 @@ void AcquireTiType(void)
        AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(32) | AT91C_SSC_MSBF;
        AT91C_BASE_SSC->SSC_TCMR = 0;
        AT91C_BASE_SSC->SSC_TFMR = 0;
        AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(32) | AT91C_SSC_MSBF;
        AT91C_BASE_SSC->SSC_TCMR = 0;
        AT91C_BASE_SSC->SSC_TFMR = 0;

-
+       // iceman, FpgaSetupSsc() ?? the code above? can it be replaced?

        LED_D_ON();
 
        // modulate antenna
        HIGH(GPIO_SSC_DOUT);
 
        // Charge TI tag for 50ms.
        LED_D_ON();
 
        // modulate antenna
        HIGH(GPIO_SSC_DOUT);
 
        // Charge TI tag for 50ms.

-       SpinDelay(50);
+       WaitMS(50);

 
        // stop modulating antenna and listen
        LOW(GPIO_SSC_DOUT);
 
        // stop modulating antenna and listen
        LOW(GPIO_SSC_DOUT);


@@ -352,7 +294,7 @@ void AcquireTiType(void)
        i = 0;
        for(;;) {
                if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
        i = 0;
        for(;;) {
                if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {

-                       BigBuf[i] = AT91C_BASE_SSC->SSC_RHR;    // store 32 bit values in buffer
+                       buf[i] = AT91C_BASE_SSC->SSC_RHR;       // store 32 bit values in buffer

                        i++; if(i >= TIBUFLEN) break;
                }
                WDT_HIT();
                        i++; if(i >= TIBUFLEN) break;
                }
                WDT_HIT();


@@ -362,12 +304,13 @@ void AcquireTiType(void)
        AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT;
        AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN | GPIO_SSC_DOUT;
 
        AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT;
        AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN | GPIO_SSC_DOUT;
 

-       char *dest = (char *)BigBuf;
-       n = TIBUFLEN*32;
+       char *dest = (char *)BigBuf_get_addr();
+       n = TIBUFLEN * 32;
+       

        // unpack buffer
        // unpack buffer

-       for (i=TIBUFLEN-1; i>=0; i--) {
-               for (j=0; j<32; j++) {
-                       if(BigBuf[i] & (1 << j)) {
+       for (i = TIBUFLEN-1; i >= 0; i--) {
+               for (j = 0; j < 32; j++) {
+                       if(buf[i] & (1 << j)) {

                                dest[--n] = 1;
                        } else {
                                dest[--n] = -1;
                                dest[--n] = 1;
                        } else {
                                dest[--n] = -1;


@@ -381,9 +324,10 @@ void AcquireTiType(void)
 // if not provided a valid crc will be computed from the data and written.
 void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 {
 // if not provided a valid crc will be computed from the data and written.
 void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 {

-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);   
+       StartTicks();
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);

        if(crc == 0) {
        if(crc == 0) {

-               crc = update_crc16(crc, (idlo)&0xff);
+               crc = update_crc16(crc, (idlo)&0xff);

                crc = update_crc16(crc, (idlo>>8)&0xff);
                crc = update_crc16(crc, (idlo>>16)&0xff);
                crc = update_crc16(crc, (idlo>>24)&0xff);
                crc = update_crc16(crc, (idlo>>8)&0xff);
                crc = update_crc16(crc, (idlo>>16)&0xff);
                crc = update_crc16(crc, (idlo>>24)&0xff);


@@ -392,8 +336,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
                crc = update_crc16(crc, (idhi>>16)&0xff);
                crc = update_crc16(crc, (idhi>>24)&0xff);
        }
                crc = update_crc16(crc, (idhi>>16)&0xff);
                crc = update_crc16(crc, (idhi>>24)&0xff);
        }

-       Dbprintf("Writing to tag: %x%08x, crc=%x",
-               (unsigned int) idhi, (unsigned int) idlo, crc);
+       Dbprintf("Writing to tag: %x%08x, crc=%x",      (unsigned int) idhi, (unsigned int) idlo, crc);

 
        // TI tags charge at 134.2Khz
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
 
        // TI tags charge at 134.2Khz
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz


@@ -415,12 +358,12 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
        // start by writing 0xBB (keyword) and 0xEB (password)
        // then write 80 bits of data (or 64 bit data + 16 bit crc if you prefer)
        // finally end with 0x0300 (write frame)
        // start by writing 0xBB (keyword) and 0xEB (password)
        // then write 80 bits of data (or 64 bit data + 16 bit crc if you prefer)
        // finally end with 0x0300 (write frame)

-       // all data is sent lsb firts
+       // all data is sent lsb first

        // finish with 15ms programming time
 
        // modulate antenna
        HIGH(GPIO_SSC_DOUT);
        // finish with 15ms programming time
 
        // modulate antenna
        HIGH(GPIO_SSC_DOUT);

-       SpinDelay(50);  // charge time
+       WaitMS(50);     // charge time

 
        WriteTIbyte(0xbb); // keyword
        WriteTIbyte(0xeb); // password
 
        WriteTIbyte(0xbb); // keyword
        WriteTIbyte(0xeb); // password


@@ -437,7 +380,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
        WriteTIbyte(0x00); // write frame lo
        WriteTIbyte(0x03); // write frame hi
        HIGH(GPIO_SSC_DOUT);
        WriteTIbyte(0x00); // write frame lo
        WriteTIbyte(0x03); // write frame hi
        HIGH(GPIO_SSC_DOUT);

-       SpinDelay(50);  // programming time
+       WaitMS(50);     // programming time

 
        LED_A_OFF();
 
 
        LED_A_OFF();
 


@@ -445,171 +388,81 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
        AcquireTiType();
 
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        AcquireTiType();
 
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       DbpString("Now use tiread to check");
+       DbpString("Now use `lf ti read` to check");
+       StopTicks();

 }
 
 }
 

-
-        
-// PIO_CODR = Clear Output Data Register
-// PIO_SODR = Set Output Data Register
-//#define LOW(x)        AT91C_BASE_PIOA->PIO_CODR = (x)
-//#define HIGH(x)       AT91C_BASE_PIOA->PIO_SODR = (x)
-void SimulateTagLowFrequency( uint16_t period, uint32_t gap, uint8_t ledcontrol)
+void SimulateTagLowFrequency(int period, int gap, int ledcontrol)

 {
 {

-       LED_D_ON();
-
-       uint16_t i = 0;
-       uint8_t send = 0;
-       
-       //int overflow = 0;
-       uint8_t *buf = (uint8_t *)BigBuf;
+       int i = 0;
+       uint8_t *buf = BigBuf_get_addr();

 
 

-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD); 
-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-       RELAY_OFF();
-       
-       // Configure output pin that is connected to the FPGA (for modulating)
-       AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
-       AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
+       //FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
+       //FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE );

 
 

-       SHORT_COIL();
+       // set frequency,  get values from 'lf config' command
+       sample_config *sc = getSamplingConfig();

 
 

-       // Enable Peripheral Clock for TIMER_CLOCK0, used to measure exact timing before answering
-       AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0);
-       
-       // Enable Peripheral Clock for TIMER_CLOCK1, used to capture edges of the reader frames
-       AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1);
-       AT91C_BASE_PIOA->PIO_BSR = GPIO_SSC_FRAME;
-       
-    // Disable timer during configuration      
-       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
+       if ( (sc->divisor == 1) || (sc->divisor < 0) || (sc->divisor > 255) )
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
+       else if (sc->divisor == 0)
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       else
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc->divisor);

        
        

-       // Capture mode, default timer source = MCK/2 (TIMER_CLOCK1), TIOA is external trigger,
-       // external trigger rising edge, load RA on rising edge of TIOA.
-       AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK | AT91C_TC_ETRGEDG_RISING | AT91C_TC_ABETRG | AT91C_TC_LDRA_RISING;
+       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);

        
        

-       // Enable and reset counter
-       //AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
-       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
+       AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
+       AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;

 
 

-       while(!BUTTON_PRESS()) { 
-               WDT_HIT();
+       // power on antenna
+       // OPEN_COIL();
+       // SpinDelay(50);

                
                

-               // Receive frame, watch for at most T0*EOF periods
-               while (AT91C_BASE_TC1->TC_CV < T0 * 55) {
-
-               // Check if rising edge in modulation is detected
-                       if(AT91C_BASE_TC1->TC_SR & AT91C_TC_LDRAS) {
-                               // Retrieve the new timing values 
-                               //int ra = (AT91C_BASE_TC1->TC_RA/T0) + overflow;
-                               //Dbprintf("Timing value - %d  %d", ra, overflow);
-                               //overflow = 0;
-
-                               // Reset timer every frame, we have to capture the last edge for timing
-                               AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
-                               send = 1;
-                               
-                               LED_B_ON();
-                       }
-               } 
-
-               if ( send ) {
-                       // Disable timer 1 with external trigger to avoid triggers during our own modulation
-                       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
-                       
-                       // Wait for HITAG_T_WAIT_1 carrier periods after the last reader bit,
-                       // not that since the clock counts since the rising edge, but T_Wait1 is
-                       // with respect to the falling edge, we need to wait actually (T_Wait1 - T_Low)
-                       // periods. The gap time T_Low varies (4..10). All timer values are in 
-                       // terms of T0 units
-                       while(AT91C_BASE_TC0->TC_CV < T0 * 16  );
-                       
-                       // datat kommer in som 1 bit för varje position i arrayn
-                       for(i = 0; i < period; ++i) {
-                               
-                               // Reset clock for the next bit 
-                               AT91C_BASE_TC0->TC_CCR = AT91C_TC_SWTRG;
+       for(;;) {
+               WDT_HIT();

 
 

-                               if ( buf[i] > 0 )
-                                       HIGH(GPIO_SSC_DOUT);
-                               else
-                                       LOW(GPIO_SSC_DOUT);
+               if (ledcontrol) LED_D_ON();

                                
                                

-                               while(AT91C_BASE_TC0->TC_CV < T0 * 1 );
-                       }
-                       // Drop modulation
-                       LOW(GPIO_SSC_DOUT);
-                                                       
-                       // Enable and reset external trigger in timer for capturing future frames
-                       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
-                       LED_B_OFF();
+               // wait until SSC_CLK goes HIGH
+               // used as a simple detection of a reader field?
+               while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
+                       WDT_HIT();
+                       if ( usb_poll_validate_length() || BUTTON_PRESS() )
+                               goto OUT;

                }
                
                }
                

-               send = 0;
-               
-               // Save the timer overflow, will be 0 when frame was received
-               //overflow += (AT91C_BASE_TC1->TC_CV/T0);
-               
-               // Reset the timer to restart while-loop that receives frames
-               AT91C_BASE_TC1->TC_CCR = AT91C_TC_SWTRG;
-       }
-       
-       LED_B_OFF();
-       LED_D_OFF();
-       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
-       AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       
-       DbpString("Sim Stopped");
-}
-
-
-void SimulateTagLowFrequencyA(int len, int gap)
-{
-       //Dbprintf("LEN %d || Gap %d",len, gap);
-
-       uint8_t *buf = (uint8_t *)BigBuf;
-
-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE); // new izsh toggle mode!
-       
-       // Connect the A/D to the peak-detected low-frequency path.
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-
-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
-       SpinDelay(5);
-       
-       AT91C_BASE_SSC->SSC_THR = 0x00;
+               if(buf[i])
+                       OPEN_COIL();
+               else
+                       SHORT_COIL();

        
        

-       int i = 0;
-       while(!BUTTON_PRESS()) { 
-               WDT_HIT();
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
-                       
-                       if ( buf[i] > 0 )
-                               AT91C_BASE_SSC->SSC_THR = 0x43;
-                       else
-                               AT91C_BASE_SSC->SSC_THR = 0x00;
-
-                       ++i;
-                       LED_A_ON();
-                       if (i >= len){
-                               i = 0;
+               //wait until SSC_CLK goes LOW
+               while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
+                       WDT_HIT();
+                       if ( usb_poll_validate_length() || BUTTON_PRESS() )
+                               goto OUT;
+               }
+                               
+               i++;
+               if(i == period) {
+                       i = 0;
+                       if (gap) {
+                               WDT_HIT();
+                               SHORT_COIL();
+                               SpinDelayUs(gap);

                        }
                }
                
                        }
                }
                

-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-                       volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
-                       (void)r;
-                       LED_A_OFF();
-               }
+               if (ledcontrol) LED_D_OFF();

        }
        }

-       DbpString("lf simulate stopped");
+OUT: 

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

+       LED_D_OFF();
+       DbpString("Simulation stopped");
+       return; 

 }
 
 #define DEBUG_FRAME_CONTENTS 1
 }
 
 #define DEBUG_FRAME_CONTENTS 1


@@ -617,29 +470,31 @@ void SimulateTagLowFrequencyBidir(int divisor, int t0)
 {
 }
 
 {
 }
 

-// compose fc/8 fc/10 waveform
-static void fc(int c, uint16_t *n) {
-       uint8_t *dest = (uint8_t *)BigBuf;
+// compose fc/8 fc/10 waveform (FSK2)
+static void fc(int c, int *n)
+{
+       uint8_t *dest = BigBuf_get_addr();

        int idx;
 
        // for when we want an fc8 pattern every 4 logical bits
        if(c==0) {
                dest[((*n)++)]=1;
                dest[((*n)++)]=1;
        int idx;
 
        // for when we want an fc8 pattern every 4 logical bits
        if(c==0) {
                dest[((*n)++)]=1;
                dest[((*n)++)]=1;

-               dest[((*n)++)]=0;
-               dest[((*n)++)]=0;
+               dest[((*n)++)]=1;
+               dest[((*n)++)]=1;

                dest[((*n)++)]=0;
                dest[((*n)++)]=0;
                dest[((*n)++)]=0;
                dest[((*n)++)]=0;
        }
                dest[((*n)++)]=0;
                dest[((*n)++)]=0;
                dest[((*n)++)]=0;
                dest[((*n)++)]=0;
        }

-       //      an fc/8  encoded bit is a bit pattern of  11000000  x6 = 48 samples
+
+       //      an fc/8  encoded bit is a bit pattern of  11110000  x6 = 48 samples

        if(c==8) {
                for (idx=0; idx<6; idx++) {
                        dest[((*n)++)]=1;
                        dest[((*n)++)]=1;
        if(c==8) {
                for (idx=0; idx<6; idx++) {
                        dest[((*n)++)]=1;
                        dest[((*n)++)]=1;

-                       dest[((*n)++)]=0;
-                       dest[((*n)++)]=0;
+                       dest[((*n)++)]=1;
+                       dest[((*n)++)]=1;

                        dest[((*n)++)]=0;
                        dest[((*n)++)]=0;
                        dest[((*n)++)]=0;
                        dest[((*n)++)]=0;
                        dest[((*n)++)]=0;
                        dest[((*n)++)]=0;


@@ -647,9 +502,11 @@ static void fc(int c, uint16_t *n) {
                }
        }
 
                }
        }
 

-       //      an fc/10 encoded bit is a bit pattern of 1110000000 x5 = 50 samples
+       //      an fc/10 encoded bit is a bit pattern of 1111100000 x5 = 50 samples

        if(c==10) {
                for (idx=0; idx<5; idx++) {
        if(c==10) {
                for (idx=0; idx<5; idx++) {

+                       dest[((*n)++)]=1;
+                       dest[((*n)++)]=1;

                        dest[((*n)++)]=1;
                        dest[((*n)++)]=1;
                        dest[((*n)++)]=1;
                        dest[((*n)++)]=1;
                        dest[((*n)++)]=1;
                        dest[((*n)++)]=1;


@@ -658,17 +515,48 @@ static void fc(int c, uint16_t *n) {
                        dest[((*n)++)]=0;
                        dest[((*n)++)]=0;
                        dest[((*n)++)]=0;
                        dest[((*n)++)]=0;
                        dest[((*n)++)]=0;
                        dest[((*n)++)]=0;

-                       dest[((*n)++)]=0;
-                       dest[((*n)++)]=0;

                }
        }
 }
                }
        }
 }

+// compose fc/X fc/Y waveform (FSKx)
+static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt) 
+{
+       uint8_t *dest = BigBuf_get_addr();
+       uint8_t halfFC = fc/2;
+       uint8_t wavesPerClock = clock/fc;
+       uint8_t mod = clock % fc;    //modifier
+       uint8_t modAdj = fc/mod;     //how often to apply modifier
+       bool modAdjOk = !(fc % mod); //if (fc % mod==0) modAdjOk=TRUE;
+       // loop through clock - step field clock
+       for (uint8_t idx=0; idx < wavesPerClock; idx++){
+               // put 1/2 FC length 1's and 1/2 0's per field clock wave (to create the wave)
+               memset(dest+(*n), 0, fc-halfFC);  //in case of odd number use extra here
+               memset(dest+(*n)+(fc-halfFC), 1, halfFC);
+               *n += fc;
+       }
+       if (mod>0) (*modCnt)++;
+       if ((mod>0) && modAdjOk){  //fsk2 
+               if ((*modCnt % modAdj) == 0){ //if 4th 8 length wave in a rf/50 add extra 8 length wave
+                       memset(dest+(*n), 0, fc-halfFC);
+                       memset(dest+(*n)+(fc-halfFC), 1, halfFC);
+                       *n += fc;
+               }
+       }
+       if (mod>0 && !modAdjOk){  //fsk1
+               memset(dest+(*n), 0, mod-(mod/2));
+               memset(dest+(*n)+(mod-(mod/2)), 1, mod/2);
+               *n += mod;
+       }
+}

 
 // prepare a waveform pattern in the buffer based on the ID given then
 // simulate a HID tag until the button is pressed
 
 // prepare a waveform pattern in the buffer based on the ID given then
 // simulate a HID tag until the button is pressed

-void CmdHIDsimTAG(int hi, int lo, uint8_t ledcontrol)
+void CmdHIDsimTAG(int hi, int lo, int ledcontrol)

 {
 {

-       uint16_t n=0, i=0;
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+       set_tracing(FALSE);
+               
+       int n = 0, i = 0;

        /*
         HID tag bitstream format
         The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits
        /*
         HID tag bitstream format
         The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits


@@ -679,13 +567,13 @@ void CmdHIDsimTAG(int hi, int lo, uint8_t ledcontrol)
         nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10)
        */
 
         nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10)
        */
 

-       if (hi>0xFFF) {
-               DbpString("Tags can only have 44 bits.");
+       if (hi > 0xFFF) {
+               DbpString("Tags can only have 44 bits. - USE lf simfsk for larger tags");

                return;
        }
        fc(0,&n);
        // special start of frame marker containing invalid bit sequences
                return;
        }
        fc(0,&n);
        // special start of frame marker containing invalid bit sequences

-       fc(8,  &n);     fc(8,  &n);     // invalid
+       fc(8,  &n);     fc(8,  &n); // invalid

        fc(8,  &n);     fc(10, &n); // logical 0
        fc(10, &n);     fc(10, &n); // invalid
        fc(8,  &n);     fc(10, &n); // logical 0
        fc(8,  &n);     fc(10, &n); // logical 0
        fc(10, &n);     fc(10, &n); // invalid
        fc(8,  &n);     fc(10, &n); // logical 0


@@ -695,9 +583,9 @@ void CmdHIDsimTAG(int hi, int lo, uint8_t ledcontrol)
        for (i=11; i>=0; i--) {
                if ((i%4)==3) fc(0,&n);
                if ((hi>>i)&1) {
        for (i=11; i>=0; i--) {
                if ((i%4)==3) fc(0,&n);
                if ((hi>>i)&1) {

-                       fc(10, &n);     fc(8,  &n);             // low-high transition
+                       fc(10, &n); fc(8,  &n);         // low-high transition

                } else {
                } else {

-                       fc(8,  &n);     fc(10, &n);             // high-low transition
+                       fc(8,  &n); fc(10, &n);         // high-low transition

                }
        }
 
                }
        }
 


@@ -706,324 +594,559 @@ void CmdHIDsimTAG(int hi, int lo, uint8_t ledcontrol)
        for (i=31; i>=0; i--) {
                if ((i%4)==3) fc(0,&n);
                if ((lo>>i)&1) {
        for (i=31; i>=0; i--) {
                if ((i%4)==3) fc(0,&n);
                if ((lo>>i)&1) {

-                       fc(10, &n);     fc(8,  &n);             // low-high transition
+                       fc(10, &n); fc(8,  &n);         // low-high transition

                } else {
                } else {

-                       fc(8,  &n);     fc(10, &n);             // high-low transition
+                       fc(8,  &n); fc(10, &n);         // high-low transition

                }
        }
                }
        }

-
-       if (ledcontrol)
-               LED_A_ON();
+       WDT_HIT();

        
        

+       if (ledcontrol) LED_A_ON();

        SimulateTagLowFrequency(n, 0, ledcontrol);
        SimulateTagLowFrequency(n, 0, ledcontrol);

-
-       if (ledcontrol)
-               LED_A_OFF();
+       if (ledcontrol) LED_A_OFF();

 }
 
 }
 

-size_t fsk_demod(uint8_t * dest, size_t size)
+// prepare a waveform pattern in the buffer based on the ID given then
+// simulate a FSK tag until the button is pressed
+// arg1 contains fcHigh and fcLow, arg2 contains invert and clock
+void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)

 {
 {

-       uint32_t last_transition = 0;
-       uint32_t idx = 1;
-
-       // we don't care about actual value, only if it's more or less than a
-       // threshold essentially we capture zero crossings for later analysis
-       uint8_t threshold_value = 127;
-
-       // sync to first lo-hi transition, and threshold
-
-       //Need to threshold first sample
-       dest[0] = (dest[0] < threshold_value) ? 0 : 1;
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);

 
 

-       size_t numBits = 0;
-       // count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)
-       // or 10 (fc/10) cycles but in practice due to noise etc we may end up with with anywhere
-       // between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10
-       for(idx = 1; idx < size; idx++) {
-               // threshold current value
-               dest[idx] = (dest[idx] < threshold_value) ? 0 : 1;
+       // free eventually allocated BigBuf memory
+       BigBuf_free(); BigBuf_Clear_ext(false);
+       clear_trace();
+       set_tracing(FALSE);
+       
+       int ledcontrol = 1, n = 0, i = 0;
+       uint8_t fcHigh = arg1 >> 8;
+       uint8_t fcLow = arg1 & 0xFF;
+       uint16_t modCnt = 0;
+       uint8_t clk = arg2 & 0xFF;
+       uint8_t invert = (arg2 >> 8) & 1;
+
+       for (i=0; i<size; i++){
+               
+               if (BitStream[i] == invert)
+                       fcAll(fcLow, &n, clk, &modCnt);
+               else
+                       fcAll(fcHigh, &n, clk, &modCnt);
+       }
+       WDT_HIT();
+       
+       Dbprintf("Simulating with fcHigh: %d, fcLow: %d, clk: %d, invert: %d, n: %d", fcHigh, fcLow, clk, invert, n);

 
 

-               // Check for 0->1 transition
-               if (dest[idx-1] < dest[idx]) { // 0 -> 1 transition
+       if (ledcontrol) LED_A_ON();
+       SimulateTagLowFrequency(n, 0, ledcontrol);
+       if (ledcontrol) LED_A_OFF();
+}

 
 

-                       dest[numBits] =  (idx-last_transition <  9) ? 1 : 0;
-                       last_transition = idx;
-                       numBits++;
-               }
+// compose ask waveform for one bit(ASK)
+static void askSimBit(uint8_t c, int *n, uint8_t clock, uint8_t manchester)
+{
+       uint8_t *dest = BigBuf_get_addr();
+       uint8_t halfClk = clock/2;
+       // c = current bit 1 or 0
+       if (manchester==1){
+               memset(dest+(*n), c, halfClk);
+               memset(dest+(*n) + halfClk, c^1, halfClk);
+       } else {
+               memset(dest+(*n), c, clock);

        }
        }

-       return numBits; //Actually, it returns the number of bytes, but each byte represents a bit: 1 or 0
+       *n += clock;

 }
 
 }
 

-
-size_t aggregate_bits(uint8_t *dest,size_t size, uint8_t h2l_crossing_value,uint8_t l2h_crossing_value, uint8_t maxConsequtiveBits, uint8_t invert )
+static void biphaseSimBit(uint8_t c, int *n, uint8_t clock, uint8_t *phase)

 {
 {

-       uint8_t lastval=dest[0];
-       uint32_t idx=0;
-       size_t numBits=0;
-       uint32_t n=1;
+       uint8_t *dest = BigBuf_get_addr();
+       uint8_t halfClk = clock/2;
+       if (c){
+               memset(dest+(*n), c ^ 1 ^ *phase, halfClk);
+               memset(dest+(*n) + halfClk, c ^ *phase, halfClk);
+       } else {
+               memset(dest+(*n), c ^ *phase, clock);
+               *phase ^= 1;
+       }
+       *n += clock;
+}

 
 

-       for( idx=1; idx < size; idx++) {
+static void stAskSimBit(int *n, uint8_t clock) {
+       uint8_t *dest = BigBuf_get_addr();
+       uint8_t halfClk = clock/2;
+       //ST = .5 high .5 low 1.5 high .5 low 1 high    
+       memset(dest+(*n), 1, halfClk);
+       memset(dest+(*n) + halfClk, 0, halfClk);
+       memset(dest+(*n) + clock, 1, clock + halfClk);
+       memset(dest+(*n) + clock*2 + halfClk, 0, halfClk);
+       memset(dest+(*n) + clock*3, 1, clock);
+       *n += clock*4;
+}

 
 

-               if (dest[idx]==lastval) {
-                       n++;
-                       continue;
+// args clock, ask/man or askraw, invert, transmission separator
+void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
+{
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);   
+       set_tracing(FALSE);
+       
+       int ledcontrol = 1, n = 0, i = 0;
+       uint8_t clk = (arg1 >> 8) & 0xFF;
+       uint8_t encoding = arg1 & 0xFF;
+       uint8_t separator = arg2 & 1;
+       uint8_t invert = (arg2 >> 8) & 1;
+
+       if (encoding == 2){  //biphase
+               uint8_t phase = 0;
+               for (i=0; i<size; i++){
+                       biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
+               }
+               if (phase == 1) { //run a second set inverted to keep phase in check
+                       for (i=0; i<size; i++){
+                               biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
+                       }

                }
                }

-               //if lastval was 1, we have a 1->0 crossing
-               if ( dest[idx-1]==1 ) {
-                       n=(n+1) / h2l_crossing_value;
-               } else {// 0->1 crossing
-                       n=(n+1) / l2h_crossing_value;
+       } else {  // ask/manchester || ask/raw
+               for (i=0; i<size; i++){
+                       askSimBit(BitStream[i]^invert, &n, clk, encoding);

                }
                }

-               if (n == 0) n = 1;
-
-               if(n < maxConsequtiveBits)
-               {
-                       if ( invert==0)
-                               memset(dest+numBits, dest[idx-1] , n);
-                       else
-                               memset(dest+numBits, dest[idx-1]^1 , n);
-                       
-                       numBits += n;
+               if (encoding==0 && BitStream[0]==BitStream[size-1]){ //run a second set inverted (for biphase phase)
+                       for (i=0; i<size; i++){
+                               askSimBit(BitStream[i]^invert^1, &n, clk, encoding);
+                       }

                }
                }

-               n=0;
-               lastval=dest[idx];
-       }//end for
+       }
+       if (separator==1 && encoding == 1)
+               stAskSimBit(&n, clk);
+       else if (separator==1)
+               Dbprintf("sorry but separator option not yet available");

 
 

-       return numBits;
+       WDT_HIT();
+       
+       Dbprintf("Simulating with clk: %d, invert: %d, encoding: %d, separator: %d, n: %d",clk, invert, encoding, separator, n);

 
 

+       if (ledcontrol) LED_A_ON();
+       SimulateTagLowFrequency(n, 0, ledcontrol);
+       if (ledcontrol) LED_A_OFF();

 }
 }

-// loop to capture raw HID waveform then FSK demodulate the TAG ID from it
-void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
+
+//carrier can be 2,4 or 8
+static void pskSimBit(uint8_t waveLen, int *n, uint8_t clk, uint8_t *curPhase, bool phaseChg)

 {
 {

-       uint8_t *dest = get_bigbufptr_recvrespbuf();
+       uint8_t *dest = BigBuf_get_addr();
+       uint8_t halfWave = waveLen/2;
+       //uint8_t idx;
+       int i = 0;
+       if (phaseChg){
+               // write phase change
+               memset(dest+(*n), *curPhase^1, halfWave);
+               memset(dest+(*n) + halfWave, *curPhase, halfWave);
+               *n += waveLen;
+               *curPhase ^= 1;
+               i += waveLen;
+       }
+       //write each normal clock wave for the clock duration
+       for (; i < clk; i+=waveLen){
+               memset(dest+(*n), *curPhase, halfWave);
+               memset(dest+(*n) + halfWave, *curPhase^1, halfWave);
+               *n += waveLen;
+       }
+}

 
 

-       size_t size=0,idx=0; //, found=0;
-       uint32_t hi2=0, hi=0, lo=0;
+// args clock, carrier, invert,
+void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
+{
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);   
+       set_tracing(FALSE);
+       
+       int ledcontrol = 1, n = 0, i = 0;
+       uint8_t clk = arg1 >> 8;
+       uint8_t carrier = arg1 & 0xFF;
+       uint8_t invert = arg2 & 0xFF;
+       uint8_t curPhase = 0;
+       for (i=0; i<size; i++){
+               if (BitStream[i] == curPhase){
+                       pskSimBit(carrier, &n, clk, &curPhase, FALSE);
+               } else {
+                       pskSimBit(carrier, &n, clk, &curPhase, TRUE);
+               }
+       }
+       
+       WDT_HIT();
+       
+       Dbprintf("Simulating with Carrier: %d, clk: %d, invert: %d, n: %d",carrier, clk, invert, n);
+                  
+       if (ledcontrol) LED_A_ON();
+       SimulateTagLowFrequency(n, 0, ledcontrol);
+       if (ledcontrol) LED_A_OFF();
+}

 
 

+// loop to get raw HID waveform then FSK demodulate the TAG ID from it
+void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
+{
+       uint8_t *dest = BigBuf_get_addr();
+       size_t size = 0; 
+       uint32_t hi2=0, hi=0, lo=0;
+       int idx=0;

        // Configure to go in 125Khz listen mode
        // Configure to go in 125Khz listen mode

-       LFSetupFPGAForADC(0, true);
+       LFSetupFPGAForADC(95, true);

 
 

-       while(!BUTTON_PRESS()) {
+       //clear read buffer
+       BigBuf_Clear_keep_EM();
+
+       while(!BUTTON_PRESS() && !usb_poll_validate_length()) {

 
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
 
 
                WDT_HIT();
                if (ledcontrol) LED_A_ON();
 

-               DoAcquisition125k_internal(-1,true);
-
+               DoAcquisition_default(-1,true);

                // FSK demodulator
                // FSK demodulator

-               size = fsk_demod(dest, FREE_BUFFER_SIZE);
-
-               // we now have a set of cycle counts, loop over previous results and aggregate data into bit patterns
-               // 1->0 : fc/8 in sets of 6
-               // 0->1 : fc/10 in sets of 5
-               // do not invert
-               size = aggregate_bits(dest,size, 6,5,5,0); 
-
-               // final loop, go over previously decoded manchester data and decode into usable tag ID
-               // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
-               uint8_t frame_marker_mask[] = {1,1,1,0,0,0};
-               int numshifts = 0;
-               idx = 0;
-               while( idx + sizeof(frame_marker_mask) < size) {
-                       // search for a start of frame marker
-                       if ( memcmp(dest+idx, frame_marker_mask, sizeof(frame_marker_mask)) == 0)
-                       { // frame marker found
-                               idx+=sizeof(frame_marker_mask);
-
-                               while(dest[idx] != dest[idx+1] && idx < size-2)
-                               {       
-                                       // Keep going until next frame marker (or error)
-                                       // Shift in a bit. Start by shifting high registers
-                                       hi2=(hi2<<1)|(hi>>31);
-                                       hi=(hi<<1)|(lo>>31);
-                                       //Then, shift in a 0 or one into low
-                                       if (dest[idx] && !dest[idx+1])  // 1 0
-                                       lo=(lo<<1)|0;
-                                       else // 0 1
-                                               lo=(lo<<1)|
-                                                               1;
-                                       numshifts ++;
-                                       idx += 2;
+               size = 50*128*2; //big enough to catch 2 sequences of largest format
+               idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
+               
+               if (idx>0 && lo>0 && (size==96 || size==192)){
+                       // go over previously decoded manchester data and decode into usable tag ID
+                       if (hi2 != 0){ //extra large HID tags  88/192 bits
+                               Dbprintf("TAG ID: %x%08x%08x (%d)",
+                                 (unsigned int) hi2,
+                                 (unsigned int) hi,
+                                 (unsigned int) lo,
+                                 (unsigned int) (lo>>1) & 0xFFFF
+                                 );
+                       } else {  //standard HID tags 44/96 bits
+                               uint8_t bitlen = 0;
+                               uint32_t fc = 0;
+                               uint32_t cardnum = 0;
+                               
+                               if (((hi>>5)&1) == 1){//if bit 38 is set then < 37 bit format is used
+                                       uint32_t lo2=0;
+                                       lo2=(((hi & 31) << 12) | (lo>>20)); //get bits 21-37 to check for format len bit
+                                       uint8_t idx3 = 1;
+                                       while(lo2 > 1){ //find last bit set to 1 (format len bit)
+                                               lo2=lo2 >> 1;
+                                               idx3++;
+                                       }
+                                       bitlen = idx3+19;
+                                       fc =0;
+                                       cardnum=0;
+                                       if(bitlen == 26){
+                                               cardnum = (lo>>1)&0xFFFF;
+                                               fc = (lo>>17)&0xFF;
+                                       }
+                                       if(bitlen == 37){
+                                               cardnum = (lo>>1)&0x7FFFF;
+                                               fc = ((hi&0xF)<<12)|(lo>>20);
+                                       }
+                                       if(bitlen == 34){
+                                               cardnum = (lo>>1)&0xFFFF;
+                                               fc= ((hi&1)<<15)|(lo>>17);
+                                       }
+                                       if(bitlen == 35){
+                                               cardnum = (lo>>1)&0xFFFFF;
+                                               fc = ((hi&1)<<11)|(lo>>21);
+                                       }

                                }
                                }

-                               //Dbprintf("Num shifts: %d ", numshifts);
-                               // Hopefully, we read a tag and  hit upon the next frame marker
-                               if(idx + sizeof(frame_marker_mask) < size)
-                               {
-                                       if ( memcmp(dest+idx, frame_marker_mask, sizeof(frame_marker_mask)) == 0)
-                                       {
-                                               if (hi2 != 0){
-                                                       Dbprintf("TAG ID: %x%08x%08x (%d)",
-                                                                (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-                                               }
-                                               else {
-                                                       Dbprintf("TAG ID: %x%08x (%d)",
-                                                        (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-                                               }
+                               else { //if bit 38 is not set then 37 bit format is used
+                                       bitlen= 37;
+                                       fc =0;
+                                       cardnum=0;
+                                       if(bitlen==37){
+                                               cardnum = (lo>>1)&0x7FFFF;
+                                               fc = ((hi&0xF)<<12)|(lo>>20);

                                        }
                                }
                                        }
                                }

-
-                               // reset
-                               hi2 = hi = lo = 0;
-                               numshifts = 0;
-                       } else {
-                               idx++;
+                               Dbprintf("TAG ID: %x%08x (%d) - Format Len: %dbit - FC: %d - Card: %d",
+                                                (unsigned int) hi,
+                                                (unsigned int) lo,
+                                                (unsigned int) (lo>>1) & 0xFFFF,
+                                                (unsigned int) bitlen,
+                                                (unsigned int) fc,
+                                                (unsigned int) cardnum);
+                       }
+                       if (findone){
+                               if (ledcontrol) LED_A_OFF();
+                               *high = hi;
+                               *low = lo;
+                               break;

                        }
                        }

+                       // reset

                }
                }

+               hi2 = hi = lo = idx = 0;

                WDT_HIT();
                WDT_HIT();

-

        }
        }

+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
 }
 
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
 }
 

-uint32_t bytebits_to_byte(uint8_t* src, int numbits)
+// loop to get raw HID waveform then FSK demodulate the TAG ID from it
+void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)

 {
 {

-       uint32_t num = 0;
-       for(int i = 0 ; i < numbits ; i++)
-       {
-               num = (num << 1) | (*src);
-               src++;
+       uint8_t *dest = BigBuf_get_addr();
+       size_t size; 
+       int idx=0;
+       //clear read buffer
+       BigBuf_Clear_keep_EM();
+       // Configure to go in 125Khz listen mode
+       LFSetupFPGAForADC(95, true);
+
+       while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
+
+               WDT_HIT();
+               if (ledcontrol) LED_A_ON();
+
+               DoAcquisition_default(-1,true);
+               // FSK demodulator
+               size = 50*128*2; //big enough to catch 2 sequences of largest format
+               idx = AWIDdemodFSK(dest, &size);
+               
+               if (idx<=0 || size!=96) continue;
+               // Index map
+               // 0            10            20            30              40            50              60
+               // |            |             |             |               |             |               |
+               // 01234567 890 1 234 5 678 9 012 3 456 7 890 1 234 5 678 9 012 3 456 7 890 1 234 5 678 9 012 3 - to 96
+               // -----------------------------------------------------------------------------
+               // 00000001 000 1 110 1 101 1 011 1 101 1 010 0 000 1 000 1 010 0 001 0 110 1 100 0 000 1 000 1
+               // premable bbb o bbb o bbw o fff o fff o ffc o ccc o ccc o ccc o ccc o ccc o wxx o xxx o xxx o - to 96
+               //          |---26 bit---|    |-----117----||-------------142-------------|
+               // b = format bit len, o = odd parity of last 3 bits
+               // f = facility code, c = card number
+               // w = wiegand parity
+               // (26 bit format shown)
+
+               //get raw ID before removing parities
+               uint32_t rawLo = bytebits_to_byte(dest+idx+64,32);
+               uint32_t rawHi = bytebits_to_byte(dest+idx+32,32);
+               uint32_t rawHi2 = bytebits_to_byte(dest+idx,32);
+
+               size = removeParity(dest, idx+8, 4, 1, 88);
+               if (size != 66) continue;
+
+               // Index map
+               // 0           10         20        30          40        50        60
+               // |           |          |         |           |         |         |
+               // 01234567 8 90123456 7890123456789012 3 456789012345678901234567890123456
+               // -----------------------------------------------------------------------------
+               // 00011010 1 01110101 0000000010001110 1 000000000000000000000000000000000
+               // bbbbbbbb w ffffffff cccccccccccccccc w xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
+               // |26 bit|   |-117--| |-----142------|
+                       //
+                       // 00110010 0 0000011111010000000000000001000100101000100001111 0 00000000 
+                       // bbbbbbbb w ffffffffffffffffccccccccccccccccccccccccccccccccc w xxxxxxxx
+                       // |50 bit|   |----4000------||-----------2248975-------------|                         
+                       //
+               // b = format bit len, o = odd parity of last 3 bits
+               // f = facility code, c = card number
+               // w = wiegand parity
+
+               uint32_t fc = 0;
+               uint32_t cardnum = 0;
+               uint32_t code1 = 0;
+               uint32_t code2 = 0;
+               uint8_t fmtLen = bytebits_to_byte(dest,8);
+                       switch(fmtLen) {
+                               case 26: 
+                                       fc = bytebits_to_byte(dest + 9, 8);
+                                       cardnum = bytebits_to_byte(dest + 17, 16);
+                                       code1 = bytebits_to_byte(dest + 8,fmtLen);
+                                       Dbprintf("AWID Found - BitLength: %d, FC: %d, Card: %u - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, fc, cardnum, code1, rawHi2, rawHi, rawLo);
+                                       break;
+                               case 50:
+                                       fc = bytebits_to_byte(dest + 9, 16);
+                                       cardnum = bytebits_to_byte(dest + 25, 32);
+                                       code1 = bytebits_to_byte(dest + 8, (fmtLen-32) );
+                                       code2 = bytebits_to_byte(dest + 8 + (fmtLen-32), 32);
+                                       Dbprintf("AWID Found - BitLength: %d, FC: %d, Card: %u - Wiegand: %x%08x, Raw: %08x%08x%08x", fmtLen, fc, cardnum, code1, code2, rawHi2, rawHi, rawLo);
+                                       break;
+                               default:
+                                       if (fmtLen > 32 ) {
+                                               cardnum = bytebits_to_byte(dest+8+(fmtLen-17), 16);
+                                               code1 = bytebits_to_byte(dest+8,fmtLen-32);
+                                               code2 = bytebits_to_byte(dest+8+(fmtLen-32),32);
+                                               Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%u) - Wiegand: %x%08x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, code2, rawHi2, rawHi, rawLo);
+                                       } else {
+                                               cardnum = bytebits_to_byte(dest+8+(fmtLen-17), 16);
+                                               code1 = bytebits_to_byte(dest+8,fmtLen);
+                                               Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%u) - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, rawHi2, rawHi, rawLo);
+                                       }
+                                       break;          
+                       }
+                       if (findone)
+                               break;
+
+               idx = 0;
+               WDT_HIT();

        }
        }

-       return num;
-}

 
 

+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); 
+       DbpString("Stopped");
+       if (ledcontrol) LED_A_OFF();
+}

 
 

-void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
+void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)

 {
 {

-       uint8_t *dest = get_bigbufptr_recvrespbuf();
-       
+       uint8_t *dest = BigBuf_get_addr();
+

        size_t size=0, idx=0;
        size_t size=0, idx=0;

-       uint32_t code=0, code2=0;
-       uint8_t isFinish = 0;
-       
+       int clk=0, invert=0, errCnt=0, maxErr=20;
+       uint32_t hi=0;
+       uint64_t lo=0;
+       //clear read buffer
+       BigBuf_Clear_keep_EM();

        // Configure to go in 125Khz listen mode
        // Configure to go in 125Khz listen mode

-       LFSetupFPGAForADC(0, true);
+       LFSetupFPGAForADC(95, true);

 
 

-       while(!BUTTON_PRESS() & !isFinish) {
+       while(!BUTTON_PRESS() && !usb_poll_validate_length()) {

 
                WDT_HIT();
 
                WDT_HIT();

-               

                if (ledcontrol) LED_A_ON();
 
                if (ledcontrol) LED_A_ON();
 

-               DoAcquisition125k_internal(-1,true);
+               DoAcquisition_default(-1,true);
+               size  = BigBuf_max_traceLen();
+               //askdemod and manchester decode
+               if (size > 16385) size = 16385; //big enough to catch 2 sequences of largest format
+               errCnt = askdemod(dest, &size, &clk, &invert, maxErr, 0, 1);
+               WDT_HIT();

 
 

-               // FSK demodulator
-               size = fsk_demod(dest, FREE_BUFFER_SIZE);
-
-               // we now have a set of cycle counts, loop over previous results and aggregate data into bit patterns
-               // 1->0 : fc/8 in sets of 7
-               // 0->1 : fc/10 in sets of 6
-               size = aggregate_bits(dest, size, 7,6,13,1); //13 max Consecutive should be ok as most 0s in row should be 10 for init seq - invert bits
-
-               //Index map
-               //0 10 20 30 40 50 60
-               //| | | | | | |
-               //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23
-               //-----------------------------------------------------------------------------
-               //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 ???????? 11
-               //
-               //XSF(version)facility:codeone+codetwo
-               //Handle the data
-
-           uint8_t mask[] = {0,0,0,0,0,0,0,0,0,1};
-               
-               for( idx=0; idx < (size - 64); idx++) {
-                       if ( memcmp(dest + idx, mask, sizeof(mask))==0) {
-                               //frame marker found
-                               if(findone){ //only print binary if we are doing one
-                                       Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx], dest[idx+1], dest[idx+2],dest[idx+3],dest[idx+4],dest[idx+5],dest[idx+6],dest[idx+7],dest[idx+8]);
-                                       Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+9], dest[idx+10],dest[idx+11],dest[idx+12],dest[idx+13],dest[idx+14],dest[idx+15],dest[idx+16],dest[idx+17]);
-                                       Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+18],dest[idx+19],dest[idx+20],dest[idx+21],dest[idx+22],dest[idx+23],dest[idx+24],dest[idx+25],dest[idx+26]);
-                                       Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+27],dest[idx+28],dest[idx+29],dest[idx+30],dest[idx+31],dest[idx+32],dest[idx+33],dest[idx+34],dest[idx+35]);
-                                       Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+36],dest[idx+37],dest[idx+38],dest[idx+39],dest[idx+40],dest[idx+41],dest[idx+42],dest[idx+43],dest[idx+44]);
-                                       Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+45],dest[idx+46],dest[idx+47],dest[idx+48],dest[idx+49],dest[idx+50],dest[idx+51],dest[idx+52],dest[idx+53]);
-                                       Dbprintf("%d%d%d%d%d%d%d%d %d%d",dest[idx+54],dest[idx+55],dest[idx+56],dest[idx+57],dest[idx+58],dest[idx+59],dest[idx+60],dest[idx+61],dest[idx+62],dest[idx+63]);
+               if (errCnt<0) continue;
+       
+                       errCnt = Em410xDecode(dest, &size, &idx, &hi, &lo);
+                       if (errCnt){
+                               if (size>64){
+                                       Dbprintf("EM XL TAG ID: %06x%08x%08x - (%05d_%03d_%08d)",
+                                         hi,
+                                         (uint32_t)(lo>>32),
+                                         (uint32_t)lo,
+                                         (uint32_t)(lo&0xFFFF),
+                                         (uint32_t)((lo>>16LL) & 0xFF),
+                                         (uint32_t)(lo & 0xFFFFFF));
+                               } else {
+                                       Dbprintf("EM TAG ID: %02x%08x - (%05d_%03d_%08d)",
+                                         (uint32_t)(lo>>32),
+                                         (uint32_t)lo,
+                                         (uint32_t)(lo&0xFFFF),
+                                         (uint32_t)((lo>>16LL) & 0xFF),
+                                         (uint32_t)(lo & 0xFFFFFF));

                                }
                                }

-                               code = bytebits_to_byte(dest+idx,32);
-                               code2 = bytebits_to_byte(dest+idx+32,32);
-                               short version = bytebits_to_byte(dest+idx+28,8); //14,4
-                               char facilitycode = bytebits_to_byte(dest+idx+19,8) ;
-                               uint16_t number = (bytebits_to_byte(dest+idx+37,8)<<8)|(bytebits_to_byte(dest+idx+46,8)); //36,9

 
 

-                               Dbprintf("XSF(%02d)%02x:%d (%08x%08x)",version,facilitycode,number,code,code2);
-                       
-                               // if we're only looking for one tag
-                               if (findone){
-                                       if (ledcontrol) LED_A_OFF();
-                                       isFinish = 1;
-                                       break;
-                               }
+                       if (findone){
+                               if (ledcontrol) LED_A_OFF();
+                               *high=lo>>32;
+                               *low=lo & 0xFFFFFFFF;
+                               break;

                        }
                }
                WDT_HIT();
                        }
                }
                WDT_HIT();

+               hi = lo = size = idx = 0;
+               clk = invert = errCnt = 0;

        }
        }

+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);         

        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
 }
 
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
 }
 

-/*------------------------------
- * T5555/T5557/T5567 routines
- *------------------------------
- */
-
-/* T55x7 configuration register definitions */
-#define T55x7_POR_DELAY                                0x00000001
-#define T55x7_ST_TERMINATOR                    0x00000008
-#define T55x7_PWD                                      0x00000010
-#define T55x7_MAXBLOCK_SHIFT           5
-#define T55x7_AOR                                      0x00000200
-#define T55x7_PSKCF_RF_2                       0
-#define T55x7_PSKCF_RF_4                       0x00000400
-#define T55x7_PSKCF_RF_8                       0x00000800
-#define T55x7_MODULATION_DIRECT                0
-#define T55x7_MODULATION_PSK1          0x00001000
-#define T55x7_MODULATION_PSK2          0x00002000
-#define T55x7_MODULATION_PSK3          0x00003000
-#define T55x7_MODULATION_FSK1          0x00004000
-#define T55x7_MODULATION_FSK2          0x00005000
-#define T55x7_MODULATION_FSK1a         0x00006000
-#define T55x7_MODULATION_FSK2a         0x00007000
-#define T55x7_MODULATION_MANCHESTER    0x00008000
-#define T55x7_MODULATION_BIPHASE       0x00010000
-#define T55x7_BITRATE_RF_8                     0
-#define T55x7_BITRATE_RF_16                    0x00040000
-#define T55x7_BITRATE_RF_32                    0x00080000
-#define T55x7_BITRATE_RF_40                    0x000C0000
-#define T55x7_BITRATE_RF_50                    0x00100000
-#define T55x7_BITRATE_RF_64                    0x00140000
-#define T55x7_BITRATE_RF_100           0x00180000
-#define T55x7_BITRATE_RF_128           0x001C0000
-
-/* T5555 (Q5) configuration register definitions */
-#define T5555_ST_TERMINATOR                    0x00000001
-#define T5555_MAXBLOCK_SHIFT           0x00000001
-#define T5555_MODULATION_MANCHESTER    0
-#define T5555_MODULATION_PSK1          0x00000010
-#define T5555_MODULATION_PSK2          0x00000020
-#define T5555_MODULATION_PSK3          0x00000030
-#define T5555_MODULATION_FSK1          0x00000040
-#define T5555_MODULATION_FSK2          0x00000050
-#define T5555_MODULATION_BIPHASE       0x00000060
-#define T5555_MODULATION_DIRECT                0x00000070
-#define T5555_INVERT_OUTPUT                    0x00000080
-#define T5555_PSK_RF_2                         0
-#define T5555_PSK_RF_4                         0x00000100
-#define T5555_PSK_RF_8                         0x00000200
-#define T5555_USE_PWD                          0x00000400
-#define T5555_USE_AOR                          0x00000800
-#define T5555_BITRATE_SHIFT                    12
-#define T5555_FAST_WRITE                       0x00004000
-#define T5555_PAGE_SELECT                      0x00008000
-
-/*
- * Relevant times in microsecond
- * To compensate antenna falling times shorten the write times
- * and enlarge the gap ones.
+void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
+{
+       uint8_t *dest = BigBuf_get_addr();
+       int idx=0;
+       uint32_t code=0, code2=0;
+       uint8_t version=0;
+       uint8_t facilitycode=0;
+       uint16_t number=0;
+       uint8_t crc = 0;
+       uint16_t calccrc = 0;
+
+       //clear read buffer
+       BigBuf_Clear_keep_EM();
+       
+       // Configure to go in 125Khz listen mode
+       LFSetupFPGAForADC(95, true);
+
+       while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
+               WDT_HIT();
+               if (ledcontrol) LED_A_ON();
+               DoAcquisition_default(-1,true);
+               //fskdemod and get start index
+               WDT_HIT();
+               idx = IOdemodFSK(dest, BigBuf_max_traceLen());
+               if (idx<0) continue;
+                       //valid tag found
+
+                       //Index map
+                       //0           10          20          30          40          50          60
+                       //|           |           |           |           |           |           |
+                       //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23
+                       //-----------------------------------------------------------------------------
+            //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 checksum 11
+                       //
+                       //Checksum:  
+                       //00000000 0 11110000 1 11100000 1 00000001 1 00000011 1 10110110 1 01110101 11
+                       //preamble      F0         E0         01         03         B6         75
+                       // How to calc checksum,
+                       // http://www.proxmark.org/forum/viewtopic.php?id=364&p=6
+                       //   F0 + E0 + 01 + 03 + B6 = 28A
+                       //   28A & FF = 8A
+                       //   FF - 8A = 75
+                       // Checksum: 0x75
+                       //XSF(version)facility:codeone+codetwo
+                       //Handle the data
+                       // if(findone){ //only print binary if we are doing one
+                               // Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx],   dest[idx+1],   dest[idx+2],dest[idx+3],dest[idx+4],dest[idx+5],dest[idx+6],dest[idx+7],dest[idx+8]);
+                               // Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+9], dest[idx+10],dest[idx+11],dest[idx+12],dest[idx+13],dest[idx+14],dest[idx+15],dest[idx+16],dest[idx+17]);
+                               // Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+18],dest[idx+19],dest[idx+20],dest[idx+21],dest[idx+22],dest[idx+23],dest[idx+24],dest[idx+25],dest[idx+26]);
+                               // Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+27],dest[idx+28],dest[idx+29],dest[idx+30],dest[idx+31],dest[idx+32],dest[idx+33],dest[idx+34],dest[idx+35]);
+                               // Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+36],dest[idx+37],dest[idx+38],dest[idx+39],dest[idx+40],dest[idx+41],dest[idx+42],dest[idx+43],dest[idx+44]);
+                               // Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+45],dest[idx+46],dest[idx+47],dest[idx+48],dest[idx+49],dest[idx+50],dest[idx+51],dest[idx+52],dest[idx+53]);
+                               // Dbprintf("%d%d%d%d%d%d%d%d %d%d",dest[idx+54],dest[idx+55],dest[idx+56],dest[idx+57],dest[idx+58],dest[idx+59],dest[idx+60],dest[idx+61],dest[idx+62],dest[idx+63]);
+                       // }
+                       code = bytebits_to_byte(dest+idx,32);
+                       code2 = bytebits_to_byte(dest+idx+32,32);
+                       version = bytebits_to_byte(dest+idx+27,8); //14,4
+                       facilitycode = bytebits_to_byte(dest+idx+18,8);
+                       number = (bytebits_to_byte(dest+idx+36,8)<<8)|(bytebits_to_byte(dest+idx+45,8)); //36,9
+
+                       crc = bytebits_to_byte(dest+idx+54,8);
+                       for (uint8_t i=1; i<6; ++i)
+                               calccrc += bytebits_to_byte(dest+idx+9*i,8);
+                       calccrc &= 0xff;
+                       calccrc = 0xff - calccrc;
+                       
+                       char *crcStr = (crc == calccrc) ? "ok":"!crc";
+
+            Dbprintf("IO Prox XSF(%02d)%02x:%05d (%08x%08x)  [%02x %s]",version,facilitycode,number,code,code2, crc, crcStr);
+                       // if we're only looking for one tag
+                       if (findone){
+                               if (ledcontrol) LED_A_OFF();
+                               *high=code;
+                               *low=code2;
+                               break;
+                       }
+                       code=code2=0;
+                       version=facilitycode=0;
+                       number=0;
+                       idx=0;
+
+               WDT_HIT();
+       }
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);         
+       DbpString("Stopped");
+       if (ledcontrol) LED_A_OFF();
+}
+
+/*------------------------------
+ * T5555/T5557/T5567/T5577 routines
+ *------------------------------
+ * NOTE: T55x7/T5555 configuration register definitions moved to protocols.h 
+ *
+ * Relevant communication times in microsecond
+ * To compensate antenna falling times shorten the write times
+ * and enlarge the gap ones.
+ * Q5 tags seems to have issues when these values changes. 

  */
  */

-#define START_GAP 30*8 // 10 - 50fc 250
-#define WRITE_GAP 20*8 //  8 - 30fc
-#define WRITE_0   24*8 // 16 - 31fc 24fc 192
-#define WRITE_1   54*8 // 48 - 63fc 54fc 432 for T55x7; 448 for E5550
+
+#define START_GAP 50*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (15fc)
+#define WRITE_GAP 20*8 // was 160 // SPEC:  1*8 to 20*8 - typ 10*8 (10fc)
+#define WRITE_0   18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (24fc)
+#define WRITE_1   54*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (56fc)  432 for T55x7; 448 for E5550
+#define READ_GAP  15*8 

 
 //  VALUES TAKEN FROM EM4x function: SendForward
 //  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)
 
 //  VALUES TAKEN FROM EM4x function: SendForward
 //  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)


@@ -1031,317 +1154,307 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 //  WRITE_1   = 256 32*8;  (32*8) 
 
 //  These timings work for 4469/4269/4305 (with the 55*8 above)
 //  WRITE_1   = 256 32*8;  (32*8) 
 
 //  These timings work for 4469/4269/4305 (with the 55*8 above)

-//  WRITE_0 = 23*8 , 9*8  SpinDelayUs(23*8); 
+//  WRITE_0 = 23*8 , 9*8 

 
 

-#define T55xx_SAMPLES_SIZE             12000 // 32 x 32 x 10  (32 bit times numofblock (7), times clock skip..)
+// Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK)
+// TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
+// Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
+// T0 = TIMER_CLOCK1 / 125000 = 192
+// 1 Cycle = 8 microseconds(us)  == 1 field clock

 
 

-// Write one bit to card
-void T55xxWriteBit(int bit)
-{
-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+// new timer:
+//     = 1us = 1.5ticks
+// 1fc = 8us = 12ticks
+void TurnReadLFOn(uint32_t delay) {

        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

+
+       // measure antenna strength.
+       //int adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
+
+       // Give it a bit of time for the resonant antenna to settle.
+       WaitUS(delay);
+}
+
+// Write one bit to card
+void T55xxWriteBit(int bit) {

        if (!bit)
        if (!bit)

-               SpinDelayUs(WRITE_0);
+               TurnReadLFOn(WRITE_0);

        else
        else

-               SpinDelayUs(WRITE_1);
+               TurnReadLFOn(WRITE_1);

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       SpinDelayUs(WRITE_GAP);
+       WaitUS(WRITE_GAP);
+}
+
+// Send T5577 reset command then read stream (see if we can identify the start of the stream)
+void T55xxResetRead(void) {
+       LED_A_ON();
+       //clear buffer now so it does not interfere with timing later
+       BigBuf_Clear_keep_EM();
+
+       // Set up FPGA, 125kHz
+       LFSetupFPGAForADC(95, true);
+
+       // Trigger T55x7 in mode.
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+       WaitUS(START_GAP);
+
+       // reset tag - op code 00
+       T55xxWriteBit(0);
+       T55xxWriteBit(0);
+
+       // Turn field on to read the response
+       TurnReadLFOn(READ_GAP);
+
+       // Acquisition
+       doT55x7Acquisition(BigBuf_max_traceLen());
+
+       // Turn the field off
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       cmd_send(CMD_ACK,0,0,0,0,0);    
+       LED_A_OFF();

 }
 
 // Write one card block in page 0, no lock
 }
 
 // Write one card block in page 0, no lock

-void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
-{
+void T55xxWriteBlockExt(uint32_t Data, uint8_t Block, uint32_t Pwd, uint8_t arg) {
+       LED_A_ON();
+       bool PwdMode = arg & 0x1;
+       uint8_t Page = (arg & 0x2)>>1;

        uint32_t i = 0;
 
        // Set up FPGA, 125kHz
        uint32_t i = 0;
 
        // Set up FPGA, 125kHz

-       // Wait for config.. (192+8190xPOW)x8 == 67ms
-       LFSetupFPGAForADC(0, true);
-
-       // Now start writting
+       LFSetupFPGAForADC(95, true);
+       
+       // Trigger T55x7 in mode.

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       SpinDelayUs(START_GAP);
+       WaitUS(START_GAP);

 
 

-       // Opcode
+       // Opcode 10

        T55xxWriteBit(1);
        T55xxWriteBit(1);

-       T55xxWriteBit(0); //Page 0
-       if (PwdMode == 1){
-               // Pwd
+       T55xxWriteBit(Page); //Page 0
+       if (PwdMode){
+               // Send Pwd

                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
        }
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
        }

-       // Lock bit
+       // Send Lock bit

        T55xxWriteBit(0);
 
        T55xxWriteBit(0);
 

-       // Data
+       // Send Data

        for (i = 0x80000000; i != 0; i >>= 1)
                T55xxWriteBit(Data & i);
 
        for (i = 0x80000000; i != 0; i >>= 1)
                T55xxWriteBit(Data & i);
 

-       // Block
+       // Send Block number

        for (i = 0x04; i != 0; i >>= 1)
                T55xxWriteBit(Block & i);
 
        for (i = 0x04; i != 0; i >>= 1)
                T55xxWriteBit(Block & i);
 

-       // Now perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
+       // Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,

        // so wait a little more)
        // so wait a little more)

-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-       SpinDelay(20);
+       TurnReadLFOn(20 * 1000);
+       
+       //could attempt to do a read to confirm write took
+       // as the tag should repeat back the new block 
+       // until it is reset, but to confirm it we would 
+       // need to know the current block 0 config mode
+       
+       // turn field off

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

+       LED_A_OFF();

 }
 
 }
 

-// Read one card block in page 0
-void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
-{
-       uint8_t *dest =  get_bigbufptr_recvrespbuf();
-       uint16_t bufferlength = T55xx_SAMPLES_SIZE;
-       uint32_t i = 0;
+// Write one card block in page 0, no lock
+void T55xxWriteBlock(uint32_t Data, uint8_t Block, uint32_t Pwd, uint8_t arg) {
+       T55xxWriteBlockExt(Data, Block, Pwd, arg);
+       cmd_send(CMD_ACK,0,0,0,0,0);
+}

 
 

-       // Clear destination buffer before sending the command  0x80 = average.
-       memset(dest, 0x80, bufferlength);
+// Read one card block in page [page]
+void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
+       LED_A_ON();
+       bool PwdMode = arg0 & 0x1;
+       uint8_t Page = (arg0 & 0x2) >> 1;
+       uint32_t i = 0;
+       bool RegReadMode = (Block == 0xFF);
+       
+       //clear buffer now so it does not interfere with timing later
+       BigBuf_Clear_keep_EM();

 
 

-       // Set up FPGA, 125kHz
-       // Wait for config.. (192+8190xPOW)x8 == 67ms
-       LFSetupFPGAForADC(0, true);
+       //make sure block is at max 7
+       Block &= 0x7;

 
 

+       // Set up FPGA, 125kHz to power up the tag
+       LFSetupFPGAForADC(95, true);
+       SpinDelay(3);
+       
+       // Trigger T55x7 Direct Access Mode with start gap

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       SpinDelayUs(START_GAP);
-  
-       // Opcode
+       WaitUS(START_GAP);
+       
+       // Opcode 1[page]

        T55xxWriteBit(1);
        T55xxWriteBit(1);

-       T55xxWriteBit(0); //Page 0
-       if (PwdMode == 1){
-               // Pwd
+       T55xxWriteBit(Page); //Page 0
+
+       if (PwdMode){
+               // Send Pwd

                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
        }
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
        }

-       // Lock bit
+       // Send a zero bit separation

        T55xxWriteBit(0);
        T55xxWriteBit(0);

-       // Block
-       for (i = 0x04; i != 0; i >>= 1)
-               T55xxWriteBit(Block & i);
-  
+       
+       // Send Block number (if direct access mode)
+       if (!RegReadMode)
+               for (i = 0x04; i != 0; i >>= 1)
+                       T55xxWriteBit(Block & i);
+

        // Turn field on to read the response
        // Turn field on to read the response

-       TurnReadLFOn();
-  
-       // Now do the acquisition
-       i = 0;
-       for(;;) {
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
-                       AT91C_BASE_SSC->SSC_THR = 0x43;
-                       //AT91C_BASE_SSC->SSC_THR = 0xff;
-                       LED_D_ON();
-               }
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-                       dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                       ++i;
-                       LED_D_OFF();
-                       if (i > bufferlength) break;
-               }
-       }
- 
-       cmd_send(CMD_ACK,0,0,0,0,0);
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-       LED_D_OFF();
+       TurnReadLFOn(READ_GAP);
+       
+       // Acquisition
+       doT55x7Acquisition(12000);
+       
+       // Turn the field off
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       cmd_send(CMD_ACK,0,0,0,0,0);    
+       LED_A_OFF();

 }
 
 }
 

-// Read card traceability data (page 1)
-void T55xxReadTrace(void){
-       uint8_t *dest =  get_bigbufptr_recvrespbuf();
-       uint16_t bufferlength = T55xx_SAMPLES_SIZE;
+void T55xxWakeUp(uint32_t Pwd){
+       LED_B_ON();

        uint32_t i = 0;
        
        uint32_t i = 0;
        

-       // Clear destination buffer before sending the command 0x80 = average
-       memset(dest, 0x80, bufferlength);  
-  
-       LFSetupFPGAForADC(0, true);
-  
+       // Set up FPGA, 125kHz
+       LFSetupFPGAForADC(95, true);
+       
+       // Trigger T55x7 Direct Access Mode

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       SpinDelayUs(START_GAP);
-  
-       // Opcode
+       WaitUS(START_GAP);
+       
+       // Opcode 10

        T55xxWriteBit(1);
        T55xxWriteBit(1);

-       T55xxWriteBit(1); //Page 1
-  
-       // Turn field on to read the response
-       TurnReadLFOn();
-  
-       // Now do the acquisition
-       for(;;) {
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
-                       AT91C_BASE_SSC->SSC_THR = 0x43;
-                       LED_D_ON();
+       T55xxWriteBit(0); //Page 0
+
+       // Send Pwd
+       for (i = 0x80000000; i != 0; i >>= 1)
+               T55xxWriteBit(Pwd & i);
+
+       // Turn and leave field on to let the begin repeating transmission
+       TurnReadLFOn(20*1000);
+}
+
+/*-------------- Cloning routines -----------*/
+void WriteT55xx(uint32_t *blockdata, uint8_t startblock, uint8_t numblocks) {
+       // write last block first and config block last (if included)
+       for (uint8_t i = numblocks+startblock; i > startblock; i--)
+               T55xxWriteBlockExt(blockdata[i-1], i-1, 0, 0);
+}
+
+// Copy HID id to card and setup block 0 config
+void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) {
+       uint32_t data[] = {0,0,0,0,0,0,0};
+       uint8_t last_block = 0;
+
+       if (longFMT){
+               // Ensure no more than 84 bits supplied
+               if (hi2 > 0xFFFFF) {
+                       DbpString("Tags can only have 84 bits.");
+                       return;

                }
                }

-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-                       dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                       ++i;
-                       LED_D_OFF();
-               
-                       if (i >= bufferlength) break;
+               // Build the 6 data blocks for supplied 84bit ID
+               last_block = 6;
+               // load preamble (1D) & long format identifier (9E manchester encoded)
+               data[1] = 0x1D96A900 | (manchesterEncode2Bytes((hi2 >> 16) & 0xF) & 0xFF);
+               // load raw id from hi2, hi, lo to data blocks (manchester encoded)
+               data[2] = manchesterEncode2Bytes(hi2 & 0xFFFF);
+               data[3] = manchesterEncode2Bytes(hi >> 16);
+               data[4] = manchesterEncode2Bytes(hi & 0xFFFF);
+               data[5] = manchesterEncode2Bytes(lo >> 16);
+               data[6] = manchesterEncode2Bytes(lo & 0xFFFF);
+       }       else {
+               // Ensure no more than 44 bits supplied
+               if (hi > 0xFFF) {
+                       DbpString("Tags can only have 44 bits.");
+                       return;

                }
                }

+               // Build the 3 data blocks for supplied 44bit ID
+               last_block = 3;
+               // load preamble
+               data[1] = 0x1D000000 | (manchesterEncode2Bytes(hi) & 0xFFFFFF);
+               data[2] = manchesterEncode2Bytes(lo >> 16);
+               data[3] = manchesterEncode2Bytes(lo & 0xFFFF);

        }
        }

-  
-       cmd_send(CMD_ACK,0,0,0,0,0);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       // load chip config block
+       data[0] = T55x7_BITRATE_RF_50 | T55x7_MODULATION_FSK2a | last_block << T55x7_MAXBLOCK_SHIFT;
+
+       //TODO add selection of chip for Q5 or T55x7
+       // data[0] = (((50-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | last_block << T5555_MAXBLOCK_SHIFT;
+
+       LED_D_ON();
+       // Program the data blocks for supplied ID
+       // and the block 0 for HID format
+       WriteT55xx(data, 0, last_block+1);
+

        LED_D_OFF();
        LED_D_OFF();

-}

 
 

-void TurnReadLFOn(){
-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-       // Give it a bit of time for the resonant antenna to settle.
-       //SpinDelay(30);
-       SpinDelayUs(8*150);
+       DbpString("DONE!");

 }
 
 }
 

-/*-------------- Cloning routines -----------*/
-// Copy HID id to card and setup block 0 config
-void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
-{
-       int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format
-       int last_block = 0;
-  
-  if (longFMT){
-         // Ensure no more than 84 bits supplied
-         if (hi2>0xFFFFF) {
-                 DbpString("Tags can only have 84 bits.");
-                 return;
-         }
-    // Build the 6 data blocks for supplied 84bit ID
-    last_block = 6;
-    data1 = 0x1D96A900; // load preamble (1D) & long format identifier (9E manchester encoded)
-         for (int i=0;i<4;i++) {
-                 if (hi2 & (1<<(19-i)))
-                         data1 |= (1<<(((3-i)*2)+1)); // 1 -> 10
-                 else
-                         data1 |= (1<<((3-i)*2)); // 0 -> 01
-         }
-    
-       data2 = 0;
-       for (int i=0;i<16;i++) {
-               if (hi2 & (1<<(15-i)))
-                       data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data2 |= (1<<((15-i)*2)); // 0 -> 01
-    }
-    
-       data3 = 0;
-       for (int i=0;i<16;i++) {
-               if (hi & (1<<(31-i)))
-                       data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data3 |= (1<<((15-i)*2)); // 0 -> 01
-       }
-    
-       data4 = 0;
-       for (int i=0;i<16;i++) {
-               if (hi & (1<<(15-i)))
-                       data4 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data4 |= (1<<((15-i)*2)); // 0 -> 01
-    }
-    
-       data5 = 0;
-       for (int i=0;i<16;i++) {
-               if (lo & (1<<(31-i)))
-                       data5 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data5 |= (1<<((15-i)*2)); // 0 -> 01
-       }
-    
-       data6 = 0;
-       for (int i=0;i<16;i++) {
-               if (lo & (1<<(15-i)))
-                       data6 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data6 |= (1<<((15-i)*2)); // 0 -> 01
-    }
-  }
-  else {
-         // Ensure no more than 44 bits supplied
-         if (hi>0xFFF) {
-                 DbpString("Tags can only have 44 bits.");
-                 return;
-         }
-    
-       // Build the 3 data blocks for supplied 44bit ID
-       last_block = 3;
-       
-       data1 = 0x1D000000; // load preamble
-    
-    for (int i=0;i<12;i++) {
-      if (hi & (1<<(11-i)))
-        data1 |= (1<<(((11-i)*2)+1)); // 1 -> 10
-      else
-        data1 |= (1<<((11-i)*2)); // 0 -> 01
-    }
-    
-       data2 = 0;
-       for (int i=0;i<16;i++) {
-               if (lo & (1<<(31-i)))
-                       data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data2 |= (1<<((15-i)*2)); // 0 -> 01
-       }
-    
-       data3 = 0;
-       for (int i=0;i<16;i++) {
-               if (lo & (1<<(15-i)))
-                       data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-               else
-                       data3 |= (1<<((15-i)*2)); // 0 -> 01
-       }
-  }
-  
+void CopyIOtoT55x7(uint32_t hi, uint32_t lo) {
+       uint32_t data[] = {T55x7_BITRATE_RF_64 | T55x7_MODULATION_FSK2a | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
+       //TODO add selection of chip for Q5 or T55x7
+       //t5555 (Q5) BITRATE = (RF-2)/2 (iceman)
+       // data[0] = (64 << T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | 2 << T5555_MAXBLOCK_SHIFT;
+

        LED_D_ON();
        // Program the data blocks for supplied ID
        LED_D_ON();
        // Program the data blocks for supplied ID

-       // and the block 0 for HID format
-       T55xxWriteBlock(data1,1,0,0);
-       T55xxWriteBlock(data2,2,0,0);
-       T55xxWriteBlock(data3,3,0,0);
-       
-       if (longFMT) { // if long format there are 6 blocks
-         T55xxWriteBlock(data4,4,0,0);
-         T55xxWriteBlock(data5,5,0,0);
-         T55xxWriteBlock(data6,6,0,0);
-  }
-  
-       // Config for HID (RF/50, FSK2a, Maxblock=3 for short/6 for long)
-       T55xxWriteBlock(T55x7_BITRATE_RF_50  |
-                  T55x7_MODULATION_FSK2a |
-                  last_block << T55x7_MAXBLOCK_SHIFT,
-                  0,0,0);
-  
+       // and the block 0 config
+       WriteT55xx(data, 0, 3);

        LED_D_OFF();
        LED_D_OFF();

-       

        DbpString("DONE!");
 }
 
        DbpString("DONE!");
 }
 

-void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT)
-{
-   int data1=0, data2=0; //up to six blocks for long format
-       
-    data1 = hi;  // load preamble
-    data2 = lo;
-    
-    LED_D_ON();
-    // Program the data blocks for supplied ID
-    // and the block 0 for HID format
-    T55xxWriteBlock(data1,1,0,0);
-    T55xxWriteBlock(data2,2,0,0);
-       
-    //Config Block
-    T55xxWriteBlock(0x00147040,0,0,0);
-    LED_D_OFF();
-       
-    DbpString("DONE!");
+// Clone Indala 64-bit tag by UID to T55x7
+void CopyIndala64toT55x7(uint32_t hi, uint32_t lo) {
+       //Program the 2 data blocks for supplied 64bit UID
+       // and the Config for Indala 64 format (RF/32;PSK1 with RF/2;Maxblock=2)
+       uint32_t data[] = { T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
+       //TODO add selection of chip for Q5 or T55x7
+       // data[0] = (((32-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_PSK1 | 2 << T5555_MAXBLOCK_SHIFT;
+
+       WriteT55xx(data, 0, 3);
+       //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
+       //      T5567WriteBlock(0x603E1042,0);
+       DbpString("DONE!");
+}
+// Clone Indala 224-bit tag by UID to T55x7
+void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t uid4, uint32_t uid5, uint32_t uid6, uint32_t uid7) {
+       //Program the 7 data blocks for supplied 224bit UID
+       uint32_t data[] = {0, uid1, uid2, uid3, uid4, uid5, uid6, uid7};
+       // and the block 0 for Indala224 format 
+       //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
+       data[0] = T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (7 << T55x7_MAXBLOCK_SHIFT);
+       //TODO add selection of chip for Q5 or T55x7
+       // data[0] = (((32-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_PSK1 | 7 << T5555_MAXBLOCK_SHIFT;
+       WriteT55xx(data, 0, 8);
+       //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
+       //      T5567WriteBlock(0x603E10E2,0);
+       DbpString("DONE!");
+}
+// clone viking tag to T55xx
+void CopyVikingtoT55xx(uint32_t block1, uint32_t block2, uint8_t Q5) {
+       uint32_t data[] = {T55x7_BITRATE_RF_32 | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT), block1, block2};
+       //t5555 (Q5) BITRATE = (RF-2)/2 (iceman)
+       if (Q5) data[0] = (32 << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | 2 << T5555_MAXBLOCK_SHIFT;
+       // Program the data blocks for supplied ID and the block 0 config
+       WriteT55xx(data, 0, 3);
+       LED_D_OFF();
+       cmd_send(CMD_ACK,0,0,0,0,0);

 }
 
 // Define 9bit header for EM410x tags
 #define EM410X_HEADER          0x1FF
 #define EM410X_ID_LENGTH       40
 
 }
 
 // Define 9bit header for EM410x tags
 #define EM410X_HEADER          0x1FF
 #define EM410X_ID_LENGTH       40
 

-void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
-{
+void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo) {

        int i, id_bit;
        uint64_t id = EM410X_HEADER;
        uint64_t rev_id = 0;    // reversed ID
        int i, id_bit;
        uint64_t id = EM410X_HEADER;
        uint64_t rev_id = 0;    // reversed ID


@@ -1401,359 +1514,40 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
        LED_D_ON();
 
        // Write EM410x ID
        LED_D_ON();
 
        // Write EM410x ID

-       T55xxWriteBlock((uint32_t)(id >> 32), 1, 0, 0);
-       T55xxWriteBlock((uint32_t)id, 2, 0, 0);
-
-       // Config for EM410x (RF/64, Manchester, Maxblock=2)
-       if (card) {
-               // Clock rate is stored in bits 8-15 of the card value
-               clock = (card & 0xFF00) >> 8;
-               Dbprintf("Clock rate: %d", clock);
-               switch (clock)
-               {
-                       case 32:
-                               clock = T55x7_BITRATE_RF_32;
-                               break;
-                       case 16:
-                               clock = T55x7_BITRATE_RF_16;
-                               break;
-                       case 0:
-                               // A value of 0 is assumed to be 64 for backwards-compatibility
-                               // Fall through...
-                       case 64:
-                               clock = T55x7_BITRATE_RF_64;
-                               break;      
-                       default:
-                               Dbprintf("Invalid clock rate: %d", clock);
-                               return;
+       uint32_t data[] = {0, (uint32_t)(id>>32), (uint32_t)(id & 0xFFFFFFFF)};
+
+       clock = (card & 0xFF00) >> 8;
+       clock = (clock == 0) ? 64 : clock;
+       Dbprintf("Clock rate: %d", clock);
+       if (card & 0xFF) { //t55x7
+               clock = GetT55xxClockBit(clock);
+               if (clock == 0) {
+                       Dbprintf("Invalid clock rate: %d", clock);
+                       return;

                }
                }

-
-               // Writing configuration for T55x7 tag
-               T55xxWriteBlock(clock       |
-                               T55x7_MODULATION_MANCHESTER |
-                               2 << T55x7_MAXBLOCK_SHIFT,
-                               0, 0, 0);
-  }
-       else
-               // Writing configuration for T5555(Q5) tag
-               T55xxWriteBlock(0x1F << T5555_BITRATE_SHIFT |
-                               T5555_MODULATION_MANCHESTER   |
-                               2 << T5555_MAXBLOCK_SHIFT,
-                               0, 0, 0);
-
-       LED_D_OFF();
-       Dbprintf("Tag %s written with 0x%08x%08x\n", card ? "T55x7":"T5555",
-                                       (uint32_t)(id >> 32), (uint32_t)id);
-}
-
-// Clone Indala 64-bit tag by UID to T55x7
-void CopyIndala64toT55x7(int hi, int lo)
-{
-       //Program the 2 data blocks for supplied 64bit UID
-       // and the block 0 for Indala64 format
-       T55xxWriteBlock(hi,1,0,0);
-       T55xxWriteBlock(lo,2,0,0);
-       //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=2)
-       T55xxWriteBlock(T55x7_BITRATE_RF_32    |
-                       T55x7_MODULATION_PSK1 |
-                       2 << T55x7_MAXBLOCK_SHIFT,
-                       0, 0, 0);
-       //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
-       //      T5567WriteBlock(0x603E1042,0);
-
-       DbpString("DONE!");
-}      
-
-void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int uid6, int uid7)
-{
-       //Program the 7 data blocks for supplied 224bit UID
-       // and the block 0 for Indala224 format
-       T55xxWriteBlock(uid1,1,0,0);
-       T55xxWriteBlock(uid2,2,0,0);
-       T55xxWriteBlock(uid3,3,0,0);
-       T55xxWriteBlock(uid4,4,0,0);
-       T55xxWriteBlock(uid5,5,0,0);
-       T55xxWriteBlock(uid6,6,0,0);
-       T55xxWriteBlock(uid7,7,0,0);
-       //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
-       T55xxWriteBlock(T55x7_BITRATE_RF_32    |
-                       T55x7_MODULATION_PSK1 |
-                       7 << T55x7_MAXBLOCK_SHIFT,
-                       0,0,0);
-       //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
-       //      T5567WriteBlock(0x603E10E2,0);
-
-       DbpString("DONE!");
-}
-
-
-#define abs(x) ( ((x)<0) ? -(x) : (x) )
-#define max(x,y) ( x<y ? y:x)
-
-int DemodPCF7931(uint8_t **outBlocks) {
-       uint8_t BitStream[256];
-       uint8_t Blocks[8][16];
-       uint8_t *GraphBuffer = (uint8_t *)BigBuf;
-       int GraphTraceLen = sizeof(BigBuf);
-       int i, j, lastval, bitidx, half_switch;
-       int clock = 64;
-       int tolerance = clock / 8;
-       int pmc, block_done;
-       int lc, warnings = 0;
-       int num_blocks = 0;
-       int lmin=128, lmax=128;
-       uint8_t dir;
-       
-       AcquireRawAdcSamples125k(0);
-       
-       lmin = 64;
-       lmax = 192;
-       
-       i = 2;
-       
-       /* Find first local max/min */
-       if(GraphBuffer[1] > GraphBuffer[0]) {
-    while(i < GraphTraceLen) {
-      if( !(GraphBuffer[i] > GraphBuffer[i-1]) && GraphBuffer[i] > lmax)
-        break;
-      i++;
-    }
-    dir = 0;
-       }
-       else {
-    while(i < GraphTraceLen) {
-      if( !(GraphBuffer[i] < GraphBuffer[i-1]) && GraphBuffer[i] < lmin)
-        break;
-      i++;
-    }
-    dir = 1;
-       }
-       
-       lastval = i++;
-       half_switch = 0;
-       pmc = 0;
-       block_done = 0;
-       
-       for (bitidx = 0; i < GraphTraceLen; i++)
-       {
-    if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
-    {
-      lc = i - lastval;
-      lastval = i;
-      
-      // Switch depending on lc length:
-      // Tolerance is 1/8 of clock rate (arbitrary)
-      if (abs(lc-clock/4) < tolerance) {
-        // 16T0
-        if((i - pmc) == lc) { /* 16T0 was previous one */
-          /* It's a PMC ! */
-          i += (128+127+16+32+33+16)-1;
-          lastval = i;
-          pmc = 0;
-          block_done = 1;
-        }
-        else {
-          pmc = i;
-        }
-      } else if (abs(lc-clock/2) < tolerance) {
-        // 32TO
-        if((i - pmc) == lc) { /* 16T0 was previous one */
-          /* It's a PMC ! */
-          i += (128+127+16+32+33)-1;
-          lastval = i;
-          pmc = 0;
-          block_done = 1;
-        }
-        else if(half_switch == 1) {
-          BitStream[bitidx++] = 0;
-          half_switch = 0;
-        }
-        else
-          half_switch++;
-      } else if (abs(lc-clock) < tolerance) {
-        // 64TO
-        BitStream[bitidx++] = 1;
-      } else {
-        // Error
-        warnings++;
-        if (warnings > 10)
-        {
-          Dbprintf("Error: too many detection errors, aborting.");
-          return 0;
-        }
-      }
-      
-      if(block_done == 1) {
-        if(bitidx == 128) {
-          for(j=0; j<16; j++) {
-            Blocks[num_blocks][j] = 128*BitStream[j*8+7]+
-            64*BitStream[j*8+6]+
-            32*BitStream[j*8+5]+
-            16*BitStream[j*8+4]+
-            8*BitStream[j*8+3]+
-            4*BitStream[j*8+2]+
-            2*BitStream[j*8+1]+
-            BitStream[j*8];
-          }
-          num_blocks++;
-        }
-        bitidx = 0;
-        block_done = 0;
-        half_switch = 0;
-      }
-      if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
-      else dir = 1;
-    }
-    if(bitidx==255)
-      bitidx=0;
-    warnings = 0;
-    if(num_blocks == 4) break;
+               data[0] = clock | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT);
+       } else { //t5555 (Q5)
+               clock = (clock-2)>>1;  //n = (RF-2)/2
+               data[0] = (clock << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | (2 << T5555_MAXBLOCK_SHIFT);

        }
        }

-       memcpy(outBlocks, Blocks, 16*num_blocks);
-       return num_blocks;
-}
-
-int IsBlock0PCF7931(uint8_t *Block) {
-       // Assume RFU means 0 :)
-       if((memcmp(Block, "\x00\x00\x00\x00\x00\x00\x00\x01", 8) == 0) && memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) // PAC enabled
-    return 1;
-       if((memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) && Block[7] == 0) // PAC disabled, can it *really* happen ?
-    return 1;
-       return 0;
-}
+ 
+       WriteT55xx(data, 0, 3);

 
 

-int IsBlock1PCF7931(uint8_t *Block) {
-       // Assume RFU means 0 :)
-       if(Block[10] == 0 && Block[11] == 0 && Block[12] == 0 && Block[13] == 0)
-    if((Block[14] & 0x7f) <= 9 && Block[15] <= 9)
-      return 1;
-       
-       return 0;
-}
-#define ALLOC 16
-
-void ReadPCF7931() {
-       uint8_t Blocks[8][17];
-       uint8_t tmpBlocks[4][16];
-       int i, j, ind, ind2, n;
-       int num_blocks = 0;
-       int max_blocks = 8;
-       int ident = 0;
-       int error = 0;
-       int tries = 0;
-       
-       memset(Blocks, 0, 8*17*sizeof(uint8_t));
-       
-       do {
-    memset(tmpBlocks, 0, 4*16*sizeof(uint8_t));
-    n = DemodPCF7931((uint8_t**)tmpBlocks);
-    if(!n)
-      error++;
-    if(error==10 && num_blocks == 0) {
-      Dbprintf("Error, no tag or bad tag");
-      return;
-    }
-    else if (tries==20 || error==10) {
-      Dbprintf("Error reading the tag");
-      Dbprintf("Here is the partial content");
-      goto end;
-    }
-    
-    for(i=0; i<n; i++)
-      Dbprintf("(dbg) %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
-               tmpBlocks[i][0], tmpBlocks[i][1], tmpBlocks[i][2], tmpBlocks[i][3], tmpBlocks[i][4], tmpBlocks[i][5], tmpBlocks[i][6], tmpBlocks[i][7],
-               tmpBlocks[i][8], tmpBlocks[i][9], tmpBlocks[i][10], tmpBlocks[i][11], tmpBlocks[i][12], tmpBlocks[i][13], tmpBlocks[i][14], tmpBlocks[i][15]);
-    if(!ident) {
-      for(i=0; i<n; i++) {
-        if(IsBlock0PCF7931(tmpBlocks[i])) {
-          // Found block 0 ?
-          if(i < n-1 && IsBlock1PCF7931(tmpBlocks[i+1])) {
-            // Found block 1!
-            // \o/
-            ident = 1;
-            memcpy(Blocks[0], tmpBlocks[i], 16);
-            Blocks[0][ALLOC] = 1;
-            memcpy(Blocks[1], tmpBlocks[i+1], 16);
-            Blocks[1][ALLOC] = 1;
-            max_blocks = max((Blocks[1][14] & 0x7f), Blocks[1][15]) + 1;
-            // Debug print
-            Dbprintf("(dbg) Max blocks: %d", max_blocks);
-            num_blocks = 2;
-            // Handle following blocks
-            for(j=i+2, ind2=2; j!=i; j++, ind2++, num_blocks++) {
-              if(j==n) j=0;
-              if(j==i) break;
-              memcpy(Blocks[ind2], tmpBlocks[j], 16);
-              Blocks[ind2][ALLOC] = 1;
-            }
-            break;
-          }
-        }
-      }
-    }
-    else {
-      for(i=0; i<n; i++) { // Look for identical block in known blocks
-        if(memcmp(tmpBlocks[i], "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 16)) { // Block is not full of 00
-          for(j=0; j<max_blocks; j++) {
-            if(Blocks[j][ALLOC] == 1 && !memcmp(tmpBlocks[i], Blocks[j], 16)) {
-              // Found an identical block
-              for(ind=i-1,ind2=j-1; ind >= 0; ind--,ind2--) {
-                if(ind2 < 0)
-                  ind2 = max_blocks;
-                if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
-                  // Dbprintf("Tmp %d -> Block %d", ind, ind2);
-                  memcpy(Blocks[ind2], tmpBlocks[ind], 16);
-                  Blocks[ind2][ALLOC] = 1;
-                  num_blocks++;
-                  if(num_blocks == max_blocks) goto end;
-                }
-              }
-              for(ind=i+1,ind2=j+1; ind < n; ind++,ind2++) {
-                if(ind2 > max_blocks)
-                  ind2 = 0;
-                if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
-                  // Dbprintf("Tmp %d -> Block %d", ind, ind2);
-                  memcpy(Blocks[ind2], tmpBlocks[ind], 16);
-                  Blocks[ind2][ALLOC] = 1;
-                  num_blocks++;
-                  if(num_blocks == max_blocks) goto end;
-                }
-              }
-            }
-          }
-        }
-      }
-    }
-    tries++;
-    if (BUTTON_PRESS()) return;
-       } while (num_blocks != max_blocks);
-end:
-       Dbprintf("-----------------------------------------");
-       Dbprintf("Memory content:");
-       Dbprintf("-----------------------------------------");
-       for(i=0; i<max_blocks; i++) {
-    if(Blocks[i][ALLOC]==1)
-      Dbprintf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
-               Blocks[i][0], Blocks[i][1], Blocks[i][2], Blocks[i][3], Blocks[i][4], Blocks[i][5], Blocks[i][6], Blocks[i][7],
-               Blocks[i][8], Blocks[i][9], Blocks[i][10], Blocks[i][11], Blocks[i][12], Blocks[i][13], Blocks[i][14], Blocks[i][15]);
-    else
-      Dbprintf("<missing block %d>", i);
-       }
-       Dbprintf("-----------------------------------------");
-       
-       return ;
+       LED_D_OFF();
+       Dbprintf("Tag %s written with 0x%08x%08x\n",
+                       card ? "T55x7":"T5555",
+                       (uint32_t)(id >> 32),
+                       (uint32_t)id);

 }
 
 }
 

-

 //-----------------------------------
 // EM4469 / EM4305 routines
 //-----------------------------------
 //-----------------------------------
 // EM4469 / EM4305 routines
 //-----------------------------------

-#define FWD_CMD_LOGIN 0xC //including the even parity, binary mirrored
-#define FWD_CMD_WRITE 0xA
-#define FWD_CMD_READ 0x9
+#define FWD_CMD_LOGIN   0xC //including the even parity, binary mirrored
+#define FWD_CMD_WRITE   0xA
+#define FWD_CMD_READ    0x9

 #define FWD_CMD_DISABLE 0x5
 
 #define FWD_CMD_DISABLE 0x5
 

-

 uint8_t forwardLink_data[64]; //array of forwarded bits
 uint8_t * forward_ptr; //ptr for forward message preparation
 uint8_t fwd_bit_sz; //forwardlink bit counter
 uint8_t forwardLink_data[64]; //array of forwarded bits
 uint8_t * forward_ptr; //ptr for forward message preparation
 uint8_t fwd_bit_sz; //forwardlink bit counter


@@ -1764,84 +1558,85 @@ uint8_t * fwd_write_ptr; //forwardlink bit pointer
 // see EM4469 spec
 //====================================================================
 //--------------------------------------------------------------------
 // see EM4469 spec
 //====================================================================
 //--------------------------------------------------------------------

+//  VALUES TAKEN FROM EM4x function: SendForward
+//  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)
+//  WRITE_GAP = 128;       (16*8)
+//  WRITE_1   = 256 32*8;  (32*8) 
+
+//  These timings work for 4469/4269/4305 (with the 55*8 above)
+//  WRITE_0 = 23*8 , 9*8
+

 uint8_t Prepare_Cmd( uint8_t cmd ) {
 uint8_t Prepare_Cmd( uint8_t cmd ) {

-  //--------------------------------------------------------------------
-  
-  *forward_ptr++ = 0; //start bit
-  *forward_ptr++ = 0; //second pause for 4050 code
-  
-  *forward_ptr++ = cmd;
-  cmd >>= 1;
-  *forward_ptr++ = cmd;
-  cmd >>= 1;
-  *forward_ptr++ = cmd;
-  cmd >>= 1;
-  *forward_ptr++ = cmd;
-  
-  return 6; //return number of emited bits
+
+       *forward_ptr++ = 0; //start bit
+       *forward_ptr++ = 0; //second pause for 4050 code
+
+       *forward_ptr++ = cmd;
+       cmd >>= 1;
+       *forward_ptr++ = cmd;
+       cmd >>= 1;
+       *forward_ptr++ = cmd;
+       cmd >>= 1;
+       *forward_ptr++ = cmd;
+
+       return 6; //return number of emited bits

 }
 
 //====================================================================
 // prepares address bits
 // see EM4469 spec
 //====================================================================
 }
 
 //====================================================================
 // prepares address bits
 // see EM4469 spec
 //====================================================================

-
-//--------------------------------------------------------------------

 uint8_t Prepare_Addr( uint8_t addr ) {
 uint8_t Prepare_Addr( uint8_t addr ) {

-  //--------------------------------------------------------------------
-  
-  register uint8_t line_parity;
-  
-  uint8_t i;
-  line_parity = 0;
-  for(i=0;i<6;i++) {
-    *forward_ptr++ = addr;
-    line_parity ^= addr;
-    addr >>= 1;
-  }
-  
-  *forward_ptr++ = (line_parity & 1);
-  
-  return 7; //return number of emited bits
+
+       register uint8_t line_parity;
+
+       uint8_t i;
+       line_parity = 0;
+       for(i=0;i<6;i++) {
+               *forward_ptr++ = addr;
+               line_parity ^= addr;
+               addr >>= 1;
+       }
+
+       *forward_ptr++ = (line_parity & 1);
+
+       return 7; //return number of emited bits

 }
 
 //====================================================================
 // prepares data bits intreleaved with parity bits
 // see EM4469 spec
 //====================================================================
 }
 
 //====================================================================
 // prepares data bits intreleaved with parity bits
 // see EM4469 spec
 //====================================================================

-
-//--------------------------------------------------------------------

 uint8_t Prepare_Data( uint16_t data_low, uint16_t data_hi) {
 uint8_t Prepare_Data( uint16_t data_low, uint16_t data_hi) {

-  //--------------------------------------------------------------------
-  
-  register uint8_t line_parity;
-  register uint8_t column_parity;
-  register uint8_t i, j;
-  register uint16_t data;
-  
-  data = data_low;
-  column_parity = 0;
-  
-  for(i=0; i<4; i++) {
-    line_parity = 0;
-    for(j=0; j<8; j++) {
-      line_parity ^= data;
-      column_parity ^= (data & 1) << j;
-      *forward_ptr++ = data;
-      data >>= 1;
-    }
-    *forward_ptr++ = line_parity;
-    if(i == 1)
-      data = data_hi;
-  }
-  
-  for(j=0; j<8; j++) {
-    *forward_ptr++ = column_parity;
-    column_parity >>= 1;
-  }
-  *forward_ptr = 0;
-  
-  return 45; //return number of emited bits
+
+       register uint8_t line_parity;
+       register uint8_t column_parity;
+       register uint8_t i, j;
+       register uint16_t data;
+
+       data = data_low;
+       column_parity = 0;
+
+       for(i=0; i<4; i++) {
+               line_parity = 0;
+               for(j=0; j<8; j++) {
+                       line_parity ^= data;
+                       column_parity ^= (data & 1) << j;
+                       *forward_ptr++ = data;
+                       data >>= 1;
+               }
+               *forward_ptr++ = line_parity;
+               if(i == 1)
+                       data = data_hi;
+       }
+
+       for(j=0; j<8; j++) {
+               *forward_ptr++ = column_parity;
+               column_parity >>= 1;
+       }
+       *forward_ptr = 0;
+
+       return 45; //return number of emited bits

 }
 
 //====================================================================
 }
 
 //====================================================================


@@ -1850,90 +1645,70 @@ uint8_t Prepare_Data( uint16_t data_low, uint16_t data_hi) {
 // fwd_bit_count set with number of bits to be sent
 //====================================================================
 void SendForward(uint8_t fwd_bit_count) {
 // fwd_bit_count set with number of bits to be sent
 //====================================================================
 void SendForward(uint8_t fwd_bit_count) {

-  
-  fwd_write_ptr = forwardLink_data;
-  fwd_bit_sz = fwd_bit_count;
-  
-  LED_D_ON();
-  
-  //Field on
-  FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-  FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-  FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-  
-  // Give it a bit of time for the resonant antenna to settle.
-  // And for the tag to fully power up
-  SpinDelay(150);
-  
-  // force 1st mod pulse (start gap must be longer for 4305)
-  fwd_bit_sz--; //prepare next bit modulation
-  fwd_write_ptr++;
-  FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-  SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
-  FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-  FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
-  SpinDelayUs(16*8); //16 cycles on (8us each)
-  
-  // now start writting
-  while(fwd_bit_sz-- > 0) { //prepare next bit modulation
-    if(((*fwd_write_ptr++) & 1) == 1)
-      SpinDelayUs(32*8); //32 cycles at 125Khz (8us each)
-    else {
-      //These timings work for 4469/4269/4305 (with the 55*8 above)
-      FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-      SpinDelayUs(23*8); //16-4 cycles off (8us each)
-      FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-      FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
-      SpinDelayUs(9*8); //16 cycles on (8us each)
-    }
-  }
-}

 
 

+       fwd_write_ptr = forwardLink_data;
+       fwd_bit_sz = fwd_bit_count;
+
+       LED_D_ON();
+
+       // Set up FPGA, 125kHz
+       LFSetupFPGAForADC(95, true);
+       
+       // force 1st mod pulse (start gap must be longer for 4305)
+       fwd_bit_sz--; //prepare next bit modulation
+       fwd_write_ptr++;
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       WaitUS(55*8); //55 cycles off (8us each)for 4305        // ICEMAN:  problem with (us) clock is  21.3us increments
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
+       WaitUS(16*8); //16 cycles on (8us each) // ICEMAN:  problem with (us) clock is  21.3us increments
+
+       // now start writting
+       while(fwd_bit_sz-- > 0) { //prepare next bit modulation
+               if(((*fwd_write_ptr++) & 1) == 1)
+                       WaitUS(32*8); //32 cycles at 125Khz (8us each)  // ICEMAN:  problem with (us) clock is  21.3us increments
+               else {
+                       //These timings work for 4469/4269/4305 (with the 55*8 above)
+                       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+                       WaitUS(16*8); //16-4 cycles off (8us each)      // ICEMAN:  problem with (us) clock is  21.3us increments
+                       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
+                       WaitUS(16*8); //16 cycles on (8us each) // ICEMAN:  problem with (us) clock is  21.3us increments
+               }
+       }
+}

 
 void EM4xLogin(uint32_t Password) {
 
 void EM4xLogin(uint32_t Password) {

-  
-  uint8_t fwd_bit_count;
-  
-  forward_ptr = forwardLink_data;
-  fwd_bit_count = Prepare_Cmd( FWD_CMD_LOGIN );
-  fwd_bit_count += Prepare_Data( Password&0xFFFF, Password>>16 );
-  
-  SendForward(fwd_bit_count);
-  
-  //Wait for command to complete
-  SpinDelay(20);
-  
+
+       uint8_t fwd_bit_count;
+       forward_ptr = forwardLink_data;
+       fwd_bit_count = Prepare_Cmd( FWD_CMD_LOGIN );
+       fwd_bit_count += Prepare_Data( Password&0xFFFF, Password>>16 );
+       SendForward(fwd_bit_count);
+
+       //Wait for command to complete
+       WaitMS(20);

 }
 
 void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 }
 
 void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {

-  
-       uint8_t *dest =  get_bigbufptr_recvrespbuf();
-       uint16_t bufferlength = 12000;
+
+       uint8_t fwd_bit_count;
+       uint8_t *dest = BigBuf_get_addr();
+       uint16_t bufsize = BigBuf_max_traceLen();  // ICEMAN: this tries to fill up all tracelog space

        uint32_t i = 0;
 
        uint32_t i = 0;
 

-       // Clear destination buffer before sending the command  0x80 = average.
-       memset(dest, 0x80, bufferlength);
+       // Clear destination buffer before sending the command
+       BigBuf_Clear_ext(false);

        
        

-       uint8_t fwd_bit_count;
-  

        //If password mode do login
        if (PwdMode == 1) EM4xLogin(Pwd);
        //If password mode do login
        if (PwdMode == 1) EM4xLogin(Pwd);

-  
+

        forward_ptr = forwardLink_data;
        fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
        fwd_bit_count += Prepare_Addr( Address );
        forward_ptr = forwardLink_data;
        fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
        fwd_bit_count += Prepare_Addr( Address );

-  
-       // Connect the A/D to the peak-detected low-frequency path.
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
-  
+

        SendForward(fwd_bit_count);
        SendForward(fwd_bit_count);

-  
-       // // Turn field on to read the response
-       // TurnReadLFOn();
-       
+

        // Now do the acquisition
        // Now do the acquisition

+       // ICEMAN, change to the one in lfsampling.c

        i = 0;
        for(;;) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
        i = 0;
        for(;;) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {


@@ -1942,31 +1717,31 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
                        ++i;
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
                        ++i;

-                       if (i >= bufferlength) break;
+                       if (i >= bufsize) break;

                }
        }
                }
        }

-  
+
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off    

        cmd_send(CMD_ACK,0,0,0,0,0);
        cmd_send(CMD_ACK,0,0,0,0,0);

-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off

        LED_D_OFF();
 }
 
 void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
        LED_D_OFF();
 }
 
 void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {

-  
-  uint8_t fwd_bit_count;
-  
-  //If password mode do login
-  if (PwdMode == 1) EM4xLogin(Pwd);
-  
-  forward_ptr = forwardLink_data;
-  fwd_bit_count = Prepare_Cmd( FWD_CMD_WRITE );
-  fwd_bit_count += Prepare_Addr( Address );
-  fwd_bit_count += Prepare_Data( Data&0xFFFF, Data>>16 );
-  
-  SendForward(fwd_bit_count);
-  
-  //Wait for write to complete
-  SpinDelay(20);
-  FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-  LED_D_OFF();
+
+       uint8_t fwd_bit_count;
+
+       //If password mode do login
+       if (PwdMode == 1) EM4xLogin(Pwd);
+
+       forward_ptr = forwardLink_data;
+       fwd_bit_count = Prepare_Cmd( FWD_CMD_WRITE );
+       fwd_bit_count += Prepare_Addr( Address );
+       fwd_bit_count += Prepare_Data( Data&0xFFFF, Data>>16 );
+
+       SendForward(fwd_bit_count);
+
+       //Wait for write to complete
+       WaitMS(20);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       LED_D_OFF();

 }
 }