add lf PAC/Stanley tag read (#354)

[proxmark3-svn] / armsrc / fpgaloader.h

diff --git a/armsrc/fpgaloader.h b/armsrc/fpgaloader.h
index 6981b216d1222ec9cfe910b5ca868301e3eaae7b..59c07ed89a5c391c5d8157d28df2f49dc9bc25f1 100644 (file)
--- a/armsrc/fpgaloader.h
+++ b/armsrc/fpgaloader.h
@@ -17,10 +17,19 @@ void FpgaGatherVersion(int bitstream_version, char *dst, int len);
 void FpgaSetupSsc(void);
 void SetupSpi(int mode);
 bool FpgaSetupSscDma(uint8_t *buf, int len);
+void Fpga_print_status();
+int FpgaGetCurrent();
 #define FpgaDisableSscDma(void)        AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
 #define FpgaEnableSscDma(void) AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;
 void SetAdcMuxFor(uint32_t whichGpio);
 
+// definitions for multiple FPGA config files support
+#define FPGA_BITSTREAM_MAX 2   // the total number of FPGA bitstreams (configs)
+#define FPGA_BITSTREAM_ERR 0
+#define FPGA_BITSTREAM_LF 1
+#define FPGA_BITSTREAM_HF 2
+
+
 // Definitions for the FPGA commands.
 #define FPGA_CMD_SET_CONFREG                                           (1<<12)
 #define FPGA_CMD_SET_DIVISOR                                           (2<<12)
@@ -35,6 +44,7 @@ void SetAdcMuxFor(uint32_t whichGpio);
 #define FPGA_MAJOR_MODE_HF_READER_RX_XCORR                     (1<<5)
 #define FPGA_MAJOR_MODE_HF_SIMULATOR                           (2<<5)
 #define FPGA_MAJOR_MODE_HF_ISO14443A                           (3<<5)
+#define FPGA_MAJOR_MODE_HF_SNOOP                               (4<<5)
 // BOTH
 #define FPGA_MAJOR_MODE_OFF                                                    (7<<5)
 // Options for LF_ADC
@@ -48,7 +58,6 @@ void SetAdcMuxFor(uint32_t whichGpio);
 // Options for the HF reader, correlating against rx from tag
 #define FPGA_HF_READER_RX_XCORR_848_KHZ                                (1<<0)
 #define FPGA_HF_READER_RX_XCORR_SNOOP                          (1<<1)
-#define FPGA_HF_READER_RX_XCORR_QUARTER_FREQ           (1<<2)
 // Options for the HF simulated tag, how to modulate
 #define FPGA_HF_SIMULATOR_NO_MODULATION                                (0<<0)
 #define FPGA_HF_SIMULATOR_MODULATE_BPSK                                (1<<0)