AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
/* TAG_FRAME_WAIT -> shift by 2 */
- legic_prng_forward(2);
+ legic_prng_forward(3);
response ^= legic_prng_get_bits(bits);
/* Wait for the frame start */
COIL_PULSE(0);
// log
- uint8_t cmdbytes[] = {cmd_sz, BYTEx(cmd, 0), BYTEx(cmd, 1), BYTEx(cmd, 2), BYTEx(send, 0), BYTEx(send, 1) };
+ uint8_t cmdbytes[] = {bits, BYTEx(data,0), BYTEx(data,1), BYTEx(data,2), BYTEx(send,0), BYTEx(send,1), BYTEx(send,2)};
LogTrace(cmdbytes, sizeof(cmdbytes), starttime, GET_TICKS, NULL, TRUE);
}
return current_frame.data;
}
-static void LegicCommonInit(void) {
+void LegicCommonInit(bool clear_mem) {
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
// reserve a cardmem, meaning we can use the tracelog function in bigbuff easier.
cardmem = BigBuf_get_EM_addr();
- memset(cardmem, 0x00, LEGIC_CARD_MEMSIZE);
+ if ( clear_mem )
+ memset(cardmem, 0x00, LEGIC_CARD_MEMSIZE);
clear_trace();
set_tracing(TRUE);
bool legic_write_byte(uint16_t index, uint8_t byte, uint8_t addr_sz) {
bool isOK = false;
- uint8_t i = 80, edges = 0;
+ int8_t i = 40;
+ uint8_t edges = 0;
uint8_t cmd_sz = addr_sz+1+8+4; //crc+data+cmd;
uint32_t steps = 0, next_bit_at, start, crc, old_level = 0;
- /*
- crc_clear(&legic_crc);
- crc_update(&legic_crc, 0, 1); // CMD_WRITE
- crc_update(&legic_crc, index, addr_sz);
- crc_update(&legic_crc, byte, 8);
- uint32_t crc = crc_finish(&legic_crc);
- */
crc = legic4Crc(LEGIC_WRITE, index, byte, addr_sz+1);
// send write command
- uint32_t cmd;
- cmd = ((crc & 0xF ) << (addr_sz+1+8)); // CRC
- cmd |= byte << (addr_sz+1); // Data
- cmd |= ((index & 0xFF) << 1); // index
- cmd |= LEGIC_WRITE; // CMD
-
- /* Bitbang the response */
- SHORT_COIL;
- AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
+ uint32_t cmd = LEGIC_WRITE;
+ cmd |= index << 1; // index
+ cmd |= byte << (addr_sz+1); // Data
+ cmd |= (crc & 0xF ) << (addr_sz+1+8); // CRC
- WaitTicks(330);
+ WaitTicks(240);
frame_sendAsReader(cmd, cmd_sz);
// ACK, - one single "1" bit after 3.6ms
// 3.6ms = 3600us * 1.5 = 5400ticks.
- WaitTicks(5000);
- //WaitTicks(330);
+ WaitTicks(5400);
next_bit_at = GET_TICKS + TAG_BIT_PERIOD;
goto OUT;
}
}
-
+
OUT: ;
- // log
- uint8_t cmdbytes[] = {cmd_sz, isOK, BYTEx(steps, 0), BYTEx(steps, 1) };
+ legic_prng_forward(1);
+
+ uint8_t cmdbytes[] = {1, isOK, BYTEx(steps, 0), BYTEx(steps, 1) };
LogTrace(cmdbytes, sizeof(cmdbytes), start, GET_TICKS, NULL, FALSE);
return isOK;
}
uint8_t isOK = 1;
legic_card_select_t card;
- LegicCommonInit();
+ LegicCommonInit(TRUE);
if ( legic_select_card_iv(&card, iv) ) {
isOK = 0;
goto OUT;
}
- if (len + offset >= card.cardsize)
+ if (len + offset > card.cardsize)
len = card.cardsize - offset;
LED_B_ON();
void LegicRfWriter(uint16_t offset, uint16_t len, uint8_t iv, uint8_t *data) {
#define LOWERLIMIT 4
- uint8_t isOK = 1;
+ uint8_t isOK = 1, msg = 0;
legic_card_select_t card;
// uid NOT is writeable.
goto OUT;
}
- LegicCommonInit();
+ LegicCommonInit(TRUE);
if ( legic_select_card_iv(&card, iv) ) {
isOK = 0;
+ msg = 1;
goto OUT;
}
- if ( len + offset + LOWERLIMIT >= card.cardsize) {
- isOK = 0;
- goto OUT;
- }
+ if ( len + offset > card.cardsize)
+ len = card.cardsize - offset;
LED_B_ON();
while( len > 0 ) {
-
- if ( !legic_write_byte( len + offset + LOWERLIMIT, data[len-1], card.addrsize) ) {
- Dbprintf("operation failed @ 0x%03.3x", len-1);
+ --len;
+ if ( !legic_write_byte( len + offset, data[len], card.addrsize) ) {
+ Dbprintf("operation failed | %02X | %02X | %02X", len + offset, len, data[len] );
isOK = 0;
goto OUT;
}
- --len;
WDT_HIT();
}
OUT:
- cmd_send(CMD_ACK, isOK, 0,0,0,0);
+ cmd_send(CMD_ACK, isOK, msg,0,0,0);
switch_off_tag_rwd();
LEDsoff();
}
uint8_t buf[sizeof(legic_card_select_t)] = {0x00};
legic_card_select_t *card = (legic_card_select_t*) buf;
- LegicCommonInit();
+ LegicCommonInit(FALSE);
if ( legic_select_card(card) ) {
cmd_send(CMD_ACK,0,0,0,0,0);
// log
//uint8_t cmdbytes[] = {bits, BYTEx(data, 0), BYTEx(data, 1)};
//LogTrace(cmdbytes, sizeof(cmdbytes), starttime, GET_TICKS, NULL, FALSE);
-
- cardmem = BigBuf_get_EM_addr();
-
+ Dbprintf("ICE: enter frame_handle_tag: %02x ", f->bits);
+
/* First Part of Handshake (IV) */
if(f->bits == 7) {
LED_C_ON();
// Reset prng timer
- ResetTimer(prng_timer);
+ //ResetTimer(prng_timer);
+ ResetTicks();
// IV from reader.
legic_prng_init(f->data);
+ Dbprintf("ICE: IV: %02x ", f->data);
+
// We should have three tagtypes with three different answers.
- frame_send_tag(0x3d, 6); /* 0x3d^0x26 = 0x1B */
+ legic_prng_forward(2);
+ //frame_send_tag(0x3d, 6); /* MIM1024 0x3d^0x26 = 0x1B */
+ frame_send_tag(0x1d, 6); // MIM256
legic_state = STATE_IV;
legic_read_count = 0;
legic_prng_bc = 0;
legic_prng_iv = f->data;
-
- ResetTimer(timer);
- WaitUS(280);
+ //ResetTimer(timer);
+ //WaitUS(280);
+ WaitTicks(388);
return;
}
if((f->bits == 6) && (f->data == xored)) {
legic_state = STATE_CON;
- ResetTimer(timer);
- WaitUS(200);
+ //ResetTimer(timer);
+
+ //WaitUS(200);
+ WaitTicks(300);
return;
} else {
uint16_t addr = f->data ^ key;
addr >>= 1;
uint8_t data = cardmem[addr];
- int hash = legic4Crc(LEGIC_READ, addr, data, 11) << 8;
+
+ uint32_t crc = legic4Crc(LEGIC_READ, addr, data, 11) << 8;
- legic_read_count++;
- legic_prng_forward(legic_reqresp_drift);
+ //legic_read_count++;
+ //legic_prng_forward(legic_reqresp_drift);
- frame_send_tag(hash | data, 12);
- ResetTimer(timer);
+ frame_send_tag(crc | data, 12);
+ //ResetTimer(timer);
legic_prng_forward(2);
WaitTicks(330);
return;
}
/* Write */
- if(f->bits == 23) {
+ if (f->bits == 23 || f->bits == 21 ) {
uint32_t key = get_key_stream(-1, 23); //legic_frame_drift, 23);
uint16_t addr = f->data ^ key;
addr >>= 1;
legic_state = STATE_DISCON;
LED_C_OFF();
Dbprintf("write - addr: %x, data: %x", addr, data);
- // should send a ACK within 3.5ms too
+ // should send a ACK after 3.6ms
return;
}
Dbprintf("IV: %03.3x", legic_prng_iv);
}
- legic_state = STATE_DISCON;
- legic_read_count = 0;
- SpinDelay(10);
- LED_C_OFF();
- return;
+ legic_state = STATE_DISCON;
+ legic_read_count = 0;
+ WaitMS(10);
+ LED_C_OFF();
+ return;
}
/* Read bit by bit untill full frame is received
*/
static void emit(int bit) {
+ Dbprintf("ICE: enter emit:");
switch (bit) {
case 1:
frame_append_bit(¤t_frame, 1);
* measure the time between two rising edges on DIN, and no encoding on the
* subcarrier from card to reader, so we'll just shift out our verbatim data
* on DOUT, 1 bit is 100us. The time from reader to card frame is still unclear,
- * seems to be 300us-ish.
+ * seems to be 330us.
*/
int old_level = 0, active = 0;
+ volatile uint32_t level = 0;
+
legic_state = STATE_DISCON;
-
legic_phase_drift = phase;
legic_frame_drift = frame;
legic_reqresp_drift = reqresp;
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+
+ /* to get the stream of bits from FPGA in sim mode.*/
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
+ FpgaSetupSsc();
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K);
/* Bitbang the receiver */
- LINE_IN;
+// LINE_IN;
+ AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
+ AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
// need a way to determine which tagtype we are simulating
DbpString("Starting Legic emulator, press button to end");
while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
- volatile uint32_t level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
+
+ level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
uint32_t time = GET_TICKS;
}
/* Frame end */
- if(time >= (RWD_TIME_1+RWD_TIME_FUZZ) && active) {
+ if(time >= (RWD_TIME_1 + RWD_TIME_FUZZ) && active) {
emit(-1);
active = 0;
LED_A_OFF();
* shutdown in its status register. Reading the SR has the
* side-effect of clearing any pending state in there.
*/
- if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA))
- StopTicks();
+ //if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA))
+ //if(time >= (20 * RWD_TIME_1) )
+ //StopTicks();
old_level = level;
WDT_HIT();
}
WDT_HIT();
+ DbpString("LEGIC Prime emulator stopped");
switch_off_tag_rwd();
LEDsoff();
cmd_send(CMD_ACK, 1, 0, 0, 0, 0);
projects / proxmark3-svn / blobdiff