- // Transmit the response.
- for(uint16_t i = 0; i < len;) {
- if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
- AT91C_BASE_SSC->SSC_THR = response[i];
- ++i;
- }
+ while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) {};
+
+ b = AT91C_BASE_SSC->SSC_RHR; (void) b;
+
+ // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
+ for (uint8_t j = 0; j < 5; j++) { // allow timeout - better late than never
+ while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
+ if (AT91C_BASE_SSC->SSC_RHR) break;
+ }
+
+ // Clear TXRDY:
+ //AT91C_BASE_SSC->SSC_THR = 0xFF;
+}
+
+void WaitForFpgaDelayQueueIsEmpty( uint16_t delay ){
+ // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
+ uint8_t fpga_queued_bits = delay >> 3; // twich /8 ?? >>3,
+ for (uint8_t i = 0; i <= fpga_queued_bits/8 + 1; ) {
+ if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
+ AT91C_BASE_SSC->SSC_THR = 0xFF;
+ i++;
+ }
+ }
+}
+
+static void TransmitFor14443b_AsTag( uint8_t *response, uint16_t len) {
+
+ volatile uint32_t b;
+
+ // Signal field is off with the appropriate LED
+ LED_D_OFF();
+ //uint16_t fpgasendQueueDelay = 0;
+
+ // Modulate BPSK
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
+ SpinDelay(40);
+
+ ClearFpgaShiftingRegisters();
+
+ FpgaSetupSsc();
+
+ // Transmit the response.
+ for(uint16_t i = 0; i < len;) {
+ if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+ AT91C_BASE_SSC->SSC_THR = response[++i];
projects / proxmark3-svn / blobdiff