-
-//-----------------------------------------------------------------------------
-// Legic Simulator
-//-----------------------------------------------------------------------------
-
-static void setup_timer(void)
-{
- /* Set up Timer 1 to use for measuring time between pulses. Since we're bit-banging
- * this it won't be terribly accurate but should be good enough.
- */
- AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1);
- timer = AT91C_BASE_TC1;
- timer->TC_CCR = AT91C_TC_CLKDIS;
- timer->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK;
- timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
-
- /*
- * Set up Timer 2 to use for measuring time between frames in
- * tag simulation mode. Runs 4x faster as Timer 1
- */
- AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC2);
- prng_timer = AT91C_BASE_TC2;
- prng_timer->TC_CCR = AT91C_TC_CLKDIS;
- prng_timer->TC_CMR = AT91C_TC_CLKS_TIMER_DIV2_CLOCK;
- prng_timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
-}
-
-/* Generate Keystream */
-static uint32_t get_key_stream(int skip, int count)
-{
- uint32_t key=0; int i;
-
- /* Use int to enlarge timer tc to 32bit */
- legic_prng_bc += prng_timer->TC_CV;
- prng_timer->TC_CCR = AT91C_TC_SWTRG;
-
- /* If skip == -1, forward prng time based */
- if(skip == -1) {
- i = (legic_prng_bc+SIM_SHIFT)/SIM_DIVISOR; /* Calculate Cycles based on timer */
- i -= legic_prng_count(); /* substract cycles of finished frames */
- i -= count; /* substract current frame length, rewidn to bedinning */
- legic_prng_forward(i);
- } else {
- legic_prng_forward(skip);
- }
-
- /* Write Time Data into LOG */
- uint8_t *BigBuf = BigBuf_get_addr();
- if(count == 6) { i = -1; } else { i = legic_read_count; }
- BigBuf[OFFSET_LOG+128+i] = legic_prng_count();
- BigBuf[OFFSET_LOG+256+i*4] = (legic_prng_bc >> 0) & 0xff;
- BigBuf[OFFSET_LOG+256+i*4+1] = (legic_prng_bc >> 8) & 0xff;
- BigBuf[OFFSET_LOG+256+i*4+2] = (legic_prng_bc >>16) & 0xff;
- BigBuf[OFFSET_LOG+256+i*4+3] = (legic_prng_bc >>24) & 0xff;
- BigBuf[OFFSET_LOG+384+i] = count;
-
- /* Generate KeyStream */
- for(i=0; i<count; i++) {
- key |= legic_prng_get_bit() << i;
- legic_prng_forward(1);
- }
- return key;
-}
-
-/* Send a frame in tag mode, the FPGA must have been set up by
- * LegicRfSimulate
- */
-static void frame_send_tag(uint16_t response, int bits, int crypt)
-{
- /* Bitbang the response */
- AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
- AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
- AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
-
- /* Use time to crypt frame */
- if(crypt) {
- legic_prng_forward(2); /* TAG_TIME_WAIT -> shift by 2 */
- int i; int key = 0;
- for(i=0; i<bits; i++) {
- key |= legic_prng_get_bit() << i;
- legic_prng_forward(1);
- }
- //Dbprintf("key = 0x%x", key);
- response = response ^ key;
- }
-
- /* Wait for the frame start */
- while(timer->TC_CV < (TAG_FRAME_WAIT - 30)) ;
-
- int i;
- for(i=0; i<bits; i++) {
- int nextbit = timer->TC_CV + TAG_BIT_PERIOD;
- int bit = response & 1;
- response = response >> 1;
- if(bit) {
- AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT;
- } else {
- AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
- }
- while(timer->TC_CV < nextbit) ;
- }
- AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT;
-}
-
-static void frame_append_bit(struct legic_frame * const f, int bit)
-{
- if(f->bits >= 31) {
- return; /* Overflow, won't happen */
- }
- f->data |= (bit<<f->bits);
- f->bits++;
-}
-
-static void frame_clean(struct legic_frame * const f)
-{
- f->data = 0;
- f->bits = 0;
-}
-
-/* Handle (whether to respond) a frame in tag mode */
-static void frame_handle_tag(struct legic_frame const * const f)
-{
- uint8_t *BigBuf = BigBuf_get_addr();
-
- /* First Part of Handshake (IV) */
- if(f->bits == 7) {
- if(f->data == SESSION_IV) {
- LED_C_ON();
- prng_timer->TC_CCR = AT91C_TC_SWTRG;
- legic_prng_init(f->data);
- frame_send_tag(0x3d, 6, 1); /* 0x3d^0x26 = 0x1b */
- legic_state = STATE_IV;
- legic_read_count = 0;
- legic_prng_bc = 0;
- legic_prng_iv = f->data;
-
- /* TIMEOUT */
- timer->TC_CCR = AT91C_TC_SWTRG;
- while(timer->TC_CV > 1);
- while(timer->TC_CV < 280);
- return;
- } else if((prng_timer->TC_CV % 50) > 40) {
- legic_prng_init(f->data);
- frame_send_tag(0x3d, 6, 1);
- SpinDelay(20);
- return;
- }
- }
-
- /* 0x19==??? */
- if(legic_state == STATE_IV) {
- if((f->bits == 6) && (f->data == (0x19 ^ get_key_stream(1, 6)))) {
- legic_state = STATE_CON;
-
- /* TIMEOUT */
- timer->TC_CCR = AT91C_TC_SWTRG;
- while(timer->TC_CV > 1);
- while(timer->TC_CV < 200);
- return;
- } else {
- legic_state = STATE_DISCON;
- LED_C_OFF();
- Dbprintf("0x19 - Frame: %03.3x", f->data);
- return;
- }
- }
-
- /* Read */
- if(f->bits == 11) {
- if(legic_state == STATE_CON) {
- int key = get_key_stream(-1, 11); //legic_phase_drift, 11);
- int addr = f->data ^ key; addr = addr >> 1;
- int data = BigBuf[addr];
- int hash = calc_crc4(addr, data, 11) << 8;
- BigBuf[OFFSET_LOG+legic_read_count] = (uint8_t)addr;
- legic_read_count++;
-
- //Dbprintf("Data:%03.3x, key:%03.3x, addr: %03.3x, read_c:%u", f->data, key, addr, read_c);
- legic_prng_forward(legic_reqresp_drift);
-
- frame_send_tag(hash | data, 12, 1);
-
- /* SHORT TIMEOUT */
- timer->TC_CCR = AT91C_TC_SWTRG;
- while(timer->TC_CV > 1);
- legic_prng_forward(legic_frame_drift);
- while(timer->TC_CV < 180);
- return;
- }
- }
-
- /* Write */
- if(f->bits == 23) {
- int key = get_key_stream(-1, 23); //legic_frame_drift, 23);
- int addr = f->data ^ key; addr = addr >> 1; addr = addr & 0x3ff;
- int data = f->data ^ key; data = data >> 11; data = data & 0xff;
-
- /* write command */
- legic_state = STATE_DISCON;
- LED_C_OFF();
- Dbprintf("write - addr: %x, data: %x", addr, data);
- return;
- }
-
- if(legic_state != STATE_DISCON) {
- Dbprintf("Unexpected: sz:%u, Data:%03.3x, State:%u, Count:%u", f->bits, f->data, legic_state, legic_read_count);
- int i;
- Dbprintf("IV: %03.3x", legic_prng_iv);
- for(i = 0; i<legic_read_count; i++) {
- Dbprintf("Read Nb: %u, Addr: %u", i, BigBuf[OFFSET_LOG+i]);
- }
-
- for(i = -1; i<legic_read_count; i++) {
- uint32_t t;
- t = BigBuf[OFFSET_LOG+256+i*4];
- t |= BigBuf[OFFSET_LOG+256+i*4+1] << 8;
- t |= BigBuf[OFFSET_LOG+256+i*4+2] <<16;
- t |= BigBuf[OFFSET_LOG+256+i*4+3] <<24;
-
- Dbprintf("Cycles: %u, Frame Length: %u, Time: %u",
- BigBuf[OFFSET_LOG+128+i],
- BigBuf[OFFSET_LOG+384+i],
- t);
- }
- }
- legic_state = STATE_DISCON;
- legic_read_count = 0;
- SpinDelay(10);
- LED_C_OFF();
- return;
-}
-
-/* Read bit by bit untill full frame is received
- * Call to process frame end answer
- */
-static void emit(int bit)
-{
- if(bit == -1) {
- if(current_frame.bits <= 4) {
- frame_clean(¤t_frame);
- } else {
- frame_handle_tag(¤t_frame);
- frame_clean(¤t_frame);
- }
- WDT_HIT();
- } else if(bit == 0) {
- frame_append_bit(¤t_frame, 0);
- } else if(bit == 1) {
- frame_append_bit(¤t_frame, 1);
- }
-}
-
-void LegicRfSimulate(int phase, int frame, int reqresp)
-{
- /* ADC path high-frequency peak detector, FPGA in high-frequency simulator mode,
- * modulation mode set to 212kHz subcarrier. We are getting the incoming raw
- * envelope waveform on DIN and should send our response on DOUT.
- *
- * The LEGIC RF protocol is pulse-pause-encoding from reader to card, so we'll
- * measure the time between two rising edges on DIN, and no encoding on the
- * subcarrier from card to reader, so we'll just shift out our verbatim data
- * on DOUT, 1 bit is 100us. The time from reader to card frame is still unclear,
- * seems to be 300us-ish.
- */
-
- if(phase < 0) {
- int i;
- for(i=0; i<=reqresp; i++) {
- legic_prng_init(SESSION_IV);
- Dbprintf("i=%u, key 0x%3.3x", i, get_key_stream(i, frame));
- }
- return;
- }
-
- legic_phase_drift = phase;
- legic_frame_drift = frame;
- legic_reqresp_drift = reqresp;
-
- FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
- SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
- FpgaSetupSsc();
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K);
-
- /* Bitbang the receiver */
- AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
- AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
-
- setup_timer();
- crc_init(&legic_crc, 4, 0x19 >> 1, 0x5, 0);
-
- int old_level = 0;
- int active = 0;
- legic_state = STATE_DISCON;
-
- LED_B_ON();
- DbpString("Starting Legic emulator, press button to end");
- while(!BUTTON_PRESS()) {
- int level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
- int time = timer->TC_CV;
-
- if(level != old_level) {
- if(level == 1) {
- timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
- if(FUZZ_EQUAL(time, RWD_TIME_1, RWD_TIME_FUZZ)) {
- /* 1 bit */
- emit(1);
- active = 1;
- LED_A_ON();
- } else if(FUZZ_EQUAL(time, RWD_TIME_0, RWD_TIME_FUZZ)) {
- /* 0 bit */
- emit(0);
- active = 1;
- LED_A_ON();
- } else if(active) {
- /* invalid */
- emit(-1);
- active = 0;
- LED_A_OFF();
- }
- }
- }
-
- if(time >= (RWD_TIME_1+RWD_TIME_FUZZ) && active) {
- /* Frame end */
- emit(-1);
- active = 0;
- LED_A_OFF();
- }
-
- if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA)) {
- timer->TC_CCR = AT91C_TC_CLKDIS;
- }
-
- old_level = level;
- WDT_HIT();
- }
- DbpString("Stopped");
- LED_B_OFF();
- LED_A_OFF();
- LED_C_OFF();
-}
-
projects / proxmark3-svn / blobdiff