]> git.zerfleddert.de Git - proxmark3-svn/blobdiff - bootrom/flash-reset.s
FIX: T5555/Q5 datarate when used in "Q" parameter, consequential fix in lf commands...
[proxmark3-svn] / bootrom / flash-reset.s
index 64134033c630c4b8ac1414f2a555a7d5efd76e26..95c8f590cc41af02d16e24b7be0dfed3ff093773 100644 (file)
@@ -1,43 +1,51 @@
-.extern CopyBootToRAM\r
-    \r
-.section .startup,"ax"\r
-         .code 32\r
-         .align 0\r
-\r
-.global flashstart\r
-flashstart:\r
-    b       Reset\r
-    b       UndefinedInstruction\r
-    b       SoftwareInterrupt\r
-    b       PrefetchAbort\r
-    b       DataAbort\r
-    b       Reserved\r
-    b       Irq\r
-    b       Fiq\r
-\r
-Reset:\r
-    ldr     sp,     .stack_end @ initialize stack pointer to top of RAM\r
-    bl      CopyBootToRAM                      @ copy bootloader to RAM (in case the\r
-                                                               @ user re-flashes the bootloader)\r
-    ldr     r3,     .bootphase2_start  @ start address of RAM bootloader\r
-    bx      r3                                         @ jump to it\r
-\r
-       .stack_end:\r
-       .word _stack_end\r
-       .bootphase2_start:\r
-       .word __bootphase2_start__\r
-\r
-Fiq:\r
-    b       Fiq\r
-UndefinedInstruction:\r
-    b       UndefinedInstruction\r
-SoftwareInterrupt:\r
-    b       SoftwareInterrupt\r
-PrefetchAbort:\r
-    b       PrefetchAbort\r
-DataAbort:\r
-    b       DataAbort\r
-Reserved:\r
-    b       Reserved\r
-Irq:\r
-    b       Irq\r
+@-----------------------------------------------------------------------------
+@ This code is licensed to you under the terms of the GNU GPL, version 2 or,
+@ at your option, any later version. See the LICENSE.txt file for the text of
+@ the license.
+@-----------------------------------------------------------------------------
+@ Reset vector for running from FLASH
+@-----------------------------------------------------------------------------
+
+.section .startup,"ax"
+
+.arm
+
+.global flashstart
+flashstart:
+       b       reset
+       b       undefined_instruction
+       b       software_interrupt
+       b       prefetch_abort
+       b       data_abort
+       b       . @reserved
+       ldr     pc, [pc,#-0xF20]        @ IRQ - read the AIC
+       b       fiq
+
+reset:
+       ldr     sp, =_stack_end         @ initialize stack pointer to top of RAM
+
+       @ copy bootloader to RAM (in case the user re-flashes the bootloader)
+       ldr     r0, =__bootphase2_src_start__
+       ldr     r1, =__bootphase2_start__
+       ldr     r2, =__bootphase2_end__
+1:
+       ldr     r3, [r0], #4
+       str     r3, [r1], #4
+       cmp     r1, r2
+       blo     1b
+
+       ldr     r3, =ram_start          @ start address of RAM bootloader
+       bx      r3                      @ jump to it
+
+       .ltorg
+
+undefined_instruction:
+       b       .
+software_interrupt:
+       b       .
+prefetch_abort:
+       b       .
+data_abort:
+       b       .
+fiq:
+       b       .
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