X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/0318894e52a906a0612eb3671860b04f5a9b80ac..a501c82b196b614295a6e3bf7481da84affb0d8e:/armsrc/iso14443.c?ds=sidebyside

diff --git a/armsrc/iso14443.c b/armsrc/iso14443.c
index 5e8eddd2..28ab54d6 100644
--- a/armsrc/iso14443.c
+++ b/armsrc/iso14443.c
@@ -10,12 +10,12 @@
 // supported.
 //-----------------------------------------------------------------------------
 
-#include "proxmark3.h"
+#include "../include/proxmark3.h"
 #include "apps.h"
 #include "util.h"
 #include "string.h"
 
-#include "iso14443crc.h"
+#include "../common/iso14443crc.h"
 
 //static void GetSamplesFor14443(int weTx, int n);
 
@@ -350,6 +350,7 @@ void SimulateIso14443Tag(void)
 
     int cmdsRecvd = 0;
 
+    FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
     memset(receivedCmd, 0x44, 400);
 
     CodeIso14443bAsTag(response1, sizeof(response1));
@@ -400,8 +401,7 @@ void SimulateIso14443Tag(void)
         // Modulate BPSK
         // Signal field is off with the appropriate LED
         LED_D_OFF();
-        FpgaWriteConfWord(
-        	FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
+        FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_BPSK);
         AT91C_BASE_SSC->SSC_THR = 0xff;
         FpgaSetupSsc();
 
@@ -867,6 +867,7 @@ void ReadSTMemoryIso14443(uint32_t dwLast)
 {
     uint8_t i = 0x00;
 
+    FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
     // Make sure that we start from off, since the tags are stateful;
     // confusing things will happen if we don't reset them between reads.
     LED_D_OFF();
@@ -1011,6 +1012,7 @@ void RAMFUNC SnoopIso14443(void)
     // response from the tag.
     int triggered = TRUE;
 
+    FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
     // The command (reader -> tag) that we're working on receiving.
     uint8_t *receivedCmd = (uint8_t *)(BigBuf) + DEMOD_TRACE_SIZE;
     // The response (tag -> reader) that we're working on receiving.
@@ -1196,6 +1198,7 @@ done:
 
 void SendRawCommand14443B(uint32_t datalen, uint32_t recv,uint8_t powerfield, uint8_t data[])
 {
+    FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
     if(!powerfield)
     {
         // Make sure that we start from off, since the tags are stateful;