X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/1b2c8936326aa0f31912da76dff96a24102a2711..19a700a8b54f948623cb35f6f297dc03601f9950:/armsrc/ldscript

diff --git a/armsrc/ldscript b/armsrc/ldscript
index cc5ce4e0..d0be3b6a 100644
--- a/armsrc/ldscript
+++ b/armsrc/ldscript
@@ -1,41 +1,70 @@
-INCLUDE ../common/ldscript.common
-
-ENTRY(Vector)
-SECTIONS
-{
-	.fpgaimage : {
-		*(fpga_bit.data)
-	} >fpgaimage
-	.start : { *(.startos) } >osimage
-	.text : { 
-		*(.text)
-		*(.text.*)
-		*(.eh_frame)
-		*(.glue_7)
-		*(.glue_7t)
-		*(.rodata) 
-		*(.rodata*) 
-		*(.version_information)
-	} >osimage
-	__end_of_text__ = .;
-	
-	.data : {
-		__data_start__ = .;
-		__data_src_start__ = __end_of_text__; 
-		*(.data)
-		*(.data.*)
-		__data_end__ = .;
-	} >ram AT>osimage
-	
-	.bss : {
-		__bss_start__ = .; 
-		*(.bss)
-		*(.bss.*) 
-	} >ram
-	. = ALIGN(32 / 8);
-	__bss_end__ = .;
-
-    	.commonarea (NOLOAD) : {
-    		*(.commonarea)
-    	} >commonarea
-}
+/*
+-----------------------------------------------------------------------------
+ This code is licensed to you under the terms of the GNU GPL, version 2 or,
+ at your option, any later version. See the LICENSE.txt file for the text of
+ the license.
+-----------------------------------------------------------------------------
+ Linker script for the ARM binary
+-----------------------------------------------------------------------------
+*/
+INCLUDE ../common/ldscript.common
+
+PHDRS
+{
+	fpgaimage PT_LOAD FLAGS(4);
+	text PT_LOAD;
+	data PT_LOAD;
+	bss PT_LOAD;
+}
+
+ENTRY(Vector)
+SECTIONS
+{
+	.fpgaimage : {
+		*(fpga_lf_bit.data)
+		*(fpga_hf_bit.data)
+	} >fpgaimage :fpgaimage
+
+	.start : {
+		*(.startos)
+	} >osimage :text
+
+	.text : {
+		*(.text)
+		*(.text.*)
+		*(.eh_frame)
+		*(.glue_7)
+		*(.glue_7t)
+	} >osimage :text
+
+	.rodata : {
+		*(.rodata)
+		*(.rodata.*)
+		KEEP(*(.version_information))
+	} >osimage :text
+
+	. = ALIGN(4);
+
+	.data : {
+		*(.data)
+		*(.data.*)
+		*(.ramfunc)
+		. = ALIGN(4);
+	} >ram AT>osimage :data
+
+	__data_src_start__ = LOADADDR(.data);
+	__data_start__ = ADDR(.data);
+	__data_end__ = __data_start__ + SIZEOF(.data);
+	
+	.bss : {
+		__bss_start__ = .; 
+		*(.bss)
+		*(.bss.*) 
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} >ram AT>ram :bss
+
+	.commonarea (NOLOAD) : {
+		*(.commonarea)
+	} >commonarea :NONE
+}