X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/1d0ccbe04b6d04cc4e05aeb9bbcb7b7fa0cfdbd1..57e1e31dce70a58da1736b9579a869c1df313a13:/armsrc/fpgaloader.h diff --git a/armsrc/fpgaloader.h b/armsrc/fpgaloader.h index 35f7e37c..f9fddb11 100644 --- a/armsrc/fpgaloader.h +++ b/armsrc/fpgaloader.h @@ -9,11 +9,21 @@ // Routines to load the FPGA image, and then to configure the FPGA's major // mode once it is configured. //----------------------------------------------------------------------------- +#ifndef __FPGALOADER_H +#define __FPGALOADER_H + +#include "common.h" // standard definitions +#include "proxmark3.h" // common area +//#include "util.h" +#include "string.h" +#include "BigBuf.h" // bigbuf mem +#include "zlib.h" // uncompress void FpgaSendCommand(uint16_t cmd, uint16_t v); void FpgaWriteConfWord(uint8_t v); void FpgaDownloadAndGo(int bitstream_version); void FpgaGatherVersion(int bitstream_version, char *dst, int len); +void FpgaSetupSscExt(uint8_t clearPCER); void FpgaSetupSsc(void); void SetupSpi(int mode); bool FpgaSetupSscDma(uint8_t *buf, int len); @@ -28,7 +38,6 @@ void SetAdcMuxFor(uint32_t whichGpio); #define FPGA_BITSTREAM_LF 1 #define FPGA_BITSTREAM_HF 2 - // Definitions for the FPGA commands. #define FPGA_CMD_SET_CONFREG (1<<12) #define FPGA_CMD_SET_DIVISOR (2<<12) @@ -59,11 +68,12 @@ void SetAdcMuxFor(uint32_t whichGpio); #define FPGA_HF_READER_RX_XCORR_SNOOP (1<<1) #define FPGA_HF_READER_RX_XCORR_QUARTER_FREQ (1<<2) // Options for the HF simulated tag, how to modulate -#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0) -#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0) -#define FPGA_HF_SIMULATOR_MODULATE_212K (2<<0) -#define FPGA_HF_SIMULATOR_MODULATE_424K (4<<0) -#define FPGA_HF_SIMULATOR_MODULATE_424K_8BIT 0x5//101 +#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0) // 0000 +#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0) // 0001 +#define FPGA_HF_SIMULATOR_MODULATE_212K (2<<0) // 0010 +#define FPGA_HF_SIMULATOR_MODULATE_424K (4<<0) // 0100 +#define FPGA_HF_SIMULATOR_MODULATE_424K_8BIT 0x5 // 0101 +// no 848K // Options for ISO14443A #define FPGA_HF_ISO14443A_SNIFFER (0<<0) @@ -71,3 +81,5 @@ void SetAdcMuxFor(uint32_t whichGpio); #define FPGA_HF_ISO14443A_TAGSIM_MOD (2<<0) #define FPGA_HF_ISO14443A_READER_LISTEN (3<<0) #define FPGA_HF_ISO14443A_READER_MOD (4<<0) + +#endif \ No newline at end of file