X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/1d0ccbe04b6d04cc4e05aeb9bbcb7b7fa0cfdbd1..7e735c1398b9c3643d292614db10c7e58c58db85:/armsrc/lfops.c?ds=sidebyside

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 0472122a..28927c33 100644
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -17,56 +17,63 @@
 #include "lfdemod.h"
 #include "lfsampling.h"
 #include "protocols.h"
-#include "usb_cdc.h" //test
+#include "usb_cdc.h" // for usb_poll_validate_length
+
+#ifndef SHORT_COIL
+# define SHORT_COIL()	LOW(GPIO_SSC_DOUT)
+#endif
+#ifndef OPEN_COIL
+# define OPEN_COIL()	HIGH(GPIO_SSC_DOUT)
+#endif
 
 /**
  * Function to do a modulation and then get samples.
  * @param delay_off
- * @param period_0
- * @param period_1
+ * @param periods  0xFFFF0000 is period_0,  0x0000FFFF is period_1
+ * @param useHighFreg
  * @param command
  */
-void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint32_t period_1, uint8_t *command)
+void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t periods, uint32_t useHighFreq, uint8_t *command)
 {
+	/* Make sure the tag is reset */
+	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+	SpinDelay(200);
 
-	int divisor_used = 95; // 125 KHz
-	// see if 'h' was specified
-
-	if (command[strlen((char *) command) - 1] == 'h')
-		divisor_used = 88; // 134.8 KHz
-
+	uint16_t period_0 =  periods >> 16;
+	uint16_t period_1 =  periods & 0xFFFF;
+	
+	// 95 == 125 KHz  88 == 124.8 KHz
+	int divisor_used = (useHighFreq) ? 88 : 95;
 	sample_config sc = { 0,0,1, divisor_used, 0};
 	setSamplingConfig(&sc);
 
-	/* Make sure the tag is reset */
-	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-	SpinDelay(2500);
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
 
 	LFSetupFPGAForADC(sc.divisor, 1);
 
 	// And a little more time for the tag to fully power up
-	SpinDelay(2000);
+	SpinDelay(50);
 
 	// now modulate the reader field
 	while(*command != '\0' && *command != ' ') {
 		FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 		LED_D_OFF();
-		SpinDelayUs(delay_off);
+		WaitUS(delay_off);
 		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor);
 
 		FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 		LED_D_ON();
 		if(*(command++) == '0')
-			SpinDelayUs(period_0);
+			WaitUS(period_0);
 		else
-			SpinDelayUs(period_1);
+			WaitUS(period_1);
 	}
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 	LED_D_OFF();
-	SpinDelayUs(delay_off);
+	WaitUS(delay_off);
 	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor);
-
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
 	// now do the read
@@ -84,6 +91,7 @@ void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint
 */
 void ReadTItag(void)
 {
+	StartTicks();
 	// some hardcoded initial params
 	// when we read a TI tag we sample the zerocross line at 2Mhz
 	// TI tags modulate a 1 as 16 cycles of 123.2Khz
@@ -202,14 +210,14 @@ void ReadTItag(void)
 		crc = update_crc16(crc, (shift1>>16)&0xff);
 		crc = update_crc16(crc, (shift1>>24)&0xff);
 
-		Dbprintf("Info: Tag data: %x%08x, crc=%x",
-				 (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
+		Dbprintf("Info: Tag data: %x%08x, crc=%x", (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
 		if (crc != (shift2&0xffff)) {
 			Dbprintf("Error: CRC mismatch, expected %x", (unsigned int)crc);
 		} else {
 			DbpString("Info: CRC is good");
 		}
 	}
+	StopTicks();
 }
 
 void WriteTIbyte(uint8_t b)
@@ -219,20 +227,20 @@ void WriteTIbyte(uint8_t b)
 	// modulate 8 bits out to the antenna
 	for (i=0; i<8; i++)
 	{
-		if (b&(1<<i)) {
-			// stop modulating antenna
+		if ( b & ( 1 << i ) ) {
+			// stop modulating antenna 1ms
 			LOW(GPIO_SSC_DOUT);
-			SpinDelayUs(1000);
-			// modulate antenna
-			HIGH(GPIO_SSC_DOUT);
-			SpinDelayUs(1000);
+			WaitUS(1000);
+			// modulate antenna 1ms
+			HIGH(GPIO_SSC_DOUT); 
+			WaitUS(1000);
 		} else {
-			// stop modulating antenna
+			// stop modulating antenna 1ms
 			LOW(GPIO_SSC_DOUT);
-			SpinDelayUs(300);
-			// modulate antenna
+			WaitUS(300);
+			// modulate antenna 1m
 			HIGH(GPIO_SSC_DOUT);
-			SpinDelayUs(1700);
+			WaitUS(1700);
 		}
 	}
 }
@@ -269,14 +277,14 @@ void AcquireTiType(void)
 	AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(32) | AT91C_SSC_MSBF;
 	AT91C_BASE_SSC->SSC_TCMR = 0;
 	AT91C_BASE_SSC->SSC_TFMR = 0;
-
+	// iceman, FpgaSetupSsc() ?? the code above? can it be replaced?
 	LED_D_ON();
 
 	// modulate antenna
 	HIGH(GPIO_SSC_DOUT);
 
 	// Charge TI tag for 50ms.
-	SpinDelay(50);
+	WaitMS(50);
 
 	// stop modulating antenna and listen
 	LOW(GPIO_SSC_DOUT);
@@ -316,6 +324,7 @@ void AcquireTiType(void)
 // if not provided a valid crc will be computed from the data and written.
 void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 {
+	StartTicks();
 	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
 	if(crc == 0) {
 		crc = update_crc16(crc, (idlo)&0xff);
@@ -349,12 +358,12 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 	// start by writing 0xBB (keyword) and 0xEB (password)
 	// then write 80 bits of data (or 64 bit data + 16 bit crc if you prefer)
 	// finally end with 0x0300 (write frame)
-	// all data is sent lsb firts
+	// all data is sent lsb first
 	// finish with 15ms programming time
 
 	// modulate antenna
 	HIGH(GPIO_SSC_DOUT);
-	SpinDelay(50);	// charge time
+	WaitMS(50);	// charge time
 
 	WriteTIbyte(0xbb); // keyword
 	WriteTIbyte(0xeb); // password
@@ -371,7 +380,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 	WriteTIbyte(0x00); // write frame lo
 	WriteTIbyte(0x03); // write frame hi
 	HIGH(GPIO_SSC_DOUT);
-	SpinDelay(50);	// programming time
+	WaitMS(50);	// programming time
 
 	LED_A_OFF();
 
@@ -379,62 +388,81 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 	AcquireTiType();
 
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-	DbpString("Now use 'lf ti read' to check");
+	DbpString("Now use `lf ti read` to check");
+	StopTicks();
 }
 
 void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
 {
-	int i;
-	uint8_t *tab = BigBuf_get_addr();
+	int i = 0;
+	uint8_t *buf = BigBuf_get_addr();
 
-	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
+	//FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
+	//FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_TOGGLE_MODE );
+
+	// set frequency,  get values from 'lf config' command
+	sample_config *sc = getSamplingConfig();
 
+	if ( (sc->divisor == 1) || (sc->divisor < 0) || (sc->divisor > 255) )
+		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
+	else if (sc->divisor == 0)
+		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+	else
+		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc->divisor);
+	
+	SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+	
 	AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
 	AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
 	AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
 
- #define SHORT_COIL()	LOW(GPIO_SSC_DOUT)
- #define OPEN_COIL()	HIGH(GPIO_SSC_DOUT)
-
-	i = 0;
+	// power on antenna
+	// OPEN_COIL();
+	// SpinDelay(50);
+		
 	for(;;) {
-		//wait until SSC_CLK goes HIGH
+		WDT_HIT();
+
+		if (ledcontrol) LED_D_ON();
+				
+		// wait until SSC_CLK goes HIGH
+		// used as a simple detection of a reader field?
 		while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
-			if(BUTTON_PRESS() || (usb_poll_validate_length() )) {
-				DbpString("Stopped");
-				return;
-			}
 			WDT_HIT();
+			if ( usb_poll_validate_length() || BUTTON_PRESS() )
+				goto OUT;
 		}
-		if (ledcontrol) LED_D_ON();
-
-		if(tab[i])
+		
+		if(buf[i])
 			OPEN_COIL();
 		else
 			SHORT_COIL();
-
-		if (ledcontrol) LED_D_OFF();
-		
+	
 		//wait until SSC_CLK goes LOW
 		while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
-			if(BUTTON_PRESS()) {
-				DbpString("Stopped");
-				return;
-			}
 			WDT_HIT();
+			if ( usb_poll_validate_length() || BUTTON_PRESS() )
+				goto OUT;
 		}
-
+				
 		i++;
 		if(i == period) {
-
 			i = 0;
 			if (gap) {
+				WDT_HIT();
 				SHORT_COIL();
 				SpinDelayUs(gap);
 			}
 		}
+		
+		if (ledcontrol) LED_D_OFF();
 	}
+OUT: 
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+	LED_D_OFF();
+	DbpString("Simulation stopped");
+	return;	
 }
 
 #define DEBUG_FRAME_CONTENTS 1
@@ -525,7 +553,10 @@ static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt)
 // simulate a HID tag until the button is pressed
 void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
 {
-	int n=0, i=0;
+	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+	set_tracing(FALSE);
+		
+	int n = 0, i = 0;
 	/*
 	 HID tag bitstream format
 	 The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits
@@ -536,7 +567,7 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
 	 nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10)
 	*/
 
-	if (hi>0xFFF) {
+	if (hi > 0xFFF) {
 		DbpString("Tags can only have 44 bits. - USE lf simfsk for larger tags");
 		return;
 	}
@@ -568,7 +599,8 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
 			fc(8,  &n); fc(10, &n);		// high-low transition
 		}
 	}
-
+	WDT_HIT();
+	
 	if (ledcontrol)	LED_A_ON();
 	SimulateTagLowFrequency(n, 0, ledcontrol);
 	if (ledcontrol)	LED_A_OFF();
@@ -579,8 +611,14 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
 // arg1 contains fcHigh and fcLow, arg2 contains invert and clock
 void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 {
-	int ledcontrol=1;
-	int n=0, i=0;
+	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+
+	// free eventually allocated BigBuf memory
+	BigBuf_free(); BigBuf_Clear_ext(false);
+	clear_trace();
+	set_tracing(FALSE);
+	
+	int ledcontrol = 1, n = 0, i = 0;
 	uint8_t fcHigh = arg1 >> 8;
 	uint8_t fcLow = arg1 & 0xFF;
 	uint16_t modCnt = 0;
@@ -588,27 +626,19 @@ void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 	uint8_t invert = (arg2 >> 8) & 1;
 
 	for (i=0; i<size; i++){
-		if (BitStream[i] == invert){
+		
+		if (BitStream[i] == invert)
 			fcAll(fcLow, &n, clk, &modCnt);
-		} else {
+		else
 			fcAll(fcHigh, &n, clk, &modCnt);
-		}
 	}
-	Dbprintf("Simulating with fcHigh: %d, fcLow: %d, clk: %d, invert: %d, n: %d",fcHigh, fcLow, clk, invert, n);
-	/*Dbprintf("DEBUG: First 32:");
-	uint8_t *dest = BigBuf_get_addr();
-	i=0;
-	Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-	i+=16;
-	Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-	*/
-	if (ledcontrol)
-		LED_A_ON();
+	WDT_HIT();
+	
+	Dbprintf("Simulating with fcHigh: %d, fcLow: %d, clk: %d, invert: %d, n: %d", fcHigh, fcLow, clk, invert, n);
 
+	if (ledcontrol)	LED_A_ON();
 	SimulateTagLowFrequency(n, 0, ledcontrol);
-
-	if (ledcontrol)
-		LED_A_OFF();
+	if (ledcontrol)	LED_A_OFF();
 }
 
 // compose ask waveform for one bit(ASK)
@@ -637,25 +667,39 @@ static void biphaseSimBit(uint8_t c, int *n, uint8_t clock, uint8_t *phase)
 		memset(dest+(*n), c ^ *phase, clock);
 		*phase ^= 1;
 	}
+	*n += clock;
+}
 
+static void stAskSimBit(int *n, uint8_t clock) {
+	uint8_t *dest = BigBuf_get_addr();
+	uint8_t halfClk = clock/2;
+	//ST = .5 high .5 low 1.5 high .5 low 1 high	
+	memset(dest+(*n), 1, halfClk);
+	memset(dest+(*n) + halfClk, 0, halfClk);
+	memset(dest+(*n) + clock, 1, clock + halfClk);
+	memset(dest+(*n) + clock*2 + halfClk, 0, halfClk);
+	memset(dest+(*n) + clock*3, 1, clock);
+	*n += clock*4;
 }
 
 // args clock, ask/man or askraw, invert, transmission separator
 void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 {
-	int ledcontrol = 1;
-	int n=0, i=0;
+	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);	
+	set_tracing(FALSE);
+	
+	int ledcontrol = 1, n = 0, i = 0;
 	uint8_t clk = (arg1 >> 8) & 0xFF;
 	uint8_t encoding = arg1 & 0xFF;
 	uint8_t separator = arg2 & 1;
 	uint8_t invert = (arg2 >> 8) & 1;
 
-	if (encoding==2){  //biphase
-		uint8_t phase=0;
+	if (encoding == 2){  //biphase
+		uint8_t phase = 0;
 		for (i=0; i<size; i++){
 			biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
 		}
-		if (BitStream[0]==BitStream[size-1]){ //run a second set inverted to keep phase in check
+		if (phase == 1) { //run a second set inverted to keep phase in check
 			for (i=0; i<size; i++){
 				biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
 			}
@@ -670,9 +714,13 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 			}
 		}
 	}
-	
-	if (separator==1) Dbprintf("sorry but separator option not yet available"); 
+	if (separator==1 && encoding == 1)
+		stAskSimBit(&n, clk);
+	else if (separator==1)
+		Dbprintf("sorry but separator option not yet available");
 
+	WDT_HIT();
+	
 	Dbprintf("Simulating with clk: %d, invert: %d, encoding: %d, separator: %d, n: %d",clk, invert, encoding, separator, n);
 
 	if (ledcontrol)	LED_A_ON();
@@ -706,8 +754,10 @@ static void pskSimBit(uint8_t waveLen, int *n, uint8_t clk, uint8_t *curPhase, b
 // args clock, carrier, invert,
 void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 {
-	int ledcontrol = 1;
-	int n=0, i=0;
+	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);	
+	set_tracing(FALSE);
+	
+	int ledcontrol = 1, n = 0, i = 0;
 	uint8_t clk = arg1 >> 8;
 	uint8_t carrier = arg1 & 0xFF;
 	uint8_t invert = arg2 & 0xFF;
@@ -719,6 +769,9 @@ void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 			pskSimBit(carrier, &n, clk, &curPhase, TRUE);
 		}
 	}
+	
+	WDT_HIT();
+	
 	Dbprintf("Simulating with Carrier: %d, clk: %d, invert: %d, n: %d",carrier, clk, invert, n);
 		   
 	if (ledcontrol)	LED_A_ON();
@@ -736,6 +789,9 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
+
 	while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
 		WDT_HIT();
@@ -755,7 +811,7 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 				  (unsigned int) lo,
 				  (unsigned int) (lo>>1) & 0xFFFF
 				  );
-			}else {  //standard HID tags 44/96 bits
+			} else {  //standard HID tags 44/96 bits
 				uint8_t bitlen = 0;
 				uint32_t fc = 0;
 				uint32_t cardnum = 0;
@@ -809,13 +865,14 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 				if (ledcontrol)	LED_A_OFF();
 				*high = hi;
 				*low = lo;
-				return;
+				break;
 			}
 			// reset
 		}
 		hi2 = hi = lo = idx = 0;
 		WDT_HIT();
 	}
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 	DbpString("Stopped");
 	if (ledcontrol) LED_A_OFF();
 }
@@ -826,6 +883,8 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 	uint8_t *dest = BigBuf_get_addr();
 	size_t size; 
 	int idx=0;
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
@@ -839,7 +898,7 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 		size = 50*128*2; //big enough to catch 2 sequences of largest format
 		idx = AWIDdemodFSK(dest, &size);
 		
-		if (idx>0 && size==96){
+		if (idx<=0 || size!=96) continue;
 	        // Index map
 	        // 0            10            20            30              40            50              60
 	        // |            |             |             |               |             |               |
@@ -859,7 +918,7 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 	        uint32_t rawHi2 = bytebits_to_byte(dest+idx,32);
 
 	        size = removeParity(dest, idx+8, 4, 1, 88);
-	        // ok valid card found!
+		if (size != 66) continue;
 
 	        // Index map
 	        // 0           10         20        30          40        50        60
@@ -869,41 +928,55 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 	        // 00011010 1 01110101 0000000010001110 1 000000000000000000000000000000000
 	        // bbbbbbbb w ffffffff cccccccccccccccc w xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
 	        // |26 bit|   |-117--| |-----142------|
+			//
+			// 00110010 0 0000011111010000000000000001000100101000100001111 0 00000000 
+			// bbbbbbbb w ffffffffffffffffccccccccccccccccccccccccccccccccc w xxxxxxxx
+			// |50 bit|   |----4000------||-----------2248975-------------| 			
+			//
 	        // b = format bit len, o = odd parity of last 3 bits
 	        // f = facility code, c = card number
 	        // w = wiegand parity
-	        // (26 bit format shown)
 
 	        uint32_t fc = 0;
 	        uint32_t cardnum = 0;
 	        uint32_t code1 = 0;
 	        uint32_t code2 = 0;
 	        uint8_t fmtLen = bytebits_to_byte(dest,8);
-	        if (fmtLen==26){
-	                fc = bytebits_to_byte(dest+9, 8);
-	                cardnum = bytebits_to_byte(dest+17, 16);
-	                code1 = bytebits_to_byte(dest+8,fmtLen);
-	                Dbprintf("AWID Found - BitLength: %d, FC: %d, Card: %d - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, fc, cardnum, code1, rawHi2, rawHi, rawLo);
-	        } else {
-	                cardnum = bytebits_to_byte(dest+8+(fmtLen-17), 16);
-	                if (fmtLen>32){
-                        code1 = bytebits_to_byte(dest+8,fmtLen-32);
-                        code2 = bytebits_to_byte(dest+8+(fmtLen-32),32);
-                        Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%d) - Wiegand: %x%08x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, code2, rawHi2, rawHi, rawLo);
-                } else{
-                        code1 = bytebits_to_byte(dest+8,fmtLen);
-                        Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%d) - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, rawHi2, rawHi, rawLo);
-                }
-			}
-			if (findone){
-				if (ledcontrol)	LED_A_OFF();
-				return;
+			switch(fmtLen) {
+				case 26: 
+					fc = bytebits_to_byte(dest + 9, 8);
+					cardnum = bytebits_to_byte(dest + 17, 16);
+					code1 = bytebits_to_byte(dest + 8,fmtLen);
+					Dbprintf("AWID Found - BitLength: %d, FC: %d, Card: %u - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, fc, cardnum, code1, rawHi2, rawHi, rawLo);
+					break;
+				case 50:
+					fc = bytebits_to_byte(dest + 9, 16);
+					cardnum = bytebits_to_byte(dest + 25, 32);
+					code1 = bytebits_to_byte(dest + 8, (fmtLen-32) );
+					code2 = bytebits_to_byte(dest + 8 + (fmtLen-32), 32);
+					Dbprintf("AWID Found - BitLength: %d, FC: %d, Card: %u - Wiegand: %x%08x, Raw: %08x%08x%08x", fmtLen, fc, cardnum, code1, code2, rawHi2, rawHi, rawLo);
+					break;
+				default:
+					if (fmtLen > 32 ) {
+						cardnum = bytebits_to_byte(dest+8+(fmtLen-17), 16);
+						code1 = bytebits_to_byte(dest+8,fmtLen-32);
+						code2 = bytebits_to_byte(dest+8+(fmtLen-32),32);
+						Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%u) - Wiegand: %x%08x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, code2, rawHi2, rawHi, rawLo);
+					} else {
+						cardnum = bytebits_to_byte(dest+8+(fmtLen-17), 16);
+						code1 = bytebits_to_byte(dest+8,fmtLen);
+						Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%u) - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, rawHi2, rawHi, rawLo);
+					}
+					break;		
 			}
-			// reset
-		}
+			if (findone)
+				break;
+
 		idx = 0;
 		WDT_HIT();
 	}
+
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);	
 	DbpString("Stopped");
 	if (ledcontrol) LED_A_OFF();
 }
@@ -916,6 +989,8 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
 	int clk=0, invert=0, errCnt=0, maxErr=20;
 	uint32_t hi=0;
 	uint64_t lo=0;
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
@@ -956,13 +1031,14 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
 				if (ledcontrol) LED_A_OFF();
 				*high=lo>>32;
 				*low=lo & 0xFFFFFFFF;
-				return;
+				break;
 			}
 		}
 		WDT_HIT();
 		hi = lo = size = idx = 0;
 		clk = invert = errCnt = 0;
 	}
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);		
 	DbpString("Stopped");
 	if (ledcontrol) LED_A_OFF();
 }
@@ -977,6 +1053,10 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 	uint16_t number=0;
 	uint8_t crc = 0;
 	uint16_t calccrc = 0;
+
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
+	
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
@@ -1008,15 +1088,15 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 			// Checksum: 0x75
 			//XSF(version)facility:codeone+codetwo
 			//Handle the data
-			if(findone){ //only print binary if we are doing one
-				Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx],   dest[idx+1],   dest[idx+2],dest[idx+3],dest[idx+4],dest[idx+5],dest[idx+6],dest[idx+7],dest[idx+8]);
-				Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+9], dest[idx+10],dest[idx+11],dest[idx+12],dest[idx+13],dest[idx+14],dest[idx+15],dest[idx+16],dest[idx+17]);
-				Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+18],dest[idx+19],dest[idx+20],dest[idx+21],dest[idx+22],dest[idx+23],dest[idx+24],dest[idx+25],dest[idx+26]);
-				Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+27],dest[idx+28],dest[idx+29],dest[idx+30],dest[idx+31],dest[idx+32],dest[idx+33],dest[idx+34],dest[idx+35]);
-				Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+36],dest[idx+37],dest[idx+38],dest[idx+39],dest[idx+40],dest[idx+41],dest[idx+42],dest[idx+43],dest[idx+44]);
-				Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+45],dest[idx+46],dest[idx+47],dest[idx+48],dest[idx+49],dest[idx+50],dest[idx+51],dest[idx+52],dest[idx+53]);
-				Dbprintf("%d%d%d%d%d%d%d%d %d%d",dest[idx+54],dest[idx+55],dest[idx+56],dest[idx+57],dest[idx+58],dest[idx+59],dest[idx+60],dest[idx+61],dest[idx+62],dest[idx+63]);
-			}
+			// if(findone){ //only print binary if we are doing one
+				// Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx],   dest[idx+1],   dest[idx+2],dest[idx+3],dest[idx+4],dest[idx+5],dest[idx+6],dest[idx+7],dest[idx+8]);
+				// Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+9], dest[idx+10],dest[idx+11],dest[idx+12],dest[idx+13],dest[idx+14],dest[idx+15],dest[idx+16],dest[idx+17]);
+				// Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+18],dest[idx+19],dest[idx+20],dest[idx+21],dest[idx+22],dest[idx+23],dest[idx+24],dest[idx+25],dest[idx+26]);
+				// Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+27],dest[idx+28],dest[idx+29],dest[idx+30],dest[idx+31],dest[idx+32],dest[idx+33],dest[idx+34],dest[idx+35]);
+				// Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+36],dest[idx+37],dest[idx+38],dest[idx+39],dest[idx+40],dest[idx+41],dest[idx+42],dest[idx+43],dest[idx+44]);
+				// Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+45],dest[idx+46],dest[idx+47],dest[idx+48],dest[idx+49],dest[idx+50],dest[idx+51],dest[idx+52],dest[idx+53]);
+				// Dbprintf("%d%d%d%d%d%d%d%d %d%d",dest[idx+54],dest[idx+55],dest[idx+56],dest[idx+57],dest[idx+58],dest[idx+59],dest[idx+60],dest[idx+61],dest[idx+62],dest[idx+63]);
+			// }
 			code = bytebits_to_byte(dest+idx,32);
 			code2 = bytebits_to_byte(dest+idx+32,32);
 			version = bytebits_to_byte(dest+idx+27,8); //14,4
@@ -1037,7 +1117,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 				if (ledcontrol)	LED_A_OFF();
 				*high=code;
 				*low=code2;
-				return;
+				break;
 			}
 			code=code2=0;
 			version=facilitycode=0;
@@ -1046,12 +1126,13 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 
 		WDT_HIT();
 	}
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);		
 	DbpString("Stopped");
 	if (ledcontrol) LED_A_OFF();
 }
 
 /*------------------------------
- * T5555/T5557/T5567 routines
+ * T5555/T5557/T5567/T5577 routines
  *------------------------------
  * NOTE: T55x7/T5555 configuration register definitions moved to protocols.h 
  *
@@ -1061,11 +1142,11 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
  * Q5 tags seems to have issues when these values changes. 
  */
 
-#define START_GAP 50*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (or 15fc)
-#define WRITE_GAP 20*8 // was 160 // SPEC:  1*8 to 20*8 - typ 10*8 (or 10fc)
-#define WRITE_0   16*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
-#define WRITE_1   50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc)  432 for T55x7; 448 for E5550
-#define READ_GAP  52*8 
+#define START_GAP 50*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (15fc)
+#define WRITE_GAP 20*8 // was 160 // SPEC:  1*8 to 20*8 - typ 10*8 (10fc)
+#define WRITE_0   18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (24fc)
+#define WRITE_1   54*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (56fc)  432 for T55x7; 448 for E5550
+#define READ_GAP  15*8 
 
 //  VALUES TAKEN FROM EM4x function: SendForward
 //  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)
@@ -1073,7 +1154,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 //  WRITE_1   = 256 32*8;  (32*8) 
 
 //  These timings work for 4469/4269/4305 (with the 55*8 above)
-//  WRITE_0 = 23*8 , 9*8  SpinDelayUs(23*8); 
+//  WRITE_0 = 23*8 , 9*8 
 
 // Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK)
 // TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
@@ -1081,15 +1162,17 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 // T0 = TIMER_CLOCK1 / 125000 = 192
 // 1 Cycle = 8 microseconds(us)  == 1 field clock
 
-void TurnReadLFOn(int delay) {
+// new timer:
+//     = 1us = 1.5ticks
+// 1fc = 8us = 12ticks
+void TurnReadLFOn(uint32_t delay) {
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-	// Give it a bit of time for the resonant antenna to settle.
 
 	// measure antenna strength.
 	//int adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
-	// where to save it
-	
-	SpinDelayUs(delay);
+
+	// Give it a bit of time for the resonant antenna to settle.
+	WaitUS(delay);
 }
 
 // Write one bit to card
@@ -1099,11 +1182,40 @@ void T55xxWriteBit(int bit) {
 	else
 		TurnReadLFOn(WRITE_1);
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-	SpinDelayUs(WRITE_GAP);
+	WaitUS(WRITE_GAP);
+}
+
+// Send T5577 reset command then read stream (see if we can identify the start of the stream)
+void T55xxResetRead(void) {
+	LED_A_ON();
+	//clear buffer now so it does not interfere with timing later
+	BigBuf_Clear_keep_EM();
+
+	// Set up FPGA, 125kHz
+	LFSetupFPGAForADC(95, true);
+
+	// Trigger T55x7 in mode.
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+	WaitUS(START_GAP);
+
+	// reset tag - op code 00
+	T55xxWriteBit(0);
+	T55xxWriteBit(0);
+
+	// Turn field on to read the response
+	TurnReadLFOn(READ_GAP);
+
+	// Acquisition
+	doT55x7Acquisition(BigBuf_max_traceLen());
+
+	// Turn the field off
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+	cmd_send(CMD_ACK,0,0,0,0,0);    
+	LED_A_OFF();
 }
 
 // Write one card block in page 0, no lock
-void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) {
+void T55xxWriteBlockExt(uint32_t Data, uint8_t Block, uint32_t Pwd, uint8_t arg) {
 	LED_A_ON();
 	bool PwdMode = arg & 0x1;
 	uint8_t Page = (arg & 0x2)>>1;
@@ -1114,7 +1226,7 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) {
 	
 	// Trigger T55x7 in mode.
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-	SpinDelayUs(START_GAP);
+	WaitUS(START_GAP);
 
 	// Opcode 10
 	T55xxWriteBit(1);
@@ -1138,18 +1250,24 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) {
 	// Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
 	// so wait a little more)
 	TurnReadLFOn(20 * 1000);
-		//could attempt to do a read to confirm write took
-		// as the tag should repeat back the new block 
-		// until it is reset, but to confirm it we would 
-		// need to know the current block 0 config mode
+	
+	//could attempt to do a read to confirm write took
+	// as the tag should repeat back the new block 
+	// until it is reset, but to confirm it we would 
+	// need to know the current block 0 config mode
 	
 	// turn field off
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-	cmd_send(CMD_ACK,0,0,0,0,0);
 	LED_A_OFF();
 }
 
-// Read one card block in page 0
+// Write one card block in page 0, no lock
+void T55xxWriteBlock(uint32_t Data, uint8_t Block, uint32_t Pwd, uint8_t arg) {
+	T55xxWriteBlockExt(Data, Block, Pwd, arg);
+	cmd_send(CMD_ACK,0,0,0,0,0);
+}
+
+// Read one card block in page [page]
 void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
 	LED_A_ON();
 	bool PwdMode = arg0 & 0x1;
@@ -1158,17 +1276,18 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
 	bool RegReadMode = (Block == 0xFF);
 	
 	//clear buffer now so it does not interfere with timing later
-	BigBuf_Clear_ext(false);
+	BigBuf_Clear_keep_EM();
 
 	//make sure block is at max 7
 	Block &= 0x7;
 
 	// Set up FPGA, 125kHz to power up the tag
 	LFSetupFPGAForADC(95, true);
+	//SpinDelay(3);
 	
 	// Trigger T55x7 Direct Access Mode with start gap
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-	SpinDelayUs(START_GAP);
+	WaitUS(START_GAP);
 	
 	// Opcode 1[page]
 	T55xxWriteBit(1);
@@ -1184,14 +1303,14 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
 	
 	// Send Block number (if direct access mode)
 	if (!RegReadMode)
-	for (i = 0x04; i != 0; i >>= 1)
-		T55xxWriteBit(Block & i);
+		for (i = 0x04; i != 0; i >>= 1)
+			T55xxWriteBit(Block & i);
 
 	// Turn field on to read the response
 	TurnReadLFOn(READ_GAP);
 	
 	// Acquisition
-	doT55x7Acquisition();
+	doT55x7Acquisition(7679);
 	
 	// Turn the field off
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
@@ -1208,7 +1327,7 @@ void T55xxWakeUp(uint32_t Pwd){
 	
 	// Trigger T55x7 Direct Access Mode
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-	SpinDelayUs(START_GAP);
+	WaitUS(START_GAP);
 	
 	// Opcode 10
 	T55xxWriteBit(1);
@@ -1223,73 +1342,68 @@ void T55xxWakeUp(uint32_t Pwd){
 }
 
 /*-------------- Cloning routines -----------*/
-
 void WriteT55xx(uint32_t *blockdata, uint8_t startblock, uint8_t numblocks) {
 	// write last block first and config block last (if included)
-	for (uint8_t i = numblocks; i > startblock; i--)
-		T55xxWriteBlock(blockdata[i-1],i-1,0,0);
+	for (uint8_t i = numblocks+startblock; i > startblock; i--)
+		T55xxWriteBlockExt(blockdata[i-1], i-1, 0, 0);
 }
 
 // Copy HID id to card and setup block 0 config
 void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) {
 	uint32_t data[] = {0,0,0,0,0,0,0};
-	//int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format
 	uint8_t last_block = 0;
 
 	if (longFMT){
 		// Ensure no more than 84 bits supplied
-		if (hi2>0xFFFFF) {
+		if (hi2 > 0xFFFFF) {
 			DbpString("Tags can only have 84 bits.");
 			return;
 		}
 		// Build the 6 data blocks for supplied 84bit ID
 		last_block = 6;
 		// load preamble (1D) & long format identifier (9E manchester encoded)
-		data[1] = 0x1D96A900 | manchesterEncode2Bytes((hi2 >> 16) & 0xF);
+		data[1] = 0x1D96A900 | (manchesterEncode2Bytes((hi2 >> 16) & 0xF) & 0xFF);
 		// load raw id from hi2, hi, lo to data blocks (manchester encoded)
 		data[2] = manchesterEncode2Bytes(hi2 & 0xFFFF);
 		data[3] = manchesterEncode2Bytes(hi >> 16);
 		data[4] = manchesterEncode2Bytes(hi & 0xFFFF);
 		data[5] = manchesterEncode2Bytes(lo >> 16);
 		data[6] = manchesterEncode2Bytes(lo & 0xFFFF);
-	}	else {
+	} else {
 		// Ensure no more than 44 bits supplied
-		if (hi>0xFFF) {
+		if (hi > 0xFFF) {
 			DbpString("Tags can only have 44 bits.");
 			return;
 		}
 		// Build the 3 data blocks for supplied 44bit ID
 		last_block = 3;
 		// load preamble
-		data[1] = 0x1D000000 | manchesterEncode2Bytes(hi & 0xFFF);
+		data[1] = 0x1D000000 | (manchesterEncode2Bytes(hi) & 0xFFFFFF);
 		data[2] = manchesterEncode2Bytes(lo >> 16);
 		data[3] = manchesterEncode2Bytes(lo & 0xFFFF);
 	}
 	// load chip config block
 	data[0] = T55x7_BITRATE_RF_50 | T55x7_MODULATION_FSK2a | last_block << T55x7_MAXBLOCK_SHIFT;
 
+	//TODO add selection of chip for Q5 or T55x7
+	// data[0] = (((50-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | last_block << T5555_MAXBLOCK_SHIFT;
+
 	LED_D_ON();
-	// Program the data blocks for supplied ID
-	// and the block 0 for HID format
 	WriteT55xx(data, 0, last_block+1);
-
 	LED_D_OFF();
-
-	DbpString("DONE!");
 }
 
-void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT)
-{
+void CopyIOtoT55x7(uint32_t hi, uint32_t lo) {
 	uint32_t data[] = {T55x7_BITRATE_RF_64 | T55x7_MODULATION_FSK2a | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
+	//TODO add selection of chip for Q5 or T55x7
+	//t5555 (Q5) BITRATE = (RF-2)/2 (iceman)
+	// data[0] = (64 << T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | 2 << T5555_MAXBLOCK_SHIFT;
 
 	LED_D_ON();
 	// Program the data blocks for supplied ID
 	// and the block 0 config
 	WriteT55xx(data, 0, 3);
-
 	LED_D_OFF();
-
-	DbpString("DONE!");
 }
 
 // Clone Indala 64-bit tag by UID to T55x7
@@ -1297,31 +1411,42 @@ void CopyIndala64toT55x7(uint32_t hi, uint32_t lo) {
 	//Program the 2 data blocks for supplied 64bit UID
 	// and the Config for Indala 64 format (RF/32;PSK1 with RF/2;Maxblock=2)
 	uint32_t data[] = { T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
+	//TODO add selection of chip for Q5 or T55x7
+	// data[0] = (((32-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_PSK1 | 2 << T5555_MAXBLOCK_SHIFT;
+
 	WriteT55xx(data, 0, 3);
 	//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
 	//	T5567WriteBlock(0x603E1042,0);
-	DbpString("DONE!");
 }
 // Clone Indala 224-bit tag by UID to T55x7
-void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t uid4, uint32_t uid5, uint32_t uid6, uint32_t uid7)
-{
+void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t uid4, uint32_t uid5, uint32_t uid6, uint32_t uid7) {
 	//Program the 7 data blocks for supplied 224bit UID
 	uint32_t data[] = {0, uid1, uid2, uid3, uid4, uid5, uid6, uid7};
 	// and the block 0 for Indala224 format	
 	//Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
 	data[0] = T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (7 << T55x7_MAXBLOCK_SHIFT);
+	//TODO add selection of chip for Q5 or T55x7
+	// data[0] = (((32-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_PSK1 | 7 << T5555_MAXBLOCK_SHIFT;
 	WriteT55xx(data, 0, 8);
 	//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
 	//	T5567WriteBlock(0x603E10E2,0);
-	DbpString("DONE!");
+}
+// clone viking tag to T55xx
+void CopyVikingtoT55xx(uint32_t block1, uint32_t block2, uint8_t Q5) {
+	uint32_t data[] = {T55x7_BITRATE_RF_32 | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT), block1, block2};
+	//t5555 (Q5) BITRATE = (RF-2)/2 (iceman)
+	if (Q5) data[0] = (32 << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | 2 << T5555_MAXBLOCK_SHIFT;
+	// Program the data blocks for supplied ID and the block 0 config
+	WriteT55xx(data, 0, 3);
+	LED_D_OFF();
+	cmd_send(CMD_ACK,0,0,0,0,0);
 }
 
 // Define 9bit header for EM410x tags
 #define EM410X_HEADER		0x1FF
 #define EM410X_ID_LENGTH	40
 
-void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
-{
+void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo) {
 	int i, id_bit;
 	uint64_t id = EM410X_HEADER;
 	uint64_t rev_id = 0;	// reversed ID
@@ -1381,35 +1506,38 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
 	LED_D_ON();
 
 	// Write EM410x ID
-	uint32_t data[] = {0, id>>32, id & 0xFFFF};
-	if (card) {
-		clock = (card & 0xFF00) >> 8;
-		clock = (clock == 0) ? 64 : clock;
-		Dbprintf("Clock rate: %d", clock);
+	uint32_t data[] = {0, (uint32_t)(id>>32), (uint32_t)(id & 0xFFFFFFFF)};
+
+	clock = (card & 0xFF00) >> 8;
+	clock = (clock == 0) ? 64 : clock;
+	Dbprintf("Clock rate: %d", clock);
+	if (card & 0xFF) { //t55x7
 		clock = GetT55xxClockBit(clock);
 		if (clock == 0) {
 			Dbprintf("Invalid clock rate: %d", clock);
 			return;
 		}
-
 		data[0] = clock | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT);
-	} else {
-		data[0] = (0x1F << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | (2 << T5555_MAXBLOCK_SHIFT);
+	} else { //t5555 (Q5)
+		clock = (clock-2)>>1;  //n = (RF-2)/2
+		data[0] = (clock << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | (2 << T5555_MAXBLOCK_SHIFT);
 	}
-
+ 
 	WriteT55xx(data, 0, 3);
 
 	LED_D_OFF();
-	Dbprintf("Tag %s written with 0x%08x%08x\n", card ? "T55x7":"T5555",
-			 (uint32_t)(id >> 32), (uint32_t)id);
+	Dbprintf("Tag %s written with 0x%08x%08x\n",
+			card ? "T55x7":"T5555",
+			(uint32_t)(id >> 32),
+			(uint32_t)id);
 }
 
 //-----------------------------------
 // EM4469 / EM4305 routines
 //-----------------------------------
-#define FWD_CMD_LOGIN 0xC //including the even parity, binary mirrored
-#define FWD_CMD_WRITE 0xA
-#define FWD_CMD_READ 0x9
+#define FWD_CMD_LOGIN   0xC //including the even parity, binary mirrored
+#define FWD_CMD_WRITE   0xA
+#define FWD_CMD_READ    0x9
 #define FWD_CMD_DISABLE 0x5
 
 uint8_t forwardLink_data[64]; //array of forwarded bits
@@ -1421,6 +1549,15 @@ uint8_t * fwd_write_ptr; //forwardlink bit pointer
 // prepares command bits
 // see EM4469 spec
 //====================================================================
+//--------------------------------------------------------------------
+//  VALUES TAKEN FROM EM4x function: SendForward
+//  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)
+//  WRITE_GAP = 128;       (16*8)
+//  WRITE_1   = 256 32*8;  (32*8) 
+
+//  These timings work for 4469/4269/4305 (with the 55*8 above)
+//  WRITE_0 = 23*8 , 9*8
+
 uint8_t Prepare_Cmd( uint8_t cmd ) {
 
 	*forward_ptr++ = 0; //start bit
@@ -1513,20 +1650,20 @@ void SendForward(uint8_t fwd_bit_count) {
 	fwd_bit_sz--; //prepare next bit modulation
 	fwd_write_ptr++;
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-	SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
+	WaitUS(55*8); //55 cycles off (8us each)for 4305	// ICEMAN:  problem with (us) clock is  21.3us increments
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
-	SpinDelayUs(16*8); //16 cycles on (8us each)
+	WaitUS(16*8); //16 cycles on (8us each)	// ICEMAN:  problem with (us) clock is  21.3us increments
 
 	// now start writting
 	while(fwd_bit_sz-- > 0) { //prepare next bit modulation
 		if(((*fwd_write_ptr++) & 1) == 1)
-			SpinDelayUs(32*8); //32 cycles at 125Khz (8us each)
+			WaitUS(32*8); //32 cycles at 125Khz (8us each)	// ICEMAN:  problem with (us) clock is  21.3us increments
 		else {
 			//These timings work for 4469/4269/4305 (with the 55*8 above)
 			FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-			SpinDelayUs(23*8); //16-4 cycles off (8us each)
+			WaitUS(16*8); //16-4 cycles off (8us each)	// ICEMAN:  problem with (us) clock is  21.3us increments
 			FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
-			SpinDelayUs(9*8); //16 cycles on (8us each)
+			WaitUS(16*8); //16 cycles on (8us each)	// ICEMAN:  problem with (us) clock is  21.3us increments
 		}
 	}
 }
@@ -1534,25 +1671,23 @@ void SendForward(uint8_t fwd_bit_count) {
 void EM4xLogin(uint32_t Password) {
 
 	uint8_t fwd_bit_count;
-
 	forward_ptr = forwardLink_data;
 	fwd_bit_count = Prepare_Cmd( FWD_CMD_LOGIN );
 	fwd_bit_count += Prepare_Data( Password&0xFFFF, Password>>16 );
-
 	SendForward(fwd_bit_count);
 
 	//Wait for command to complete
-	SpinDelay(20);
+	WaitMS(20);
 }
 
 void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 
 	uint8_t fwd_bit_count;
 	uint8_t *dest = BigBuf_get_addr();
-	uint16_t bufsize = BigBuf_max_traceLen();
+	uint16_t bufsize = BigBuf_max_traceLen();  // ICEMAN: this tries to fill up all tracelog space
 	uint32_t i = 0;
 
-	//clear buffer now so it does not interfere with timing later
+	// Clear destination buffer before sending the command
 	BigBuf_Clear_ext(false);
 	
 	//If password mode do login
@@ -1562,14 +1697,10 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 	fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
 	fwd_bit_count += Prepare_Addr( Address );
 
-	// Connect the A/D to the peak-detected low-frequency path.
-	SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-	// Now set up the SSC to get the ADC samples that are now streaming at us.
-	FpgaSetupSsc();
-
 	SendForward(fwd_bit_count);
 
 	// Now do the acquisition
+	// ICEMAN, change to the one in lfsampling.c
 	i = 0;
 	for(;;) {
 		if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
@@ -1602,19 +1733,53 @@ void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode
 	SendForward(fwd_bit_count);
 
 	//Wait for write to complete
-	SpinDelay(20);
+	WaitMS(20);
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
 	LED_D_OFF();
 }
 
-void CopyViKingtoT55x7(uint32_t block1, uint32_t block2) {
-    LED_D_ON();
-    T55xxWriteBlock(block1,1,0,0);
-    T55xxWriteBlock(block2,2,0,0);
-	T55xxWriteBlock(T55x7_MODULATION_MANCHESTER | T55x7_BITRATE_RF_32 | 2 << T55x7_MAXBLOCK_SHIFT,0,0,0);
-    // T55xxWriteBlock(T55x7_MODULATION_MANCHESTER | T55x7_BITRATE_RF_32 | 2 << T5555_MAXBLOCK_SHIFT,0,0,1);
-	// ICEMAN NOTES:
-	// Shouldn't this one be: T55x7_MAXBLOCK_SHIFT  and 0 in password mode
-    LED_D_OFF();
-}
+void Cotag() {
+
+#define WAIT2200 	{ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); WaitUS(2200); }
 
+	LED_A_ON();
+	
+	//clear buffer now so it does not interfere with timing later
+	BigBuf_Clear_keep_EM();
+
+	// Set up FPGA, 132kHz to power up the tag
+	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 89);
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+	// Connect the A/D to the peak-detected low-frequency path.
+	SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+	
+	// 50ms for the resonant antenna to settle.
+	SpinDelay(50);
+	
+	// Now set up the SSC to get the ADC samples that are now streaming at us.
+	FpgaSetupSsc();
+	// start a 1.5ticks is 1us
+	StartTicks();
+	
+	//send start pulse
+	TurnReadLFOn(800);
+	WAIT2200
+	TurnReadLFOn(3600);
+	WAIT2200
+	TurnReadLFOn(800);
+	WAIT2200
+	TurnReadLFOn(3600);	
+	
+	// Turn field on to read the response
+	TurnReadLFOn(READ_GAP);
+	
+	// Acquisition
+	doT55x7Acquisition(20000);
+	
+	// Turn the field off
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+	cmd_send(CMD_ACK,0,0,0,0,0);    
+	LED_A_OFF();
+}