X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/24c49d36ba3ea8acb9be21bdbb51503969a5a113..b828a4e16818697605d57f2600cbb815c5ce5e7e:/armsrc/lfsampling.c diff --git a/armsrc/lfsampling.c b/armsrc/lfsampling.c index a272e153..d726ba20 100644 --- a/armsrc/lfsampling.c +++ b/armsrc/lfsampling.c @@ -48,11 +48,11 @@ sample_config* getSamplingConfig() { return &config; } -typedef struct { +struct BitstreamOut { uint8_t * buffer; uint32_t numbits; uint32_t position; -} BitstreamOut; +}; /** * @brief Pushes bit onto the stream @@ -87,11 +87,10 @@ void LFSetupFPGAForADC(int divisor, bool lf_field) { // Connect the A/D to the peak-detected low-frequency path. SetAdcMuxFor(GPIO_MUXSEL_LOPKD); - // Give it a bit of time for the resonant antenna to settle. + // 50ms for the resonant antenna to settle. SpinDelay(50); // Now set up the SSC to get the ADC samples that are now streaming at us. FpgaSetupSsc(); - // start a 1.5ticks is 1us StartTicks(); } @@ -111,7 +110,7 @@ void LFSetupFPGAForADC(int divisor, bool lf_field) { * @param silent - is true, now outputs are made. If false, dbprints the status * @return the number of bits occupied by the samples. */ -uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averaging, int trigger_threshold,bool silent) { +uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averaging, int trigger_threshold, bool silent) { //bigbuf, to hold the aquired raw data signal uint8_t *dest = BigBuf_get_addr(); uint16_t bufsize = BigBuf_max_traceLen(); @@ -225,14 +224,20 @@ uint32_t ReadLF(bool activeField, bool silent) { * @return number of bits sampled **/ uint32_t SampleLF(bool printCfg) { - return ReadLF(true, printCfg); + BigBuf_Clear_ext(false); + uint32_t ret = ReadLF(true, printCfg); + FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); + return ret; } /** * Initializes the FPGA for snoop-mode (field off), and acquires the samples. * @return number of bits sampled **/ uint32_t SnoopLF() { - return ReadLF(false, true); + BigBuf_Clear_ext(false); + uint32_t ret = ReadLF(false, true); + FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); + return ret; } /** @@ -260,7 +265,7 @@ void doT55x7Acquisition(size_t sample_size) { while(!BUTTON_PRESS() && !usb_poll_validate_length() && skipCnt < 1000 && (i < bufsize) ) { WDT_HIT(); if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) { - AT91C_BASE_SSC->SSC_THR = 0x43; + AT91C_BASE_SSC->SSC_THR = 0x43; //43 LED_D_ON(); } if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) { @@ -276,7 +281,7 @@ void doT55x7Acquisition(size_t sample_size) { skipCnt++; continue; } - // skip until the first Low sample below threshold + // skip until the first low sample below threshold if (!startFound && curSample < T55xx_READ_LOWER_THRESHOLD) { //if (curSample > lastSample) lastSample = curSample; @@ -286,7 +291,6 @@ void doT55x7Acquisition(size_t sample_size) { continue; } - // skip until first high samples begin to change if (startFound || curSample > T55xx_READ_LOWER_THRESHOLD + T55xx_READ_TOL){ // if just found start - recover last sample