X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/4a71da5a359c5f2449a19f19f2fbcbe7bb989ebb..53d5dc643f592124676b4290c8f81e6039e9abc7:/armsrc/fpgaloader.c

diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c
index da85c66c..a1011ab7 100644
--- a/armsrc/fpgaloader.c
+++ b/armsrc/fpgaloader.c
@@ -117,8 +117,7 @@ void SetupSpi(int mode)
 // Set up the synchronous serial port, with the one set of options that we
 // always use when we are talking to the FPGA. Both RX and TX are enabled.
 //-----------------------------------------------------------------------------
-void FpgaSetupSsc(void)
-{
+void FpgaSetupSscExt(uint8_t clearPCER) {
 	// First configure the GPIOs, and get ourselves a clock.
 	AT91C_BASE_PIOA->PIO_ASR =
 		GPIO_SSC_FRAME	|
@@ -127,7 +126,10 @@ void FpgaSetupSsc(void)
 		GPIO_SSC_CLK;
 	AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT;
 
-	AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SSC);
+	if ( clearPCER )
+		AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_SSC);
+	else
+		AT91C_BASE_PMC->PMC_PCER |= (1 << AT91C_ID_SSC);
 
 	// Now set up the SSC proper, starting from a known state.
 	AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
@@ -149,25 +151,24 @@ void FpgaSetupSsc(void)
 
 	AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN;
 }
-
+void FpgaSetupSsc(void) {
+	FpgaSetupSscExt(TRUE);
+}
 //-----------------------------------------------------------------------------
 // Set up DMA to receive samples from the FPGA. We will use the PDC, with
 // a single buffer as a circular buffer (so that we just chain back to
 // ourselves, not to another buffer). The stuff to manipulate those buffers
 // is in apps.h, because it should be inlined, for speed.
 //-----------------------------------------------------------------------------
-bool FpgaSetupSscDma(uint8_t *buf, int len)
-{
-	if (buf == NULL)
-        return false;
-
+bool FpgaSetupSscDma(uint8_t *buf, int len) {
+	if (buf == NULL) return false;
+	
 	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;	// Disable DMA Transfer
 	AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) buf;		// transfer to this memory address
 	AT91C_BASE_PDC_SSC->PDC_RCR = len;					// transfer this many bytes
 	AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) buf;		// next transfer to same memory address
 	AT91C_BASE_PDC_SSC->PDC_RNCR = len;					// ... with same number of bytes
-	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;		// go!
-    
+	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;		// go!    
     return true;
 }
 
@@ -220,7 +221,8 @@ static voidpf fpga_inflate_malloc(voidpf opaque, uInt items, uInt size)
 
 static void fpga_inflate_free(voidpf opaque, voidpf address)
 {
-	BigBuf_free();
+	// free eventually allocated BigBuf memory
+	BigBuf_free(); BigBuf_Clear_ext(false);
 }
 
 
@@ -416,7 +418,7 @@ void FpgaDownloadAndGo(int bitstream_version)
 		return;
 
 	// make sure that we have enough memory to decompress
-	BigBuf_free();
+	BigBuf_free(); BigBuf_Clear_ext(false);
 	
 	if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer)) {
 		return;
@@ -430,7 +432,8 @@ void FpgaDownloadAndGo(int bitstream_version)
 
 	inflateEnd(&compressed_fpga_stream);
 	
-	BigBuf_free();
+	// free eventually allocated BigBuf memory
+	BigBuf_free(); BigBuf_Clear_ext(false);
 }	
 
 
@@ -450,7 +453,7 @@ void FpgaGatherVersion(int bitstream_version, char *dst, int len)
 	dst[0] = '\0';
 
 	// ensure that we can allocate enough memory for decompression:
-	BigBuf_free();
+	BigBuf_free(); BigBuf_Clear_ext(false);
 
 	if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer))
 		return;