X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/51d4f6f1146b083f12381419bbfb6addd550e6a3..7624e8b21bfb8468ae332a891a20df17f5077e58:/fpga/hi_read_rx_xcorr.v diff --git a/fpga/hi_read_rx_xcorr.v b/fpga/hi_read_rx_xcorr.v index a6a99cd5..afaf7cb6 100644 --- a/fpga/hi_read_rx_xcorr.v +++ b/fpga/hi_read_rx_xcorr.v @@ -10,7 +10,7 @@ module hi_read_rx_xcorr( ssp_frame, ssp_din, ssp_dout, ssp_clk, cross_hi, cross_lo, dbg, - snoop + xcorr_is_848, snoop ); input pck0, ck_1356meg, ck_1356megb; output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4; @@ -20,7 +20,7 @@ module hi_read_rx_xcorr( output ssp_frame, ssp_din, ssp_clk; input cross_hi, cross_lo; output dbg; - input snoop; + input xcorr_is_848, snoop; // Carrier is steady on through this, unless we're snooping. assign pwr_hi = ck_1356megb & (~snoop); @@ -30,6 +30,10 @@ assign pwr_oe4 = 1'b0; wire adc_clk = ck_1356megb; +reg fc_div_2; +always @(negedge ck_1356megb) + fc_div_2 <= fc_div_2 + 1; + // When we're a reader, we just need to do the BPSK demod; but when we're an // eavesdropper, we also need to pick out the commands sent by the reader, // using AM. Do this the same way that we do it for the simulated tag. @@ -71,20 +75,24 @@ reg ssp_clk; reg ssp_frame; +always @(negedge adc_clk) +begin + if (xcorr_is_848 | fc_div_2) + corr_i_cnt <= corr_i_cnt + 1; +end + // ADC data appears on the rising edge, so sample it on the falling edge always @(negedge adc_clk) begin - corr_i_cnt <= corr_i_cnt + 1; - // These are the correlators: we correlate against in-phase and quadrature // versions of our reference signal, and keep the (signed) result to // send out later over the SSP. - if(corr_i_cnt == 7'd0) + if(corr_i_cnt == 6'd0) begin if(snoop) begin - // 7 most significant bits of tag signal (signed), 1 bit reader signal: + // Send only 7 most significant bits of tag signal (signed), LSB is reader signal: corr_i_out <= {corr_i_accum[13:7], after_hysteresis_prev_prev}; corr_q_out <= {corr_q_accum[13:7], after_hysteresis_prev}; after_hysteresis_prev_prev <= after_hysteresis; @@ -115,7 +123,7 @@ begin // The logic in hi_simulate.v reports 4 samples per bit. We report two // (I, Q) pairs per bit, so we should do 2 samples per pair. - if(corr_i_cnt == 6'd31) + if(corr_i_cnt == 6'd32) after_hysteresis_prev <= after_hysteresis; // Then the result from last time is serialized and send out to the ARM.