X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/63852b2f5121013884826145e8d2dd2d7dbcf36d..bc9393715faea086a5275664cc12c628c7d49d4e:/armsrc/iso14443b.c diff --git a/armsrc/iso14443b.c b/armsrc/iso14443b.c index 9d033f61..9616cb30 100644 --- a/armsrc/iso14443b.c +++ b/armsrc/iso14443b.c @@ -8,18 +8,12 @@ // Routines to support ISO 14443B. This includes both the reader software and // the `fake tag' modes. //----------------------------------------------------------------------------- +#include "iso14443b.h" -#include "proxmark3.h" -#include "apps.h" -#include "util.h" -#include "string.h" -#include "iso14443crc.h" -#include "common.h" -#define RECEIVE_SAMPLES_TIMEOUT 600000 +#define RECEIVE_SAMPLES_TIMEOUT 20000 #define ISO14443B_DMA_BUFFER_SIZE 256 - -// PCB Block number for APDUs +// the block number for the ISO14443-4 PCB (used with APDUs) static uint8_t pcb_blocknum = 0; //============================================================================= @@ -30,6 +24,93 @@ static uint8_t pcb_blocknum = 0; // a response. //============================================================================= + +//----------------------------------------------------------------------------- +// The software UART that receives commands from the reader, and its state +// variables. +//----------------------------------------------------------------------------- +static struct { + enum { + STATE_UNSYNCD, + STATE_GOT_FALLING_EDGE_OF_SOF, + STATE_AWAITING_START_BIT, + STATE_RECEIVING_DATA + } state; + uint16_t shiftReg; + int bitCnt; + int byteCnt; + int byteCntMax; + int posCnt; + uint8_t *output; +} Uart; + +static void UartReset() +{ + Uart.byteCntMax = MAX_FRAME_SIZE; + Uart.state = STATE_UNSYNCD; + Uart.byteCnt = 0; + Uart.bitCnt = 0; + Uart.posCnt = 0; + memset(Uart.output, 0x00, MAX_FRAME_SIZE); +} + +static void UartInit(uint8_t *data) +{ + Uart.output = data; + UartReset(); +} + + +static struct { + enum { + DEMOD_UNSYNCD, + DEMOD_PHASE_REF_TRAINING, + DEMOD_AWAITING_FALLING_EDGE_OF_SOF, + DEMOD_GOT_FALLING_EDGE_OF_SOF, + DEMOD_AWAITING_START_BIT, + DEMOD_RECEIVING_DATA + } state; + int bitCount; + int posCount; + int thisBit; +/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. + int metric; + int metricN; +*/ + uint16_t shiftReg; + uint8_t *output; + int len; + int sumI; + int sumQ; +} Demod; + +static void DemodReset() +{ + // Clear out the state of the "UART" that receives from the tag. + Demod.len = 0; + Demod.state = DEMOD_UNSYNCD; + Demod.posCount = 0; + Demod.sumI = 0; + Demod.sumQ = 0; + Demod.bitCount = 0; + Demod.thisBit = 0; + Demod.shiftReg = 0; + //memset(Demod.output, 0x00, MAX_FRAME_SIZE); +} + + +static void DemodInit(uint8_t *data) +{ + Demod.output = data; + DemodReset(); +} + + +void AppendCrc14443b(uint8_t* data, int len) +{ + ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1); +} + //----------------------------------------------------------------------------- // Code up a string of octets at layer 2 (including CRC, we don't generate // that here) so that they can be transmitted to the reader. Doesn't transmit @@ -114,27 +195,10 @@ static void CodeIso14443bAsTag(const uint8_t *cmd, int len) } // Convert from last byte pos to length - ToSendMax++; + ++ToSendMax; } -//----------------------------------------------------------------------------- -// The software UART that receives commands from the reader, and its state -// variables. -//----------------------------------------------------------------------------- -static struct { - enum { - STATE_UNSYNCD, - STATE_GOT_FALLING_EDGE_OF_SOF, - STATE_AWAITING_START_BIT, - STATE_RECEIVING_DATA - } state; - uint16_t shiftReg; - int bitCnt; - int byteCnt; - int byteCntMax; - int posCnt; - uint8_t *output; -} Uart; + /* Receive & handle a bit coming from the reader. * @@ -262,25 +326,6 @@ static RAMFUNC int Handle14443bUartBit(uint8_t bit) return FALSE; } - -static void UartReset() -{ - Uart.byteCntMax = MAX_FRAME_SIZE; - Uart.state = STATE_UNSYNCD; - Uart.byteCnt = 0; - Uart.bitCnt = 0; - Uart.posCnt = 0; - memset(Uart.output, 0x00, MAX_FRAME_SIZE); -} - - -static void UartInit(uint8_t *data) -{ - Uart.output = data; - UartReset(); -} - - //----------------------------------------------------------------------------- // Receive a command (from the reader to us, where we are the simulated tag), // and store it in the given buffer, up to the given maximum length. Keeps @@ -327,13 +372,13 @@ static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) void SimulateIso14443bTag(void) { // the only commands we understand is WUPB, AFI=0, Select All, N=1: - static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB + static const uint8_t cmd1[] = { ISO14443B_REQB, 0x00, 0x08, 0x39, 0x73 }; // WUPB // ... and REQB, AFI=0, Normal Request, N=1: - static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB + static const uint8_t cmd2[] = { ISO14443B_REQB, 0x00, 0x00, 0x71, 0xFF }; // REQB // ... and HLTB - static const uint8_t cmd3[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB + static const uint8_t cmd3[] = { ISO14443B_HALT, 0xff, 0xff, 0xff, 0xff }; // HLTB // ... and ATTRIB - static const uint8_t cmd4[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB + static const uint8_t cmd4[] = { ISO14443B_ATTRIB, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922, // supports only 106kBit/s in both directions, max frame size = 32Bytes, @@ -344,8 +389,6 @@ void SimulateIso14443bTag(void) }; // response to HLTB and ATTRIB static const uint8_t response2[] = {0x00, 0x78, 0xF0}; - - uint8_t parity[MAX_PARITY_SIZE] = {0x00}; FpgaDownloadAndGo(FPGA_BITSTREAM_HF); @@ -357,7 +400,8 @@ void SimulateIso14443bTag(void) uint16_t respLen, respCodeLen; // allocate command receive buffer - BigBuf_free(); + BigBuf_free(); BigBuf_Clear_ext(false); + uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); uint16_t len; @@ -388,7 +432,9 @@ void SimulateIso14443bTag(void) break; } - LogTrace(receivedCmd, len, 0, 0, parity, TRUE); + if (tracing) + LogTrace(receivedCmd, len, 0, 0, NULL, TRUE); + // Good, look at the command now. if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0) @@ -405,6 +451,7 @@ void SimulateIso14443bTag(void) respCodeLen = resp2CodeLen; } else { Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd); + // And print whether the CRC fails, just for good measure uint8_t b1, b2; if (len >= 3){ // if crc exists @@ -426,9 +473,9 @@ void SimulateIso14443bTag(void) //break; } - cmdsRecvd++; + ++cmdsRecvd; - if(cmdsRecvd > 0x30) { + if(cmdsRecvd > 0xFF) { DbpString("many commands later..."); break; } @@ -442,41 +489,29 @@ void SimulateIso14443bTag(void) AT91C_BASE_SSC->SSC_THR = 0xff; FpgaSetupSsc(); - uint8_t c; - // clear receiving shift register and holding register - while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); - c = AT91C_BASE_SSC->SSC_RHR; (void) c; - while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); - c = AT91C_BASE_SSC->SSC_RHR; (void) c; - - // Clear TXRDY: - AT91C_BASE_SSC->SSC_THR = 0x00; - // Transmit the response. - uint16_t FpgaSendQueueDelay = 0; uint16_t i = 0; - for(;i < respCodeLen; ) { + volatile uint8_t b; + for(;;) { if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { - AT91C_BASE_SSC->SSC_THR = respCode[i++]; - FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; + uint8_t b = respCode[i]; + + AT91C_BASE_SSC->SSC_THR = b; + + ++i; + if(i > respCodeLen) + break; + } - if(BUTTON_PRESS()) break; - } - - // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: - uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; - for (i = 0; i <= fpga_queued_bits/8 + 1; ) { - if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { - AT91C_BASE_SSC->SSC_THR = 0x00; - FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; - i++; + if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { + b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; + (void)b; } } - LogTrace(resp, respLen, 0, 0, parity, FALSE); + if (tracing) + LogTrace(resp, respLen, 0, 0, NULL, FALSE); } - FpgaDisableSscDma(); - set_tracing(FALSE); } //============================================================================= @@ -486,29 +521,6 @@ void SimulateIso14443bTag(void) // PC side. //============================================================================= -static struct { - enum { - DEMOD_UNSYNCD, - DEMOD_PHASE_REF_TRAINING, - DEMOD_AWAITING_FALLING_EDGE_OF_SOF, - DEMOD_GOT_FALLING_EDGE_OF_SOF, - DEMOD_AWAITING_START_BIT, - DEMOD_RECEIVING_DATA - } state; - int bitCount; - int posCount; - int thisBit; -/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. - int metric; - int metricN; -*/ - uint16_t shiftReg; - uint8_t *output; - int len; - int sumI; - int sumQ; -} Demod; - /* * Handles reception of a bit from the tag * @@ -523,15 +535,13 @@ static struct { * false if we are still waiting for some more * */ - #define abs(x) ( ((x)<0) ? -(x) : (x) ) +#ifndef SUBCARRIER_DETECT_THRESHOLD +# define SUBCARRIER_DETECT_THRESHOLD 6 +#endif + static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) { int v = 0; - int ai = abs(ci); - int aq = abs(cq); - int halfci = (ai >> 1); - int halfcq = (aq >> 1); - // The soft decision on the bit uses an estimate of just the // quadrant of the reference angle, not the exact angle. #define MAKE_SOFT_DECISION() { \ @@ -547,18 +557,62 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) } \ } -#define SUBCARRIER_DETECT_THRESHOLD 8 - +// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq) +/* #define CHECK_FOR_SUBCARRIER() { \ + v = ci; \ + if(v < 0) v = -v; \ + if(cq > 0) { \ + v += cq; \ + } else { \ + v -= cq; \ + } \ + } + */ // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq))) #define CHECK_FOR_SUBCARRIER() { \ - v = MAX(ai, aq) + MIN(halfci, halfcq); \ -} + if(ci < 0) { \ + if(cq < 0) { /* ci < 0, cq < 0 */ \ + if (cq < ci) { \ + v = -cq - (ci >> 1); \ + } else { \ + v = -ci - (cq >> 1); \ + } \ + } else { /* ci < 0, cq >= 0 */ \ + if (cq < -ci) { \ + v = -ci + (cq >> 1); \ + } else { \ + v = cq - (ci >> 1); \ + } \ + } \ + } else { \ + if(cq < 0) { /* ci >= 0, cq < 0 */ \ + if (-cq < ci) { \ + v = ci - (cq >> 1); \ + } else { \ + v = -cq + (ci >> 1); \ + } \ + } else { /* ci >= 0, cq >= 0 */ \ + if (cq < ci) { \ + v = ci + (cq >> 1); \ + } else { \ + v = cq + (ci >> 1); \ + } \ + } \ + } \ + } +//note: couldn't we just use MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2) from common.h - marshmellow +#define CHECK_FOR_SUBCARRIER_duo() { \ + v = MAX(ABS(ci),ABS(cq)) + (MIN(ABS(ci),ABS(cq))/2); \ + } switch(Demod.state) { case DEMOD_UNSYNCD: + CHECK_FOR_SUBCARRIER(); - if(v > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected + + // subcarrier detected + if(v > SUBCARRIER_DETECT_THRESHOLD) { Demod.state = DEMOD_PHASE_REF_TRAINING; Demod.sumI = ci; Demod.sumQ = cq; @@ -568,15 +622,17 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) case DEMOD_PHASE_REF_TRAINING: if(Demod.posCount < 8) { - //if(Demod.posCount < 10*2) { + CHECK_FOR_SUBCARRIER(); + if (v > SUBCARRIER_DETECT_THRESHOLD) { // set the reference phase (will code a logic '1') by averaging over 32 1/fs. // note: synchronization time > 80 1/fs Demod.sumI += ci; Demod.sumQ += cq; - Demod.posCount++; - } else { // subcarrier lost + ++Demod.posCount; + } else { + // subcarrier lost Demod.state = DEMOD_UNSYNCD; } } else { @@ -585,37 +641,38 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_AWAITING_FALLING_EDGE_OF_SOF: + MAKE_SOFT_DECISION(); + //Dbprintf("ICE: %d %d %d %d %d", v, Demod.sumI, Demod.sumQ, ci, cq ); - if(v <= 0) { // logic '0' detected + if(v < 0) { // logic '0' detected Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF; Demod.posCount = 0; // start of SOF sequence } else { - if(Demod.posCount > 25*2) { // maximum length of TR1 = 200 1/fs - Demod.state = DEMOD_UNSYNCD; - } + // maximum length of TR1 = 200 1/fs + if(Demod.posCount > 25*2) Demod.state = DEMOD_UNSYNCD; } - Demod.posCount++; + ++Demod.posCount; break; case DEMOD_GOT_FALLING_EDGE_OF_SOF: - Demod.posCount++; + ++Demod.posCount; + MAKE_SOFT_DECISION(); + if(v > 0) { - if(Demod.posCount < 10*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges + // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges + if(Demod.posCount < 9*2) { Demod.state = DEMOD_UNSYNCD; } else { LED_C_ON(); // Got SOF Demod.state = DEMOD_AWAITING_START_BIT; Demod.posCount = 0; Demod.len = 0; -/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. - Demod.metricN = 0; - Demod.metric = 0; -*/ } } else { - if(Demod.posCount > 13*2) { // low phase of SOF too long (> 12 etu) + // low phase of SOF too long (> 12 etu) + if (Demod.posCount > 12*2) { Demod.state = DEMOD_UNSYNCD; LED_C_OFF(); } @@ -623,9 +680,11 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_AWAITING_START_BIT: - Demod.posCount++; + ++Demod.posCount; + MAKE_SOFT_DECISION(); - if(v > 0) { + + if (v > 0) { if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs Demod.state = DEMOD_UNSYNCD; LED_C_OFF(); @@ -640,42 +699,39 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) break; case DEMOD_RECEIVING_DATA: + MAKE_SOFT_DECISION(); - if(Demod.posCount == 0) { // first half of bit + + if (Demod.posCount == 0) { + // first half of bit Demod.thisBit = v; Demod.posCount = 1; - } else { // second half of bit + } else { + // second half of bit Demod.thisBit += v; - -/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented. - if(Demod.thisBit > 0) { - Demod.metric += Demod.thisBit; - } else { - Demod.metric -= Demod.thisBit; - } - (Demod.metricN)++; -*/ - Demod.shiftReg >>= 1; - if(Demod.thisBit > 0) { // logic '1' - Demod.shiftReg |= 0x200; - } - Demod.bitCount++; + // logic '1' + if(Demod.thisBit > 0) Demod.shiftReg |= 0x200; + + ++Demod.bitCount; + if(Demod.bitCount == 10) { + uint16_t s = Demod.shiftReg; - if((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0' + + // stop bit == '1', start bit == '0' + if((s & 0x200) && !(s & 0x001)) { uint8_t b = (s >> 1); Demod.output[Demod.len] = b; - Demod.len++; + ++Demod.len; Demod.state = DEMOD_AWAITING_START_BIT; } else { Demod.state = DEMOD_UNSYNCD; LED_C_OFF(); - if(s == 0x000) { - // This is EOF (start, stop and all data bits == '0' - return TRUE; - } + + // This is EOF (start, stop and all data bits == '0' + if(s == 0) return TRUE; } } Demod.posCount = 0; @@ -691,28 +747,6 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq) } -static void DemodReset() -{ - // Clear out the state of the "UART" that receives from the tag. - Demod.len = 0; - Demod.state = DEMOD_UNSYNCD; - Demod.posCount = 0; - Demod.sumI = 0; - Demod.sumQ = 0; - Demod.bitCount = 0; - Demod.thisBit = 0; - Demod.shiftReg = 0; - memset(Demod.output, 0x00, MAX_FRAME_SIZE); -} - - -static void DemodInit(uint8_t *data) -{ - Demod.output = data; - DemodReset(); -} - - /* * Demodulate the samples we received from the tag, also log to tracebuffer * quiet: set to 'TRUE' to disable debug output @@ -725,18 +759,19 @@ static void GetSamplesFor14443bDemod(int n, bool quiet) // Allocate memory from BigBuf for some buffers // free all previous allocations first - BigBuf_free(); - - // And put the FPGA in the appropriate mode - FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); + ///BigBuf_free(); // The response (tag -> reader) that we're receiving. // Set up the demodulator for tag -> reader responses. + // this init, can take some time to execute, memset DemodInit(BigBuf_malloc(MAX_FRAME_SIZE)); // The DMA buffer, used to stream samples from the FPGA int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE); + // And put the FPGA in the appropriate mode + FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); + // Setup and start DMA. FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); @@ -759,41 +794,40 @@ static void GetSamplesFor14443bDemod(int n, bool quiet) AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE; } lastRxCounter -= 2; - if(lastRxCounter <= 0) { - lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; - } + + if(lastRxCounter <= 0) + lastRxCounter += ISO14443B_DMA_BUFFER_SIZE; samples += 2; - // - gotFrame = Handle14443bSamplesDemod(ci , cq ); + // is this | 0x01 the error? & 0xfe in https://github.com/Proxmark/proxmark3/issues/103 + // can we double this? + gotFrame = Handle14443bSamplesDemod(ci<<2 , cq<<2); if ( gotFrame ) break; } - if(samples > n || gotFrame) { + if(samples > n || gotFrame) break; - } } + //disable AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; - if (!quiet && Demod.len == 0) { - Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", + if (!quiet) { + Dbprintf("max behindby = %d, samples = %d, gotFrame = %s, Demod.state = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max, samples, - gotFrame, + (gotFrame) ? "true" : "false", + Demod.state, Demod.len, Demod.sumI, Demod.sumQ ); } - //Tracing - if (Demod.len > 0) { - uint8_t parity[MAX_PARITY_SIZE] = {0x00}; - LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE); - } + if (tracing > 0) + LogTrace(Demod.output, Demod.len, samples, samples, NULL, FALSE); } @@ -803,12 +837,11 @@ static void GetSamplesFor14443bDemod(int n, bool quiet) static void TransmitFor14443b(void) { int c; - + volatile uint32_t r; FpgaSetupSsc(); - while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { + while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) AT91C_BASE_SSC->SSC_THR = 0xff; - } // Signal field is ON with the appropriate Red LED LED_D_ON(); @@ -819,10 +852,10 @@ static void TransmitFor14443b(void) for(c = 0; c < 10;) { if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { AT91C_BASE_SSC->SSC_THR = 0xff; - c++; + ++c; } if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { - volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; + r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -832,13 +865,12 @@ static void TransmitFor14443b(void) for(;;) { if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { AT91C_BASE_SSC->SSC_THR = ToSend[c]; - c++; - if(c >= ToSendMax) { + ++c; + if(c >= ToSendMax) break; - } } if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { - volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR; + r = AT91C_BASE_SSC->SSC_RHR; (void)r; } WDT_HIT(); @@ -859,15 +891,14 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len) ToSendReset(); // Establish initial reference level - for(i = 0; i < 40; i++) { + for(i = 0; i < 40; ++i) ToSendStuffBit(1); - } + // Send SOF - for(i = 0; i < 11; i++) { + for(i = 0; i < 10; ++i) ToSendStuffBit(0); - } - for(i = 0; i < len; i++) { + for(i = 0; i < len; ++i) { // Stop bits/EGT ToSendStuffBit(1); ToSendStuffBit(1); @@ -875,32 +906,31 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len) ToSendStuffBit(0); // Data bits b = cmd[i]; - for(j = 0; j < 8; j++) { - if(b & 1) { + for(j = 0; j < 8; ++j) { + if(b & 1) ToSendStuffBit(1); - } else { + else ToSendStuffBit(0); - } + b >>= 1; } } // Send EOF ToSendStuffBit(1); - for(i = 0; i < 11; i++) { + for(i = 0; i < 10; ++i) ToSendStuffBit(0); - } - for(i = 0; i < 8; i++) { + + for(i = 0; i < 8; ++i) ToSendStuffBit(1); - } + // And then a little more, to make sure that the last character makes // it out before we switch to rx mode. - for(i = 0; i < 10; i++) { + for(i = 0; i < 24; ++i) ToSendStuffBit(1); - } // Convert from last character reference to length - ToSendMax++; + ++ToSendMax; } @@ -911,17 +941,18 @@ static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len) { CodeIso14443bAsReader(cmd, len); TransmitFor14443b(); - if (tracing) { - uint8_t parity[MAX_PARITY_SIZE]; - LogTrace(cmd,len, 0, 0, parity, TRUE); - } + + if(trigger) LED_A_ON(); + + if (tracing) LogTrace(cmd, len, 0, 0, NULL, TRUE); } /* Sends an APDU to the tag * TODO: check CRC and preamble */ -int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response) +uint8_t iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response) { + uint8_t crc[2] = {0x00, 0x00}; uint8_t message_frame[message_length + 4]; // PCB message_frame[0] = 0x0A | pcb_blocknum; @@ -935,60 +966,136 @@ int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *respo // send CodeAndTransmit14443bAsReader(message_frame, message_length + 4); // get response - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT*100, TRUE); + GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); if(Demod.len < 3) - { return 0; - } - // TODO: Check CRC + + // VALIDATE CRC + ComputeCrc14443(CRC_14443_B, Demod.output, Demod.len-2, &crc[0], &crc[1]); + if ( crc[0] != Demod.output[Demod.len-2] || crc[1] != Demod.output[Demod.len-1] ) + return 0; + // copy response contents if(response != NULL) - { memcpy(response, Demod.output, Demod.len); - } + return Demod.len; } +/** +* SRx Initialise. +*/ +uint8_t iso14443b_select_srx_card(iso14b_card_select_t *card ) +{ + // INITIATE command: wake up the tag using the INITIATE + static const uint8_t init_srx[] = { ISO14443B_INITIATE, 0x00, 0x97, 0x5b }; + // SELECT command (with space for CRC) + uint8_t select_srx[] = { ISO14443B_SELECT, 0x00, 0x00, 0x00}; + // temp to calc crc. + uint8_t crc[2] = {0x00, 0x00}; + + CodeAndTransmit14443bAsReader(init_srx, sizeof(init_srx)); + GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + + if (Demod.len == 0) return 2; + + // Randomly generated Chip ID + if (card) card->chipid = Demod.output[0]; + + select_srx[1] = Demod.output[0]; + + ComputeCrc14443(CRC_14443_B, select_srx, 2, &select_srx[2], &select_srx[3]); + CodeAndTransmit14443bAsReader(select_srx, sizeof(select_srx)); + GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + + if (Demod.len != 3) return 2; + + // Check the CRC of the answer: + ComputeCrc14443(CRC_14443_B, Demod.output, Demod.len-2 , &crc[0], &crc[1]); + if(crc[0] != Demod.output[1] || crc[1] != Demod.output[2]) return 3; + + // Check response from the tag: should be the same UID as the command we just sent: + if (select_srx[1] != Demod.output[0]) return 1; + + // First get the tag's UID: + select_srx[0] = ISO14443B_GET_UID; + + ComputeCrc14443(CRC_14443_B, select_srx, 1 , &select_srx[1], &select_srx[2]); + CodeAndTransmit14443bAsReader(select_srx, 3); // Only first three bytes for this one + GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + + if (Demod.len != 10) return 2; + + // The check the CRC of the answer + ComputeCrc14443(CRC_14443_B, Demod.output, Demod.len-2, &crc[0], &crc[1]); + if(crc[0] != Demod.output[8] || crc[1] != Demod.output[9]) return 3; + + if (card) { + card->uidlen = 8; + memcpy(card->uid, Demod.output, 8); + } + + return 0; +} /* Perform the ISO 14443 B Card Selection procedure * Currently does NOT do any collision handling. * It expects 0-1 cards in the device's range. * TODO: Support multiple cards (perform anticollision) * TODO: Verify CRC checksums */ -int iso14443b_select_card() +uint8_t iso14443b_select_card(iso14b_card_select_t *card ) { // WUPB command (including CRC) // Note: WUPB wakes up all tags, REQB doesn't wake up tags in HALT state - static const uint8_t wupb[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; + static const uint8_t wupb[] = { ISO14443B_REQB, 0x00, 0x08, 0x39, 0x73 }; // ATTRIB command (with space for CRC) - uint8_t attrib[] = { 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00}; + uint8_t attrib[] = { ISO14443B_ATTRIB, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00}; + // temp to calc crc. + uint8_t crc[2] = {0x00, 0x00}; + // first, wake up the tag CodeAndTransmit14443bAsReader(wupb, sizeof(wupb)); GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + // ATQB too short? - if (Demod.len < 14) - { - return 2; + if (Demod.len < 14) return 2; + + // VALIDATE CRC + ComputeCrc14443(CRC_14443_B, Demod.output, Demod.len-2, &crc[0], &crc[1]); + if ( crc[0] != Demod.output[12] || crc[1] != Demod.output[13] ) + return 3; + + if (card) { + card->uidlen = 4; + memcpy(card->uid, Demod.output+1, 4); + memcpy(card->atqb, Demod.output+5, 7); } - // select the tag // copy the PUPI to ATTRIB memcpy(attrib + 1, Demod.output + 1, 4); - /* copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into - ATTRIB (Param 3) */ + + // copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into ATTRIB (Param 3) attrib[7] = Demod.output[10] & 0x0F; ComputeCrc14443(CRC_14443_B, attrib, 9, attrib + 9, attrib + 10); + CodeAndTransmit14443bAsReader(attrib, sizeof(attrib)); GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + // Answer to ATTRIB too short? - if(Demod.len < 3) - { - return 2; - } + if(Demod.len < 3) return 2; + + // VALIDATE CRC + ComputeCrc14443(CRC_14443_B, Demod.output, Demod.len-2, &crc[0], &crc[1]); + if ( crc[0] != Demod.output[1] || crc[1] != Demod.output[2] ) + return 3; + + // CID + if (card) card->cid = Demod.output[0]; + // reset PCB block number pcb_blocknum = 0; - return 1; + return 0; } // Set up ISO 14443 Type B communication (similar to iso14443a_setup) @@ -996,23 +1103,23 @@ void iso14443b_setup() { FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - BigBuf_free(); + BigBuf_free(); BigBuf_Clear_ext(false); + DemodReset(); + UartReset(); + // Set up the synchronous serial port FpgaSetupSsc(); + // connect Demodulated Signal to ADC: SetAdcMuxFor(GPIO_MUXSEL_HIPKD); // Signal field is on with the appropriate LED LED_D_ON(); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); - - //SpinDelay(100); + SpinDelay(400); // Start the timer - //StartCountSspClk(); - - DemodReset(); - UartReset(); + StartCountSspClk(); } //----------------------------------------------------------------------------- @@ -1024,11 +1131,9 @@ void iso14443b_setup() { // // I tried to be systematic and check every answer of the tag, every CRC, etc... //----------------------------------------------------------------------------- -void ReadSTMemoryIso14443b(uint32_t dwLast) +void ReadSTMemoryIso14443b(uint8_t numofblocks) { FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - BigBuf_free(); - clear_trace(); set_tracing(TRUE); @@ -1047,10 +1152,10 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) // Signal field is on with the appropriate LED LED_D_ON(); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ); - SpinDelay(200); + SpinDelay(300); // First command: wake up the tag using the INITIATE command - uint8_t cmd1[] = {0x06, 0x00, 0x97, 0x5b}; + uint8_t cmd1[] = {ISO14443B_INITIATE, 0x00, 0x97, 0x5b}; CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); @@ -1065,7 +1170,7 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) // There is a response, SELECT the uid DbpString("Now SELECT tag:"); - cmd1[0] = 0x0E; // 0x0E is SELECT + cmd1[0] = ISO14443B_SELECT; // 0x0E is SELECT cmd1[1] = Demod.output[0]; ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); @@ -1091,7 +1196,7 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) // Tag is now selected, // First get the tag's UID: - cmd1[0] = 0x0B; + cmd1[0] = ISO14443B_GET_UID; ComputeCrc14443(CRC_14443_B, cmd1, 1 , &cmd1[1], &cmd1[2]); CodeAndTransmit14443bAsReader(cmd1, 3); // Only first three bytes for this one GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); @@ -1112,12 +1217,13 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0]); // Now loop to read all 16 blocks, address from 0 to last block - Dbprintf("Tag memory dump, block 0 to %d", dwLast); + Dbprintf("Tag memory dump, block 0 to %d", numofblocks); cmd1[0] = 0x08; i = 0x00; - dwLast++; + ++numofblocks; + for (;;) { - if (i == dwLast) { + if (i == numofblocks) { DbpString("System area block (0xff):"); i = 0xff; } @@ -1125,9 +1231,10 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) ComputeCrc14443(CRC_14443_B, cmd1, 2, &cmd1[2], &cmd1[3]); CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1)); GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + if (Demod.len != 6) { // Check if we got an answer from the tag - DbpString("Expected 6 bytes from tag, got less..."); - return; + DbpString("Expected 6 bytes from tag, got less..."); + return; } // The check the CRC of the answer (use cmd1 as temporary variable): ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]); @@ -1140,16 +1247,14 @@ void ReadSTMemoryIso14443b(uint32_t dwLast) Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i, (Demod.output[3]<<24) + (Demod.output[2]<<16) + (Demod.output[1]<<8) + Demod.output[0], (Demod.output[4]<<8)+Demod.output[5]); - if (i == 0xff) { - break; - } - i++; + + if (i == 0xff) break; + ++i; } set_tracing(FALSE); } - //============================================================================= // Finally, the `sniffer' combines elements from both the reader and // simulated tag, to show both sides of the conversation. @@ -1175,7 +1280,7 @@ void RAMFUNC SnoopIso14443b(void) int triggered = TRUE; // TODO: set and evaluate trigger condition FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - BigBuf_free(); + BigBuf_free(); BigBuf_Clear_ext(false); clear_trace(); set_tracing(TRUE); @@ -1213,7 +1318,6 @@ void RAMFUNC SnoopIso14443b(void) upTo = dmaBuf; lastRxCounter = ISO14443B_DMA_BUFFER_SIZE; FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE); - uint8_t parity[MAX_PARITY_SIZE] = {0x00}; bool TagIsActive = FALSE; bool ReaderIsActive = FALSE; @@ -1222,10 +1326,8 @@ void RAMFUNC SnoopIso14443b(void) for(;;) { int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO14443B_DMA_BUFFER_SIZE-1); - if(behindBy > maxBehindBy) { - maxBehindBy = behindBy; - } + if(behindBy > maxBehindBy) maxBehindBy = behindBy; if(behindBy < 2) continue; ci = upTo[0]; @@ -1258,8 +1360,9 @@ void RAMFUNC SnoopIso14443b(void) if (!TagIsActive) { // no need to try decoding reader data if the tag is sending if (Handle14443bUartBit(ci & 0x01)) { - if ( triggered) - LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); + + if(triggered && tracing) + LogTrace(Uart.output, Uart.byteCnt, samples, samples, NULL, TRUE); /* And ready to receive another command. */ UartReset(); @@ -1267,25 +1370,27 @@ void RAMFUNC SnoopIso14443b(void) /* false-triggered by the commands from the reader. */ DemodReset(); } + if (Handle14443bUartBit(cq & 0x01)) { - if (triggered) - LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE); + if(triggered && tracing) + LogTrace(Uart.output, Uart.byteCnt, samples, samples, NULL, TRUE); /* And ready to receive another command. */ UartReset(); /* And also reset the demod code, which might have been */ /* false-triggered by the commands from the reader. */ DemodReset(); - } + } ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF); } if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time // is this | 0x01 the error? & 0xfe in https://github.com/Proxmark/proxmark3/issues/103 - if(Handle14443bSamplesDemod(ci & 0xfe, cq & 0xfe)) { + if(Handle14443bSamplesDemod(ci | 0x01, cq | 0x01)) { //Use samples as a time measurement - LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE); + if(tracing) + LogTrace(Demod.output, Demod.len, samples, samples, NULL, FALSE); triggered = TRUE; @@ -1309,41 +1414,94 @@ void RAMFUNC SnoopIso14443b(void) set_tracing(FALSE); } +void iso14b_set_trigger(bool enable) { + trigger = enable; +} /* * Send raw command to tag ISO14443B * @Input - * datalen len of buffer data - * recv bool when true wait for data from tag and send to client - * powerfield bool leave the field on when true - * data buffer with byte to send + * param flags enum ISO14B_COMMAND. (mifare.h) + * len len of buffer data + * data buffer with bytes to send * * @Output * none * */ -void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[]) +void SendRawCommand14443B_Ex(UsbCommand *c) { - iso14443b_setup(); + iso14b_command_t param = c->arg[0]; + size_t len = c->arg[1] & 0xffff; + uint8_t *cmd = c->d.asBytes; + uint8_t status = 0; + uint32_t sendlen = sizeof(iso14b_card_select_t); + uint8_t buf[USB_CMD_DATA_SIZE] = {0x00}; + + if (MF_DBGLEVEL > 3) Dbprintf("param, %04x", param ); - if ( datalen == 0 && recv == 0 && powerfield == 0){ - - } else { - set_tracing(TRUE); - CodeAndTransmit14443bAsReader(data, datalen); + // turn on trigger (LED_A) + if (param & ISO14B_REQUEST_TRIGGER) + iso14b_set_trigger(TRUE); + + if (param & ISO14B_CONNECT) { + // Make sure that we start from off, since the tags are stateful; + // confusing things will happen if we don't reset them between reads. + LED_D_OFF(); + FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); + SpinDelay(200); + clear_trace(); + iso14443b_setup(); } + + set_tracing(TRUE); - if (recv) { - GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, FALSE); - uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE); - cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen); + if ( param & ISO14B_SELECT_STD) { + iso14b_card_select_t *card = (iso14b_card_select_t*)buf; + status = iso14443b_select_card(card); + cmd_send(CMD_ACK, status, sendlen, 0, buf, sendlen); + // 0: OK 2: attrib fail, 3:crc fail, + if ( status > 0 ) return; + } + + if ( param & ISO14B_SELECT_SR) { + iso14b_card_select_t *card = (iso14b_card_select_t*)buf; + status = iso14443b_select_srx_card(card); + cmd_send(CMD_ACK, status, sendlen, 0, buf, sendlen); + // 0: OK 2: attrib fail, 3:crc fail, + if ( status > 0 ) return; + } + + if (param & ISO14B_APDU) { + status = iso14443b_apdu(cmd, len, buf); + cmd_send(CMD_ACK, status, status, 0, buf, status); + } + + if (param & ISO14B_RAW) { + if(param & ISO14B_APPEND_CRC) { + AppendCrc14443b(cmd, len); + len += 2; + } + + CodeAndTransmit14443bAsReader(cmd, len); + GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE); + + sendlen = MIN(Demod.len, USB_CMD_DATA_SIZE); + status = (Demod.len > 0) ? 0 : 1; + cmd_send(CMD_ACK, status, sendlen, 0, Demod.output, sendlen); } - if (!powerfield) { + // turn off trigger (LED_A) + if (param & ISO14B_REQUEST_TRIGGER) + iso14a_set_trigger(FALSE); + + // turn off antenna et al + // we don't send a HALT command. + if ( param & ISO14B_DISCONNECT) { + if (MF_DBGLEVEL > 3) Dbprintf("disconnect"); FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); FpgaDisableSscDma(); set_tracing(FALSE); - LED_D_OFF(); + LEDsoff(); } -} - +} \ No newline at end of file