X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/64d1b4efc932898dc250dbc5d8f7418e3643b27b..09181a54620f1f8feda0cada2daf7058cf482ad3:/common/usb_cdc.c

diff --git a/common/usb_cdc.c b/common/usb_cdc.c
index ccbb3c50..049cb8cf 100644
--- a/common/usb_cdc.c
+++ b/common/usb_cdc.c
@@ -235,31 +235,32 @@ void usb_disable() {
 //* \brief This function Activates the USB device
 //*----------------------------------------------------------------------------
 void usb_enable() {
-  // Set the PLL USB Divider
-  AT91C_BASE_CKGR->CKGR_PLLR |= AT91C_CKGR_USBDIV_1 ;
-  
-  // Specific Chip USB Initialisation
-  // Enables the 48MHz USB clock UDPCK and System Peripheral USB Clock
-  AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UDP;
-  AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_UDP);
-  
-  // Enable UDP PullUp (USB_DP_PUP) : enable & Clear of the corresponding PIO
-  // Set in PIO mode and Configure in Output
-  AT91C_BASE_PIOA->PIO_PER = GPIO_USB_PU; // Set in PIO mode
+	// Set the PLL USB Divider
+	AT91C_BASE_CKGR->CKGR_PLLR |= AT91C_CKGR_USBDIV_1 ;
+
+	// Specific Chip USB Initialisation
+	// Enables the 48MHz USB clock UDPCK and System Peripheral USB Clock
+	AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UDP;
+	AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_UDP);
+
+	// Enable UDP PullUp (USB_DP_PUP) : enable & Clear of the corresponding PIO
+	// Set in PIO mode and Configure in Output
+	AT91C_BASE_PIOA->PIO_PER = GPIO_USB_PU; // Set in PIO mode
 	AT91C_BASE_PIOA->PIO_OER = GPIO_USB_PU; // Configure as Output
-  
-  // Clear for set the Pullup resistor
+
+	// Clear for set the Pullup resistor
 	AT91C_BASE_PIOA->PIO_CODR = GPIO_USB_PU;
-  
-  // Disconnect and reconnect USB controller for 100ms
-  usb_disable();
-  
-  // Wait for a short while
-  for (volatile size_t i=0; i<0x100000; i++);
 
-  // Reconnect USB reconnect
-  AT91C_BASE_PIOA->PIO_SODR = GPIO_USB_PU;
-  AT91C_BASE_PIOA->PIO_OER = GPIO_USB_PU;
+	// Disconnect and reconnect USB controller for 100ms
+	usb_disable();
+
+	// Wait for a short while
+	for (volatile size_t i=0; i<0x100000; i++);
+    //sleep(1);
+	
+	// Reconnect USB reconnect
+	AT91C_BASE_PIOA->PIO_SODR = GPIO_USB_PU;
+	AT91C_BASE_PIOA->PIO_OER = GPIO_USB_PU;
 }
 
 //*----------------------------------------------------------------------------
@@ -293,31 +294,47 @@ bool usb_poll()
   return (pUdp->UDP_CSR[AT91C_EP_OUT] & btReceiveBank);
 }
 
+/**
+	In github PR #129, some users appears to get a false positive from
+	usb_poll, which returns true, but the usb_read operation
+	still returns 0.
+	This check is basically the same as above, but also checks
+	that the length available to read is non-zero, thus hopefully fixes the
+	bug.
+**/
+bool usb_poll_validate_length()
+{
+	if (!usb_check()) return false;
+	if (!(pUdp->UDP_CSR[AT91C_EP_OUT] & btReceiveBank)) return false;
+	return (pUdp->UDP_CSR[AT91C_EP_OUT] >> 16) >  0;
+}
+
 //*----------------------------------------------------------------------------
 //* \fn    usb_read
 //* \brief Read available data from Endpoint OUT
 //*----------------------------------------------------------------------------
 uint32_t usb_read(byte_t* data, size_t len) {
-  byte_t bank = btReceiveBank;
+	byte_t bank = btReceiveBank;
 	uint32_t packetSize, nbBytesRcv = 0;
-  uint32_t time_out = 0;
+	uint32_t time_out = 0;
   
 	while (len)  {
 		if (!usb_check()) break;
 
 		if ( pUdp->UDP_CSR[AT91C_EP_OUT] & bank ) {
 			packetSize = MIN(pUdp->UDP_CSR[AT91C_EP_OUT] >> 16, len);
-      len -= packetSize;
+			len -= packetSize;
 			while(packetSize--)
 				data[nbBytesRcv++] = pUdp->UDP_FDR[AT91C_EP_OUT];
+			
 			pUdp->UDP_CSR[AT91C_EP_OUT] &= ~(bank);
-			if (bank == AT91C_UDP_RX_DATA_BK0) {
+			
+			if (bank == AT91C_UDP_RX_DATA_BK0)
 				bank = AT91C_UDP_RX_DATA_BK1;
-      } else {
-				bank = AT91C_UDP_RX_DATA_BK0;
-      }
+			else
+				bank = AT91C_UDP_RX_DATA_BK0;		
 		}
-    if (time_out++ == 0x1fff) break;
+		if (time_out++ == 0x1fff) break;
 	}
 
 	btReceiveBank = bank;
@@ -329,11 +346,11 @@ uint32_t usb_read(byte_t* data, size_t len) {
 //* \brief Send through endpoint 2
 //*----------------------------------------------------------------------------
 uint32_t usb_write(const byte_t* data, const size_t len) {
-  size_t length = len;
+	size_t length = len;
 	uint32_t cpt = 0;
 
-  if (!length) return 0;
-  if (!usb_check()) return 0;
+	if (!length) return 0;
+	if (!usb_check()) return 0;
   
 	// Send the first packet
 	cpt = MIN(length, AT91C_EP_IN_SIZE-1);
@@ -349,16 +366,18 @@ uint32_t usb_write(const byte_t* data, const size_t len) {
 		// Wait for the the first bank to be sent
 		while (!(pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP)) {
 			if (!usb_check()) return length;
-    }
+		}
 		pUdp->UDP_CSR[AT91C_EP_IN] &= ~(AT91C_UDP_TXCOMP);
+		
 		while (pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP);
+		
 		pUdp->UDP_CSR[AT91C_EP_IN] |= AT91C_UDP_TXPKTRDY;
 	}
   
 	// Wait for the end of transfer
 	while (!(pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP)) {
 		if (!usb_check()) return length;
-  }
+	}
   
 	pUdp->UDP_CSR[AT91C_EP_IN] &= ~(AT91C_UDP_TXCOMP);
 	while (pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP);