X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/6949aca9fa0e37539fc277bac78e3d7a22117467..8d436e81afab78deb2a9ab450bd61eea546b953f:/armsrc/lfops.c?ds=sidebyside

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index c2d908df..c9449089 100644
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -9,15 +9,16 @@
 #include "hitag2.h"
 #include "../common/crc16.c"
 
+int sprintf(char *dest, const char *fmt, ...);
+
 void AcquireRawAdcSamples125k(BOOL at134khz)
 {
-	if(at134khz) {
+	if (at134khz)
 		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-		FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-	} else {
+	else
 		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-		FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-	}
+
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
 
 	// Connect the A/D to the peak-detected low-frequency path.
 	SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
@@ -29,36 +30,35 @@ void AcquireRawAdcSamples125k(BOOL at134khz)
 	FpgaSetupSsc();
 
 	// Now call the acquisition routine
-	DoAcquisition125k(at134khz);
+	DoAcquisition125k();
 }
 
 // split into two routines so we can avoid timing issues after sending commands //
-void DoAcquisition125k(BOOL at134khz)
+void DoAcquisition125k(void)
 {
 	BYTE *dest = (BYTE *)BigBuf;
 	int n = sizeof(BigBuf);
 	int i;
-
-	memset(dest,0,n);
+	
+	memset(dest, 0, n);
 	i = 0;
 	for(;;) {
-		if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
+		if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
 			AT91C_BASE_SSC->SSC_THR = 0x43;
 			LED_D_ON();
 		}
-		if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
+		if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
 			dest[i] = (BYTE)AT91C_BASE_SSC->SSC_RHR;
 			i++;
 			LED_D_OFF();
-			if(i >= n) {
-				break;
-			}
+			if (i >= n) break;
 		}
 	}
-	DbpIntegers(dest[0], dest[1], at134khz);
+	Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
+			dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
 }
 
-void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYTE *command)
+void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, BYTE *command)
 {
 	BOOL at134khz;
 
@@ -67,18 +67,17 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
 	SpinDelay(2500);
 	
 	// see if 'h' was specified
-	if(command[strlen((char *) command) - 1] == 'h')
-		at134khz= TRUE;
+	if (command[strlen((char *) command) - 1] == 'h')
+		at134khz = TRUE;
 	else
-		at134khz= FALSE;
+		at134khz = FALSE;
 
-	if(at134khz) {
+	if (at134khz)
 		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-		FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-	} else {
+	else
 		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-		FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-	}
+
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
 
 	// Give it a bit of time for the resonant antenna to settle.
 	SpinDelay(50);
@@ -89,38 +88,34 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
 	FpgaSetupSsc();
 
 	// now modulate the reader field
-	while(*command != '\0' && *command != ' ')
-		{
+	while(*command != '\0' && *command != ' ') {
 		FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 		LED_D_OFF();
 		SpinDelayUs(delay_off);
-		if(at134khz) {
+		if (at134khz)
 			FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-			FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-		} else {
+		else
 			FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-			FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-		}
+
+		FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
 		LED_D_ON();
-		if(*(command++) == '0') {
+		if(*(command++) == '0')
 			SpinDelayUs(period_0);
-		} else {
+		else
 			SpinDelayUs(period_1);
-		}
-		}
+	}
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 	LED_D_OFF();
 	SpinDelayUs(delay_off);
-	if(at134khz) {
+	if (at134khz)
 		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-		FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-	} else {
+	else
 		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-		FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-	}
+
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
 
 	// now do the read
-	DoAcquisition125k(at134khz);
+	DoAcquisition125k();
 }
 
 /* blank r/w tag data stream
@@ -132,7 +127,7 @@ void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYT
 
 [5555fe852c5555555555555555fe0000]
 */
-void ReadTItag()
+void ReadTItag(void)
 {
 	// some hardcoded initial params
 	// when we read a TI tag we sample the zerocross line at 2Mhz
@@ -254,11 +249,10 @@ void ReadTItag()
 		crc = update_crc16(crc, (shift1>>16)&0xff);
 		crc = update_crc16(crc, (shift1>>24)&0xff);
 
-		DbpString("Info: Tag data_hi, data_lo, crc = ");
-		DbpIntegers(shift1, shift0, shift2&0xffff);
+		Dbprintf("Info: Tag data: %x%08x, crc=%x",
+			(unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
 		if (crc != (shift2&0xffff)) {
-			DbpString("Error: CRC mismatch, expected");
-			DbpIntegers(0, 0, crc);
+			Dbprintf("Error: CRC mismatch, expected %x", (unsigned int)crc);
 		} else {
 			DbpString("Info: CRC is good");
 		}
@@ -306,7 +300,7 @@ void AcquireTiType(void)
 
 	// steal this pin from the SSP and use it to control the modulation
 	AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
-	AT91C_BASE_PIOA->PIO_OER	= GPIO_SSC_DOUT;
+	AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
 
 	AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST;
 	AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN;
@@ -350,7 +344,6 @@ void AcquireTiType(void)
 	n = TIBUFLEN*32;
 	// unpack buffer
 	for (i=TIBUFLEN-1; i>=0; i--) {
-//		DbpIntegers(0, 0, BigBuf[i]);
 		for (j=0; j<32; j++) {
 			if(BigBuf[i] & (1 << j)) {
 				dest[--n] = 1;
@@ -366,11 +359,6 @@ void AcquireTiType(void)
 // if not provided a valid crc will be computed from the data and written.
 void WriteTItag(DWORD idhi, DWORD idlo, WORD crc)
 {
-
-	// WARNING the order of the bytes in which we calc crc below needs checking
-	// i'm 99% sure the crc algorithm is correct, but it may need to eat the
-	// bytes in reverse or something
-
 	if(crc == 0) {
 	 	crc = update_crc16(crc, (idlo)&0xff);
 		crc = update_crc16(crc, (idlo>>8)&0xff);
@@ -381,8 +369,8 @@ void WriteTItag(DWORD idhi, DWORD idlo, WORD crc)
 		crc = update_crc16(crc, (idhi>>16)&0xff);
 		crc = update_crc16(crc, (idhi>>24)&0xff);
 	}
-	DbpString("Writing the following data to tag:");
-	DbpIntegers(idhi, idlo, crc);
+	Dbprintf("Writing to tag: %x%08x, crc=%x",
+		(unsigned int) idhi, (unsigned int) idlo, crc);
 
 	// TI tags charge at 134.2Khz
 	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
@@ -395,7 +383,7 @@ void WriteTItag(DWORD idhi, DWORD idlo, WORD crc)
 
 	// steal this pin from the SSP and use it to control the modulation
 	AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
-	AT91C_BASE_PIOA->PIO_OER	= GPIO_SSC_DOUT;
+	AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
 
 	// writing algorithm:
 	// a high bit consists of a field off for 1ms and field on for 1ms
@@ -926,8 +914,8 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 				found=1;
 				idx+=6;
 				if (found && (hi|lo)) {
-					DbpString("TAG ID");
-					DbpIntegers(hi, lo, (lo>>1)&0xffff);
+					Dbprintf("TAG ID: %x%08x (%d)",
+						(unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
 					/* if we're only looking for one tag */
 					if (findone)
 					{
@@ -959,8 +947,8 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 				found=1;
 				idx+=6;
 				if (found && (hi|lo)) {
-					DbpString("TAG ID");
-					DbpIntegers(hi, lo, (lo>>1)&0xffff);
+					Dbprintf("TAG ID: %x%08x (%d)",
+						(unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
 					/* if we're only looking for one tag */
 					if (findone)
 					{