X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/709665b5d1abddd92403082c23f13e8cddfcd508..8f2268397d48fe9477eaf3784680b4114d36dcac:/armsrc/lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 5cdfe834..2079f263 100644
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -17,7 +17,7 @@
 #include "lfdemod.h"
 #include "lfsampling.h"
 #include "protocols.h"
-#include "usb_cdc.h" //test
+#include "usb_cdc.h" // for usb_poll_validate_length
 
 /**
  * Function to do a modulation and then get samples.
@@ -37,6 +37,8 @@ void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint
 
 	sample_config sc = { 0,0,1, divisor_used, 0};
 	setSamplingConfig(&sc);
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
 
 	/* Make sure the tag is reset */
 	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
@@ -377,7 +379,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 	AcquireTiType();
 
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-	DbpString("Now use tiread to check");
+	DbpString("Now use `lf ti read` to check");
 }
 
 void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
@@ -640,6 +642,19 @@ static void biphaseSimBit(uint8_t c, int *n, uint8_t clock, uint8_t *phase)
 		memset(dest+(*n), c ^ *phase, clock);
 		*phase ^= 1;
 	}
+	*n += clock;
+}
+
+static void stAskSimBit(int *n, uint8_t clock) {
+	uint8_t *dest = BigBuf_get_addr();
+	uint8_t halfClk = clock/2;
+	//ST = .5 high .5 low 1.5 high .5 low 1 high	
+	memset(dest+(*n), 1, halfClk);
+	memset(dest+(*n) + halfClk, 0, halfClk);
+	memset(dest+(*n) + clock, 1, clock + halfClk);
+	memset(dest+(*n) + clock*2 + halfClk, 0, halfClk);
+	memset(dest+(*n) + clock*3, 1, clock);
+	*n += clock*4;
 }
 
 // args clock, ask/man or askraw, invert, transmission separator
@@ -657,7 +672,7 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 		for (i=0; i<size; i++){
 			biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
 		}
-		if (BitStream[0]==BitStream[size-1]){ //run a second set inverted to keep phase in check
+		if (phase==1) { //run a second set inverted to keep phase in check
 			for (i=0; i<size; i++){
 				biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
 			}
@@ -672,8 +687,10 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 			}
 		}
 	}
-	
-	if (separator==1) Dbprintf("sorry but separator option not yet available"); 
+	if (separator==1 && encoding == 1)
+		stAskSimBit(&n, clk);
+	else if (separator==1)
+		Dbprintf("sorry but separator option not yet available");
 
 	Dbprintf("Simulating with clk: %d, invert: %d, encoding: %d, separator: %d, n: %d",clk, invert, encoding, separator, n);
 	//DEBUG
@@ -683,7 +700,7 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 	//Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
 	//i+=16;
 	//Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-
+	
 	if (ledcontrol) LED_A_ON();
 	SimulateTagLowFrequency(n, 0, ledcontrol);
 	if (ledcontrol) LED_A_OFF();
@@ -752,6 +769,9 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
+
 	while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
 		WDT_HIT();
@@ -837,6 +857,8 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 	uint8_t *dest = BigBuf_get_addr();
 	size_t size; 
 	int idx=0;
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
@@ -927,6 +949,8 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
 	int clk=0, invert=0, errCnt=0, maxErr=20;
 	uint32_t hi=0;
 	uint64_t lo=0;
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
@@ -986,6 +1010,8 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 	uint8_t version=0;
 	uint8_t facilitycode=0;
 	uint16_t number=0;
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
@@ -1079,7 +1105,7 @@ void T55xxWriteBit(int bit) {
 void T55xxResetRead(void) {
 	LED_A_ON();
 	//clear buffer now so it does not interfere with timing later
-	BigBuf_Clear_ext(false);
+	BigBuf_Clear_keep_EM();
 
 	// Set up FPGA, 125kHz
 	LFSetupFPGAForADC(95, true);
@@ -1404,7 +1430,7 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo) {
 	LED_D_ON();
 
 	// Write EM410x ID
-	uint32_t data[] = {0, id>>32, id & 0xFFFFFFFF};
+	uint32_t data[] = {0, (uint32_t)(id>>32), (uint32_t)(id & 0xFFFFFFFF)};
 
 	clock = (card & 0xFF00) >> 8;
 	clock = (clock == 0) ? 64 : clock;