X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/78f59945a725db88acacc772a37f32ff6debea56..8255e1a68529de7e040bc8609a0efb92098c76ae:/armsrc/iso14443b.c diff --git a/armsrc/iso14443b.c b/armsrc/iso14443b.c index 00d2e7a3..68f0c366 100644 --- a/armsrc/iso14443b.c +++ b/armsrc/iso14443b.c @@ -453,7 +453,7 @@ static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) { StartCountSspClk(); - volatile uint8_t b; + volatile uint8_t b = 0; // clear receiving shift register and holding register // What does this loop do? Is it TR1? @@ -467,7 +467,6 @@ static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len) { // Now run a `software UART' on the stream of incoming samples. UartInit(received); - b = 0; uint8_t mask; while( !BUTTON_PRESS() ) { WDT_HIT(); @@ -490,11 +489,11 @@ void ClearFpgaShiftingRegisters(void){ volatile uint8_t b; // clear receiving shift register and holding register - while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); + while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) {}; b = AT91C_BASE_SSC->SSC_RHR; (void) b; - while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); + while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) {}; b = AT91C_BASE_SSC->SSC_RHR; (void) b; @@ -1639,11 +1638,11 @@ void RAMFUNC SnoopIso14443b(void) { if (triggered) LogTrace(Uart.output, Uart.byteCnt, time_start, time_stop, NULL, TRUE); - /* And ready to receive another command. */ - UartReset(); - /* And also reset the demod code, which might have been */ - /* false-triggered by the commands from the reader. */ - DemodReset(); + /* And ready to receive another command. */ + UartReset(); + /* And also reset the demod code, which might have been */ + /* false-triggered by the commands from the reader. */ + DemodReset(); } else { time_start = GetCountSspClk() - time_0; } @@ -1771,4 +1770,4 @@ void SendRawCommand14443B_Ex(UsbCommand *c) //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); } -} +} \ No newline at end of file