X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/8ddfbc34dca5e3780862d97fd7ea91f309bd75a1..29ff374e5d219f2bc219309fd613372a8dfb5c4f:/armsrc/lfops.c diff --git a/armsrc/lfops.c b/armsrc/lfops.c index c80700ae..5931c76a 100644 --- a/armsrc/lfops.c +++ b/armsrc/lfops.c @@ -91,6 +91,7 @@ void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t periods, uint3 */ void ReadTItag(void) { + StartTicks(); // some hardcoded initial params // when we read a TI tag we sample the zerocross line at 2Mhz // TI tags modulate a 1 as 16 cycles of 123.2Khz @@ -216,6 +217,7 @@ void ReadTItag(void) DbpString("Info: CRC is good"); } } + StopTicks(); } void WriteTIbyte(uint8_t b) @@ -282,7 +284,7 @@ void AcquireTiType(void) HIGH(GPIO_SSC_DOUT); // Charge TI tag for 50ms. - SpinDelay(50); + WaitMS(50); // stop modulating antenna and listen LOW(GPIO_SSC_DOUT); @@ -322,6 +324,7 @@ void AcquireTiType(void) // if not provided a valid crc will be computed from the data and written. void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc) { + StartTicks(); FpgaDownloadAndGo(FPGA_BITSTREAM_LF); if(crc == 0) { crc = update_crc16(crc, (idlo)&0xff); @@ -360,7 +363,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc) // modulate antenna HIGH(GPIO_SSC_DOUT); - SpinDelay(50); // charge time + WaitMS(50); // charge time WriteTIbyte(0xbb); // keyword WriteTIbyte(0xeb); // password @@ -377,7 +380,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc) WriteTIbyte(0x00); // write frame lo WriteTIbyte(0x03); // write frame hi HIGH(GPIO_SSC_DOUT); - SpinDelay(50); // programming time + WaitMS(50); // programming time LED_A_OFF(); @@ -386,6 +389,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc) FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); DbpString("Now use `lf ti read` to check"); + StopTicks(); } void SimulateTagLowFrequency(int period, int gap, int ledcontrol) @@ -393,6 +397,8 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol) int i = 0; uint8_t *tab = BigBuf_get_addr(); + StartTicks(); + FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD); AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK; @@ -441,6 +447,7 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol) } } } + StopTicks(); } #define DEBUG_FRAME_CONTENTS 1