X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/99cf19d9e8b450422f61c467751e8570537ab718..aacb96d7ed1723663fddd4e2611c22c971442cbd:/armsrc/iso14443b.c?ds=inline

diff --git a/armsrc/iso14443b.c b/armsrc/iso14443b.c
index ee7f18f2..9d033f61 100644
--- a/armsrc/iso14443b.c
+++ b/armsrc/iso14443b.c
@@ -13,12 +13,15 @@
 #include "apps.h"
 #include "util.h"
 #include "string.h"
-
 #include "iso14443crc.h"
-
-#define RECEIVE_SAMPLES_TIMEOUT 2000
+#include "common.h"
+#define RECEIVE_SAMPLES_TIMEOUT 600000
 #define ISO14443B_DMA_BUFFER_SIZE 256
 
+
+// PCB Block number for APDUs
+static uint8_t pcb_blocknum = 0;
+
 //=============================================================================
 // An ISO 14443 Type B tag. We listen for commands from the reader, using
 // a UART kind of thing that's implemented in software. When we get a
@@ -266,6 +269,8 @@ static void UartReset()
 	Uart.state = STATE_UNSYNCD;
 	Uart.byteCnt = 0;
 	Uart.bitCnt = 0;
+	Uart.posCnt = 0;
+	memset(Uart.output, 0x00, MAX_FRAME_SIZE);
 }
 
 
@@ -321,10 +326,14 @@ static int GetIso14443bCommandFromReader(uint8_t *received, uint16_t *len)
 //-----------------------------------------------------------------------------
 void SimulateIso14443bTag(void)
 {
-	// the only commands we understand is REQB, AFI=0, Select All, N=0:
-	static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
-	// ... and REQB, AFI=0, Normal Request, N=0:
-	static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF };
+	// the only commands we understand is WUPB, AFI=0, Select All, N=1:
+	static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB
+	// ... and REQB, AFI=0, Normal Request, N=1:
+	static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB
+	// ... and HLTB
+	static const uint8_t cmd3[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB
+	// ... and ATTRIB
+	static const uint8_t cmd4[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB
 
 	// ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
 	// supports only 106kBit/s in both directions, max frame size = 32Bytes,
@@ -333,8 +342,10 @@ void SimulateIso14443bTag(void)
 		0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
 		0x00, 0x21, 0x85, 0x5e, 0xd7
 	};
+	// response to HLTB and ATTRIB
+	static const uint8_t response2[] = {0x00, 0x78, 0xF0};
 
-	uint8_t parity[MAX_PARITY_SIZE];
+	uint8_t parity[MAX_PARITY_SIZE] = {0x00};
 				
 	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
 
@@ -358,6 +369,12 @@ void SimulateIso14443bTag(void)
 	memcpy(resp1Code, ToSend, ToSendMax); 
 	uint16_t resp1CodeLen = ToSendMax;
 
+	// prepare the (other) tag answer:
+	CodeIso14443bAsTag(response2, sizeof(response2));
+	uint8_t *resp2Code = BigBuf_malloc(ToSendMax);
+	memcpy(resp2Code, ToSend, ToSendMax); 
+	uint16_t resp2CodeLen = ToSendMax;
+
 	// We need to listen to the high-frequency, peak-detected path.
 	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
 	FpgaSetupSsc();
@@ -366,14 +383,12 @@ void SimulateIso14443bTag(void)
 
 	for(;;) {
 
-		if(!GetIso14443bCommandFromReader(receivedCmd, &len)) {
-		Dbprintf("button pressed, received %d commands", cmdsRecvd);
-		break;
+		if (!GetIso14443bCommandFromReader(receivedCmd, &len)) {
+			Dbprintf("button pressed, received %d commands", cmdsRecvd);
+			break;
 		}
 
-		if (tracing) {
-			LogTrace(receivedCmd, len, 0, 0, parity, TRUE);
-		}
+		LogTrace(receivedCmd, len, 0, 0, parity, TRUE);
 
 		// Good, look at the command now.
 		if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0)
@@ -382,18 +397,33 @@ void SimulateIso14443bTag(void)
 			respLen = sizeof(response1);
 			respCode = resp1Code; 
 			respCodeLen = resp1CodeLen;
+		} else if ( (len == sizeof(cmd3) && receivedCmd[0] == cmd3[0])
+			|| (len == sizeof(cmd4) && receivedCmd[0] == cmd4[0]) ) {
+			resp = response2; 
+			respLen = sizeof(response2);
+			respCode = resp2Code; 
+			respCodeLen = resp2CodeLen;
 		} else {
 			Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd);
 			// And print whether the CRC fails, just for good measure
 			uint8_t b1, b2;
-			ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
-			if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
-				// Not so good, try again.
-				DbpString("+++CRC fail");
-			} else {
-				DbpString("CRC passes");
+			if (len >= 3){ // if crc exists
+				ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
+				if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
+					// Not so good, try again.
+					DbpString("+++CRC fail");
+			
+				} else {
+					DbpString("CRC passes");
+				}
 			}
-			break;
+			//get rid of compiler warning
+			respCodeLen = 0;
+			resp = response1;
+			respLen	= 0;
+			respCode = resp1Code;
+			//don't crash at new command just wait and see if reader will send other new cmds.
+			//break;
 		}
 
 		cmdsRecvd++;
@@ -430,7 +460,7 @@ void SimulateIso14443bTag(void)
 				AT91C_BASE_SSC->SSC_THR = respCode[i++];
 				FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
 			}
-				if(BUTTON_PRESS()) break;
+			if(BUTTON_PRESS()) break;
 		}
 		
 		// Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
@@ -443,10 +473,10 @@ void SimulateIso14443bTag(void)
 			}
 		}
 		
-		// trace the response:
-		if (tracing) LogTrace(resp, respLen, 0, 0, parity, FALSE);			
+		LogTrace(resp, respLen, 0, 0, parity, FALSE);			
 	}
-	//FpgaDisableSscDma();
+	FpgaDisableSscDma();
+	set_tracing(FALSE);	
 }
 
 //=============================================================================
@@ -493,9 +523,14 @@ static struct {
  *          false if we are still waiting for some more
  *
  */
+ #define abs(x) ( ((x)<0) ? -(x) : (x) )
 static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 {
-	int v;
+	int v = 0;
+	int ai = abs(ci);
+	int aq = abs(cq);
+	int halfci = (ai >> 1);
+	int halfcq = (aq >> 1);
 
 // The soft decision on the bit uses an estimate of just the
 // quadrant of the reference angle, not the exact angle.
@@ -514,50 +549,12 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 
 #define SUBCARRIER_DETECT_THRESHOLD	8
 
-// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq)
-/* #define CHECK_FOR_SUBCARRIER() { \
-		v = ci; \
-		if(v < 0) v = -v; \
-		if(cq > 0) { \
-			v += cq; \
-		} else { \
-			v -= cq; \
-		} \
-	}		
- */
 // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
 #define CHECK_FOR_SUBCARRIER() { \
-		if(ci < 0) { \
-			if(cq < 0) { /* ci < 0, cq < 0 */ \
-				if (cq < ci) { \
-					v = -cq - (ci >> 1); \
-				} else { \
-					v = -ci - (cq >> 1); \
-				} \
-			} else {	/* ci < 0, cq >= 0 */ \
-				if (cq < -ci) { \
-					v = -ci + (cq >> 1); \
-				} else { \
-					v = cq - (ci >> 1); \
-				} \
-			} \
-		} else { \
-			if(cq < 0) { /* ci >= 0, cq < 0 */ \
-				if (-cq < ci) { \
-					v = ci - (cq >> 1); \
-				} else { \
-					v = -cq + (ci >> 1); \
-				} \
-			} else {	/* ci >= 0, cq >= 0 */ \
-				if (cq < ci) { \
-					v = ci + (cq >> 1); \
-				} else { \
-					v = cq + (ci >> 1); \
-				} \
-			} \
-		} \
-	}
-	
+		v = MAX(ai, aq) + MIN(halfci, halfcq); \
+}
+
+
 	switch(Demod.state) {
 		case DEMOD_UNSYNCD:
 			CHECK_FOR_SUBCARRIER();
@@ -571,28 +568,30 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 
 		case DEMOD_PHASE_REF_TRAINING:
 			if(Demod.posCount < 8) {
+			//if(Demod.posCount < 10*2) {
 				CHECK_FOR_SUBCARRIER();
 				if (v > SUBCARRIER_DETECT_THRESHOLD) {
 					// set the reference phase (will code a logic '1') by averaging over 32 1/fs.
 					// note: synchronization time > 80 1/fs
-				Demod.sumI += ci;
-				Demod.sumQ += cq;
+					Demod.sumI += ci;
+					Demod.sumQ += cq;
 					Demod.posCount++;
 				} else {		// subcarrier lost
-				Demod.state = DEMOD_UNSYNCD;
+					Demod.state = DEMOD_UNSYNCD;
 				}
 			} else {
-					Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF;
+				Demod.state = DEMOD_AWAITING_FALLING_EDGE_OF_SOF;
 			}
 			break;
 
 		case DEMOD_AWAITING_FALLING_EDGE_OF_SOF:
 			MAKE_SOFT_DECISION();
-			if(v < 0) {	// logic '0' detected
+			//Dbprintf("ICE: %d %d %d %d %d", v, Demod.sumI, Demod.sumQ, ci, cq );
+			if(v <= 0) {	// logic '0' detected
 				Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
 				Demod.posCount = 0;	// start of SOF sequence
 			} else {
-				if(Demod.posCount > 200/4) {	// maximum length of TR1 = 200 1/fs
+				if(Demod.posCount > 25*2) {	// maximum length of TR1 = 200 1/fs
 					Demod.state = DEMOD_UNSYNCD;
 				}
 			}
@@ -603,7 +602,7 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 			Demod.posCount++;
 			MAKE_SOFT_DECISION();
 			if(v > 0) {
-				if(Demod.posCount < 9*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
+				if(Demod.posCount < 10*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
 					Demod.state = DEMOD_UNSYNCD;
 				} else {
 					LED_C_ON(); // Got SOF
@@ -616,7 +615,7 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 */
 				}
 			} else {
-				if(Demod.posCount > 12*2) { // low phase of SOF too long (> 12 etu)
+				if(Demod.posCount > 13*2) { // low phase of SOF too long (> 12 etu)
 					Demod.state = DEMOD_UNSYNCD;
 					LED_C_OFF();
 				}
@@ -675,7 +674,7 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 						LED_C_OFF();
 						if(s == 0x000) {
 							// This is EOF (start, stop and all data bits == '0'
-						return TRUE;
+							return TRUE;
 						}
 					}
 				}
@@ -688,7 +687,6 @@ static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
 			LED_C_OFF();
 			break;
 	}
-
 	return FALSE;
 }
 
@@ -699,6 +697,11 @@ static void DemodReset()
 	Demod.len = 0;
 	Demod.state = DEMOD_UNSYNCD;
 	Demod.posCount = 0;
+	Demod.sumI = 0;
+	Demod.sumQ = 0;
+	Demod.bitCount = 0;
+	Demod.thisBit = 0;
+	Demod.shiftReg = 0;
 	memset(Demod.output, 0x00, MAX_FRAME_SIZE);
 }
 
@@ -723,28 +726,25 @@ static void GetSamplesFor14443bDemod(int n, bool quiet)
 	// Allocate memory from BigBuf for some buffers
 	// free all previous allocations first
 	BigBuf_free();
-	
+
+	// And put the FPGA in the appropriate mode
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
+
 	// The response (tag -> reader) that we're receiving.
-	uint8_t *resp = BigBuf_malloc(MAX_FRAME_SIZE);
+	// Set up the demodulator for tag -> reader responses.
+	DemodInit(BigBuf_malloc(MAX_FRAME_SIZE));
 	
 	// The DMA buffer, used to stream samples from the FPGA
 	int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE);
 
-	// Set up the demodulator for tag -> reader responses.
-	DemodInit(resp);
-
 	// Setup and start DMA.
 	FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
-
+	
 	int8_t *upTo = dmaBuf;
 	lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
 
 	// Signal field is ON with the appropriate LED:
 	LED_D_ON();
-	// And put the FPGA in the appropriate mode
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
-	SpinDelayUs(151); // T0 time between reader send,  tag answer.  151us.
-
 	for(;;) {
 		int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
 		if(behindBy > max) max = behindBy;
@@ -760,16 +760,16 @@ static void GetSamplesFor14443bDemod(int n, bool quiet)
 			}
 			lastRxCounter -= 2;
 			if(lastRxCounter <= 0) {
-				lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
+				lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
 			}
 
 			samples += 2;
 
-			if(Handle14443bSamplesDemod(ci, cq)) {
-				gotFrame = TRUE;
+			//
+			gotFrame = Handle14443bSamplesDemod(ci , cq );
+			if ( gotFrame )
 				break;
 		}
-	}
 
 		if(samples > n || gotFrame) {
 			break;
@@ -778,10 +778,20 @@ static void GetSamplesFor14443bDemod(int n, bool quiet)
 
 	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
 
-	if (!quiet) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max, samples, gotFrame, Demod.len, Demod.sumI, Demod.sumQ);
+	if (!quiet && Demod.len == 0) {
+		Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d",
+			max,
+			samples, 
+			gotFrame, 
+			Demod.len, 
+			Demod.sumI, 
+			Demod.sumQ
+		);
+	}
+
 	//Tracing
-	if (tracing && Demod.len > 0) {
-		uint8_t parity[MAX_PARITY_SIZE];
+	if (Demod.len > 0) {
+		uint8_t parity[MAX_PARITY_SIZE] = {0x00};
 		LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE);
 	}
 }
@@ -795,7 +805,7 @@ static void TransmitFor14443b(void)
 	int c;
 
 	FpgaSetupSsc();
-
+	
 	while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
 		AT91C_BASE_SSC->SSC_THR = 0xff;
 	}
@@ -805,7 +815,7 @@ static void TransmitFor14443b(void)
 	// Signal we are transmitting with the Green LED
 	LED_B_ON();
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
-
+	
 	for(c = 0; c < 10;) {
 		if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
 			AT91C_BASE_SSC->SSC_THR = 0xff;
@@ -853,7 +863,7 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
 		ToSendStuffBit(1);
 	}
 	// Send SOF
-	for(i = 0; i < 10; i++) {
+	for(i = 0; i < 11; i++) {
 		ToSendStuffBit(0);
 	}
 
@@ -876,7 +886,7 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
 	}
 	// Send EOF
 	ToSendStuffBit(1);
-	for(i = 0; i < 10; i++) {
+	for(i = 0; i < 11; i++) {
 		ToSendStuffBit(0);
 	}
 	for(i = 0; i < 8; i++) {
@@ -885,7 +895,7 @@ static void CodeIso14443bAsReader(const uint8_t *cmd, int len)
 
 	// And then a little more, to make sure that the last character makes
 	// it out before we switch to rx mode.
-	for(i = 0; i < 24; i++) {
+	for(i = 0; i < 10; i++) {
 		ToSendStuffBit(1);
 	}
 
@@ -907,6 +917,103 @@ static void CodeAndTransmit14443bAsReader(const uint8_t *cmd, int len)
 	}
 }
 
+/* Sends an APDU to the tag
+ * TODO: check CRC and preamble
+ */
+int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response)
+{
+	uint8_t message_frame[message_length + 4];
+	// PCB
+	message_frame[0] = 0x0A | pcb_blocknum;
+	pcb_blocknum ^= 1;
+	// CID
+	message_frame[1] = 0;
+	// INF
+	memcpy(message_frame + 2, message, message_length);
+	// EDC (CRC)
+	ComputeCrc14443(CRC_14443_B, message_frame, message_length + 2, &message_frame[message_length + 2], &message_frame[message_length + 3]);
+	// send
+	CodeAndTransmit14443bAsReader(message_frame, message_length + 4);
+	// get response
+	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT*100, TRUE);
+	if(Demod.len < 3)
+	{
+		return 0;
+	}
+	// TODO: Check CRC
+	// copy response contents
+	if(response != NULL)
+	{
+		memcpy(response, Demod.output, Demod.len);
+	}
+	return Demod.len;
+}
+
+/* Perform the ISO 14443 B Card Selection procedure
+ * Currently does NOT do any collision handling.
+ * It expects 0-1 cards in the device's range.
+ * TODO: Support multiple cards (perform anticollision)
+ * TODO: Verify CRC checksums
+ */
+int iso14443b_select_card()
+{
+	// WUPB command (including CRC)
+	// Note: WUPB wakes up all tags, REQB doesn't wake up tags in HALT state
+	static const uint8_t wupb[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
+	// ATTRIB command (with space for CRC)
+	uint8_t attrib[] = { 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00};
+
+	// first, wake up the tag
+	CodeAndTransmit14443bAsReader(wupb, sizeof(wupb));
+	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
+	// ATQB too short?
+	if (Demod.len < 14)
+	{
+		return 2;
+	}
+
+    // select the tag
+    // copy the PUPI to ATTRIB
+    memcpy(attrib + 1, Demod.output + 1, 4);
+    /* copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into
+    ATTRIB (Param 3) */
+    attrib[7] = Demod.output[10] & 0x0F;
+    ComputeCrc14443(CRC_14443_B, attrib, 9, attrib + 9, attrib + 10);
+    CodeAndTransmit14443bAsReader(attrib, sizeof(attrib));
+    GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
+    // Answer to ATTRIB too short?
+    if(Demod.len < 3)
+	{
+		return 2;
+	}
+	// reset PCB block number
+	pcb_blocknum = 0;
+	return 1;
+}
+
+// Set up ISO 14443 Type B communication (similar to iso14443a_setup)
+void iso14443b_setup() {
+
+	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+
+	BigBuf_free();
+	// Set up the synchronous serial port
+	FpgaSetupSsc();
+	// connect Demodulated Signal to ADC:
+	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
+
+	// Signal field is on with the appropriate LED
+    LED_D_ON();
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
+	
+	//SpinDelay(100);
+
+	// Start the timer
+	//StartCountSspClk();
+
+	DemodReset();
+	UartReset();
+}
 
 //-----------------------------------------------------------------------------
 // Read a SRI512 ISO 14443B tag.
@@ -949,6 +1056,7 @@ void ReadSTMemoryIso14443b(uint32_t dwLast)
 
 	if (Demod.len == 0) {
 		DbpString("No response from tag");
+		set_tracing(FALSE);	
 		return;
 	} else {
 		Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x",
@@ -964,17 +1072,20 @@ void ReadSTMemoryIso14443b(uint32_t dwLast)
 	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
 	if (Demod.len != 3) {
 		Dbprintf("Expected 3 bytes from tag, got %d", Demod.len);
+		set_tracing(FALSE);	
 		return;
 	}
 	// Check the CRC of the answer:
 	ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]);
 	if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) {
 		DbpString("CRC Error reading select response.");
+		set_tracing(FALSE);	
 		return;
 	}
 	// Check response from the tag: should be the same UID as the command we just sent:
 	if (cmd1[1] != Demod.output[0]) {
 		Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]);
+		set_tracing(FALSE);	
 		return;
 	}
 
@@ -986,6 +1097,7 @@ void ReadSTMemoryIso14443b(uint32_t dwLast)
 	GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
 	if (Demod.len != 10) {
 		Dbprintf("Expected 10 bytes from tag, got %d", Demod.len);
+		set_tracing(FALSE);	
 		return;
 	}
 	// The check the CRC of the answer (use cmd1 as temporary variable):
@@ -1033,6 +1145,8 @@ void ReadSTMemoryIso14443b(uint32_t dwLast)
 		}
 		i++;
 	}
+	
+	set_tracing(FALSE);
 }
 
 
@@ -1099,7 +1213,7 @@ void RAMFUNC SnoopIso14443b(void)
 	upTo = dmaBuf;
 	lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
 	FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
-	uint8_t parity[MAX_PARITY_SIZE];
+	uint8_t parity[MAX_PARITY_SIZE] = {0x00};
 
 	bool TagIsActive = FALSE;
 	bool ReaderIsActive = FALSE;
@@ -1128,10 +1242,12 @@ void RAMFUNC SnoopIso14443b(void)
 				Dbprintf("blew circular buffer! behindBy=%d", behindBy);
 				break;
 			}
+			
 			if(!tracing) {
-				DbpString("Reached trace limit");
+				DbpString("Trace full");
 				break;
 			}
+			
 			if(BUTTON_PRESS()) {
 				DbpString("cancelled");
 				break;
@@ -1141,50 +1257,48 @@ void RAMFUNC SnoopIso14443b(void)
 		samples += 2;
 
 		if (!TagIsActive) {							// no need to try decoding reader data if the tag is sending
-			if(Handle14443bUartBit(ci & 0x01)) {
-			if(triggered && tracing) {
+			if (Handle14443bUartBit(ci & 0x01)) {
+				if ( triggered)
 					LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
+
+				/* And ready to receive another command. */
+				UartReset();
+				/* And also reset the demod code, which might have been */
+				/* false-triggered by the commands from the reader. */
+				DemodReset();
 			}
-			/* And ready to receive another command. */
-			UartReset();
-			/* And also reset the demod code, which might have been */
-			/* false-triggered by the commands from the reader. */
-			DemodReset();
-		}
-			if(Handle14443bUartBit(cq & 0x01)) {
-			if(triggered && tracing) {
+			if (Handle14443bUartBit(cq & 0x01)) {
+				if (triggered)
 					LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
-			}
-			/* And ready to receive another command. */
-			UartReset();
-			/* And also reset the demod code, which might have been */
-			/* false-triggered by the commands from the reader. */
-			DemodReset();
-		}
+
+					/* And ready to receive another command. */
+					UartReset();
+					/* And also reset the demod code, which might have been */
+					/* false-triggered by the commands from the reader. */
+					DemodReset();
+				}
 			ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF);
 		}
 
 		if(!ReaderIsActive) {						// no need to try decoding tag data if the reader is sending - and we cannot afford the time
-			if(Handle14443bSamplesDemod(ci | 0x01, cq | 0x01)) {
+			// is this | 0x01 the error?   & 0xfe  in https://github.com/Proxmark/proxmark3/issues/103
+			if(Handle14443bSamplesDemod(ci & 0xfe, cq & 0xfe)) {
 
-			//Use samples as a time measurement
-			if(tracing)
-			{
-				//uint8_t parity[MAX_PARITY_SIZE];
+				//Use samples as a time measurement
 				LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE);
-			}
-			triggered = TRUE;
 
-			// And ready to receive another response.
-			DemodReset();
-		}
+				triggered = TRUE;
+
+				// And ready to receive another response.
+				DemodReset();
+			}
 			TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF);
 		}
-
 	}
 
 	FpgaDisableSscDma();
 	LEDsoff();
+	
 	AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
 	DbpString("Snoop statistics:");
 	Dbprintf("  Max behind by: %i", maxBehindBy);
@@ -1192,6 +1306,7 @@ void RAMFUNC SnoopIso14443b(void)
 	Dbprintf("  Uart ByteCnt: %i", Uart.byteCnt);
 	Dbprintf("  Uart ByteCntMax: %i", Uart.byteCntMax);
 	Dbprintf("  Trace length: %i", BigBuf_get_traceLen());
+	set_tracing(FALSE);	
 }
 
 
@@ -1209,29 +1324,26 @@ void RAMFUNC SnoopIso14443b(void)
  */
 void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[])
 {
-	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
-	BigBuf_free();
-	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
-	FpgaSetupSsc();
-
+	iso14443b_setup();
+	
 	if ( datalen == 0 && recv == 0 && powerfield == 0){
-		clear_trace();
-	} else {
+		
+	} else {		
 		set_tracing(TRUE);
 		CodeAndTransmit14443bAsReader(data, datalen);
 	}
 
-	if(recv) {
-		GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
+	if (recv) {
+		GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, FALSE);
 		uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE);
 		cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen);
 	}
 	
-	if(!powerfield) {
+	if (!powerfield) {
 		FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+		FpgaDisableSscDma();
+		set_tracing(FALSE);
 		LED_D_OFF();
 	}
-	
-	FpgaDisableSscDma();
 }