X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/add16a62877f52dab8e8fbb28b2c776902b82ba8..8d436e81afab78deb2a9ab450bd61eea546b953f:/armsrc/legicrf.c diff --git a/armsrc/legicrf.c b/armsrc/legicrf.c index 00cb52b6..86c0c360 100644 --- a/armsrc/legicrf.c +++ b/armsrc/legicrf.c @@ -40,93 +40,111 @@ static void setup_timer(void) #define FUZZ_EQUAL(value, target, fuzz) ((value) > ((target)-(fuzz)) && (value) < ((target)+(fuzz))) -static const struct legic_frame queries[] = { - {7, 0x55}, /* 1010 101 */ -}; - -static const struct legic_frame responses[] = { - {6, 0x3b}, /* 1101 11 */ -}; - -/* Send a frame in tag mode, the FPGA must have been set up by - * LegicRfSimulate +/* Send a frame in reader mode, the FPGA must have been set up by + * LegicRfReader */ -static void frame_send_tag(uint16_t response, int bits) +static void frame_send_rwd(uint16_t data, int bits) { -#if 0 - /* Use the SSC to send a response. 8-bit transfers, LSBit first, 100us per bit */ -#else - /* Bitbang the response */ - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; - AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; - AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; - - /* Wait for the frame start */ - while(timer->TC_CV < TAG_TIME_WAIT) ; + /* Start clock */ + timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; + while(timer->TC_CV > 1) ; /* Wait till the clock has reset */ int i; for(i=0; iTC_CV + TAG_TIME_BIT; - int bit = response & 1; - response = response >> 1; - if(bit) - AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; - else - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; - while(timer->TC_CV < nextbit) ; - } - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; -#endif -} - -/* Figure out a response to a frame in tag mode */ -static void frame_respond_tag(struct legic_frame const * const f) -{ - LED_D_ON(); - int i, r_size; - uint16_t r_data; - - for(i=0; ibits == queries[i].bits && f->data == queries[i].data) { - r_data = responses[i].data; - r_size = responses[i].bits; - break; + int starttime = timer->TC_CV; + int pause_end = starttime + RWD_TIME_PAUSE, bit_end; + int bit = data & 1; + data = data >> 1; + + if(bit) { + bit_end = starttime + RWD_TIME_1; + } else { + bit_end = starttime + RWD_TIME_0; } + + /* RWD_TIME_PAUSE time off, then some time on, so that the complete bit time is + * RWD_TIME_x, where x is the bit to be transmitted */ + AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; + while(timer->TC_CV < pause_end) ; + AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; + while(timer->TC_CV < bit_end) ; } - if(r_size != 0) { - frame_send_tag(r_data, r_size); - LED_A_ON(); - } else { - LED_A_OFF(); + { + /* One final pause to mark the end of the frame */ + int pause_end = timer->TC_CV + RWD_TIME_PAUSE; + AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; + while(timer->TC_CV < pause_end) ; + AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; } - LED_D_OFF(); + /* Reset the timer, to measure time until the start of the tag frame */ + timer->TC_CCR = AT91C_TC_SWTRG; + while(timer->TC_CV > 1) ; /* Wait till the clock has reset */ } -static void frame_append_bit(struct legic_frame * const f, int bit) +/* Receive a frame from the card in reader emulation mode, the FPGA and + * timer must have been set up by LegicRfReader and frame_send_rwd. + * + * The LEGIC RF protocol from card to reader does not include explicit + * frame start/stop information or length information. The reader must + * know beforehand how many bits it wants to receive. (Notably: a card + * sending a stream of 0-bits is indistinguishable from no card present.) + * + * Receive methodology: There is a fancy correlator in hi_read_rx_xcorr, but + * I'm not smart enough to use it. Instead I have patched hi_read_tx to output + * the ADC signal with hysteresis on SSP_DIN. Bit-bang that signal and look + * for edges. Count the edges in each bit interval. If they are approximately + * 0 this was a 0-bit, if they are approximately equal to the number of edges + * expected for a 212kHz subcarrier, this was a 1-bit. For timing we use the + * timer that's still running from frame_send_rwd in order to get a synchronization + * with the frame that we just sent. + * + * FIXME: Because we're relying on the hysteresis to just do the right thing + * the range is severely reduced (and you'll probably also need a good antenna). + * So this should be fixed some time in the future for a proper receiver. + */ +static void frame_receive_rwd(struct legic_frame * const f, int bits) { - if(f->bits >= 15) - return; /* Overflow, won't happen */ - f->data |= (bit<bits); - f->bits++; -} + uint16_t the_bit = 1; /* Use a bitmask to save on shifts */ + uint16_t data=0; + int i, old_level=0, edges=0; + int next_bit_at = TAG_TIME_WAIT; + + + if(bits > 16) + bits = 16; -static int frame_is_empty(struct legic_frame const * const f) -{ - return( f->bits <= 4 ); -} + AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; + AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; -/* Handle (whether to respond) a frame in tag mode */ -static void frame_handle_tag(struct legic_frame const * const f) -{ - if(f->bits == 6) { - /* Short path */ - return; - } - if( !frame_is_empty(f) ) { - frame_respond_tag(f); + while(timer->TC_CV < next_bit_at) ; + next_bit_at += TAG_TIME_BIT; + + for(i=0; iTC_CV < next_bit_at) { + int level = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN); + if(level != old_level) + edges++; + old_level = level; + } + next_bit_at += TAG_TIME_BIT; + + if(edges > 20 && edges < 60) { /* expected are 42 edges */ + data |= the_bit; + } + + + the_bit <<= 1; } + + f->data = data; + f->bits = bits; + + /* Reset the timer, to synchronize the next frame */ + timer->TC_CCR = AT91C_TC_SWTRG; + while(timer->TC_CV > 1) ; /* Wait till the clock has reset */ } static void frame_clean(struct legic_frame * const f) @@ -135,88 +153,100 @@ static void frame_clean(struct legic_frame * const f) f->bits = 0; } -enum emit_mode { - EMIT_RWD, /* Emit in tag simulation mode, e.g. the source is the RWD */ - EMIT_TAG /* Emit in reader simulation mode, e.g. the source is the TAG */ -}; -static void emit(enum emit_mode mode, int bit) +static uint16_t perform_setup_phase_rwd(void) { - if(bit == -1) { - if(mode == EMIT_RWD) { - frame_handle_tag(¤t_frame); - } - frame_clean(¤t_frame); - } else if(bit == 0) { - frame_append_bit(¤t_frame, 0); - } else if(bit == 1) { - frame_append_bit(¤t_frame, 1); - } + + /* Switch on carrier and let the tag charge for 1ms */ + AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; + SpinDelay(1); + + frame_send_rwd(0x55, 7); + frame_clean(¤t_frame); + frame_receive_rwd(¤t_frame, 6); + while(timer->TC_CV < 387) ; /* ~ 258us */ + frame_send_rwd(0x019, 6); + + return current_frame.data ^ 0x26; } -void LegicRfSimulate(void) +static void switch_off_tag_rwd(void) +{ + /* Switch off carrier, make sure tag is reset */ + AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; + SpinDelay(10); + + WDT_HIT(); +} + +void LegicRfReader(void) { - /* ADC path high-frequency peak detector, FPGA in high-frequency simulator mode, - * modulation mode set to 212kHz subcarrier. We are getting the incoming raw - * envelope waveform on DIN and should send our response on DOUT. - * - * The LEGIC RF protocol is pulse-pause-encoding from reader to card, so we'll - * measure the time between two rising edges on DIN, and no encoding on the - * subcarrier from card to reader, so we'll just shift out our verbatim data - * on DOUT, 1 bit is 100us. The time from reader to card frame is still unclear, - * seems to be 300us-ish. - */ SetAdcMuxFor(GPIO_MUXSEL_HIPKD); FpgaSetupSsc(); - FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K); + FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX); - /* Bitbang the receiver */ - AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; - AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; + /* Bitbang the transmitter */ + AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; + AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; + AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; setup_timer(); - int old_level = 0; - int active = 0; + memset(BigBuf, 0, 1024); - while(!BUTTON_PRESS()) { - int level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN); - int time = timer->TC_CV; - - if(level != old_level) { - if(level == 1) { - timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; - if(FUZZ_EQUAL(time, RWD_TIME_1, RWD_TIME_FUZZ)) { - /* 1 bit */ - emit(EMIT_RWD, 1); - active = 1; - LED_B_ON(); - } else if(FUZZ_EQUAL(time, RWD_TIME_0, RWD_TIME_FUZZ)) { - /* 0 bit */ - emit(EMIT_RWD, 0); - active = 1; - LED_B_ON(); - } else if(active) { - /* invalid */ - emit(EMIT_RWD, -1); - active = 0; - LED_B_OFF(); - } - } - } - - if(time >= (RWD_TIME_1+RWD_TIME_FUZZ) && active) { - /* Frame end */ - emit(EMIT_RWD, -1); - active = 0; - LED_B_OFF(); + int byte_index = 0, card_size = 0, command_size = 0; + uint16_t command_obfuscation = 0x57, response_obfuscation = 0; + uint16_t tag_type = perform_setup_phase_rwd(); + switch_off_tag_rwd(); + + int error = 0; + switch(tag_type) { + case 0x1d: + DbpString("MIM 256 card found, reading card ..."); + command_size = 9; + card_size = 256; + response_obfuscation = 0x52; + break; + case 0x3d: + DbpString("MIM 1024 card found, reading card ..."); + command_size = 11; + card_size = 1024; + response_obfuscation = 0xd4; + break; + default: + DbpString("No or unknown card found, aborting"); + error = 1; + break; + } + + LED_B_ON(); + while(!BUTTON_PRESS() && (byte_index= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA)) { - timer->TC_CCR = AT91C_TC_CLKDIS; - } + while(timer->TC_CV < 387) ; /* ~ 258us */ + frame_send_rwd(command_obfuscation ^ (byte_index<<1), command_size); + frame_clean(¤t_frame); + frame_receive_rwd(¤t_frame, 8); + ((uint8_t*)BigBuf)[byte_index] = (current_frame.data ^ response_obfuscation) & 0xff; + switch_off_tag_rwd(); - old_level = level; WDT_HIT(); + byte_index++; + if(byte_index & 0x04) LED_C_ON(); else LED_C_OFF(); + } + LED_B_OFF(); + LED_C_OFF(); + + if(!error) { + if(card_size == 256) { + DbpString("Card read, use hexsamples 256 to view results"); + } else if(card_size == 1024) { + DbpString("Card read, use hexsamples 1024 to view results"); + } } }