X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/bd20f8f47847787e1f3e933043933272908c5beb..refs/heads/unstable:/bootrom/ldscript-flash diff --git a/bootrom/ldscript-flash b/bootrom/ldscript-flash index ba6384c5..f1bab149 100644 --- a/bootrom/ldscript-flash +++ b/bootrom/ldscript-flash @@ -10,54 +10,54 @@ INCLUDE ../common/ldscript.common +PHDRS +{ + phase1 PT_LOAD; + phase2 PT_LOAD; + bss PT_LOAD; +} + ENTRY(flashstart) SECTIONS { - . = 0; - - .bootphase1 : { - *(.startup) - *(.bootphase1) - - /* It seems to be impossible to flush align a section at the - end of a memory segment. Instead, we'll put the version_information - wherever the linker wants it, and then put a pointer to the start - of the version information at the end of the section. - -- Henryk Plötz 2009-08-28 */ - - _version_information_start = ABSOLUTE(.); - *(.version_information); - - /* Why doesn't this work even though _bootphase1_version_pointer = 0x1001fc? - . = _bootphase1_version_pointer - ORIGIN(bootphase1); */ - /* This works, apparently it fools the linker into accepting an absolute address */ - . = _bootphase1_version_pointer - ORIGIN(bootphase1) + ORIGIN(bootphase1); - LONG(_version_information_start) - } >bootphase1 - - __bootphase2_src_start__ = ORIGIN(bootphase2); - .bootphase2 : { - __bootphase2_start__ = .; - *(.startphase2) - *(.text) - *(.eh_frame) - *(.glue_7) - *(.glue_7t) - *(.rodata) - *(.data) - . = ALIGN( 32 / 8 ); - __bootphase2_end__ = .; - } >ram AT>bootphase2 - - .bss : { - __bss_start__ = .; - *(.bss) - } >ram - - . = ALIGN( 32 / 8 ); - __bss_end__ = .; - - .commonarea (NOLOAD) : { - *(.commonarea) - } >commonarea + .bootphase1 : { + *(.startup) + + . = ALIGN(4); + _version_information_start = .; + KEEP(*(.version_information)); + + . = LENGTH(bootphase1) - 0x4; + LONG(_version_information_start); + } >bootphase1 :phase1 + + .bootphase2 : { + *(.startphase2) + *(.text) + *(.text.*) + *(.eh_frame) + *(.glue_7) + *(.glue_7t) + *(.rodata) + *(.rodata.*) + *(.data) + *(.data.*) + . = ALIGN(4); + } >ram AT>bootphase2 :phase2 + + __bootphase2_src_start__ = LOADADDR(.bootphase2); + __bootphase2_start__ = ADDR(.bootphase2); + __bootphase2_end__ = __bootphase2_start__ + SIZEOF(.bootphase2); + + .bss : { + __bss_start__ = .; + *(.bss) + *(.bss.*) + . = ALIGN(4); + __bss_end__ = .; + } >ram AT>ram :bss + + .commonarea (NOLOAD) : { + *(.commonarea) + } >commonarea }