X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/c71c5ee1567c08b9819b3e9733ccb81e875bfca3..7cc8fee9860fde8e5b6ed58bfd185c8177f2a0f8:/armsrc/legicrf.c diff --git a/armsrc/legicrf.c b/armsrc/legicrf.c index 5ee4d667..5b0cccf0 100644 --- a/armsrc/legicrf.c +++ b/armsrc/legicrf.c @@ -7,7 +7,6 @@ //----------------------------------------------------------------------------- // LEGIC RF simulation code //----------------------------------------------------------------------------- - #include "legicrf.h" static struct legic_frame { @@ -30,25 +29,24 @@ static int legic_phase_drift; static int legic_frame_drift; static int legic_reqresp_drift; -int timestamp; - AT91PS_TC timer; AT91PS_TC prng_timer; +/* static void setup_timer(void) { - /* Set up Timer 1 to use for measuring time between pulses. Since we're bit-banging - * this it won't be terribly accurate but should be good enough. - */ + // Set up Timer 1 to use for measuring time between pulses. Since we're bit-banging + // this it won't be terribly accurate but should be good enough. + // AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC1); timer = AT91C_BASE_TC1; timer->TC_CCR = AT91C_TC_CLKDIS; timer->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK; timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; - /* - * Set up Timer 2 to use for measuring time between frames in - * tag simulation mode. Runs 4x faster as Timer 1 - */ + // + // Set up Timer 2 to use for measuring time between frames in + // tag simulation mode. Runs 4x faster as Timer 1 + // AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC2); prng_timer = AT91C_BASE_TC2; prng_timer->TC_CCR = AT91C_TC_CLKDIS; @@ -56,45 +54,98 @@ static void setup_timer(void) { prng_timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; } -/* At TIMER_CLOCK3 (MCK/32) */ -#define RWD_TIME_1 150 /* RWD_TIME_PAUSE off, 80us on = 100us */ -#define RWD_TIME_0 90 /* RWD_TIME_PAUSE off, 40us on = 60us */ -#define RWD_TIME_PAUSE 30 /* 20us */ -#define RWD_TIME_FUZZ 20 /* rather generous 13us, since the peak detector + hysteresis fuzz quite a bit */ -#define TAG_TIME_BIT 150 /* 100us for every bit */ -#define TAG_TIME_WAIT 490 /* time from RWD frame end to tag frame start, experimentally determined */ + AT91C_BASE_PMC->PMC_PCER |= (0x1 << 12) | (0x1 << 13) | (0x1 << 14); + AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_TIOA0 | AT91C_TCB_TC2XC2S_NONE; + + // fast clock + AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; // timer disable + AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK | // MCK(48MHz)/32 -- tick=1.5mks + AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO | AT91C_TC_ACPA_CLEAR | + AT91C_TC_ACPC_SET | AT91C_TC_ASWTRG_SET; + AT91C_BASE_TC0->TC_RA = 1; + AT91C_BASE_TC0->TC_RC = 0xBFFF + 1; // 0xC000 + +*/ + +// At TIMER_CLOCK3 (MCK/32) +//#define RWD_TIME_1 150 /* RWD_TIME_PAUSE off, 80us on = 100us */ +//#define RWD_TIME_0 90 /* RWD_TIME_PAUSE off, 40us on = 60us */ +//#define RWD_TIME_PAUSE 30 /* 20us */ + +// testing calculating in (us) microseconds. +#define RWD_TIME_1 120 // READER_TIME_PAUSE 20us off, 80us on = 100us 80 * 1.5 == 120ticks +#define RWD_TIME_0 60 // READER_TIME_PAUSE 20us off, 40us on = 60us 40 * 1.5 == 60ticks +#define RWD_TIME_PAUSE 30 // 20us == 20 * 1.5 == 30ticks */ +#define TAG_BIT_PERIOD 150 // 100us == 100 * 1.5 == 150ticks +#define TAG_FRAME_WAIT 495 // 330us from READER frame end to TAG frame start. 330 * 1.5 == 495 + +#define RWD_TIME_FUZZ 20 // rather generous 13us, since the peak detector + hysteresis fuzz quite a bit #define SIM_DIVISOR 586 /* prng_time/SIM_DIVISOR count prng needs to be forwared */ #define SIM_SHIFT 900 /* prng_time+SIM_SHIFT shift of delayed start */ -#define SESSION_IV 0x55 #define OFFSET_LOG 1024 #define FUZZ_EQUAL(value, target, fuzz) ((value) > ((target)-(fuzz)) && (value) < ((target)+(fuzz))) -// ~ 258us + 100us*delay -#define WAIT_387 WAIT(387) -#define WAIT(delay) while(timer->TC_CV < (delay) ); +#ifndef SHORT_COIL +# define SHORT_COIL LOW(GPIO_SSC_DOUT); +#endif +#ifndef OPEN_COIL +# define OPEN_COIL HIGH(GPIO_SSC_DOUT); +#endif +uint32_t sendFrameStop = 0; + +// Pause pulse, off in 20us / 30ticks, +// ONE / ZERO bit pulse, +// one == 80us / 120ticks +// zero == 40us / 60ticks +#ifndef COIL_PULSE +# define COIL_PULSE(x) \ + do { \ + SHORT_COIL; \ + WaitTicks( (RWD_TIME_PAUSE) ); \ + OPEN_COIL; \ + WaitTicks((x)); \ + } while (0) +#endif // ToDo: define a meaningful maximum size for auth_table. The bigger this is, the lower will be the available memory for traces. // Historically it used to be FREE_BUFFER_SIZE, which was 2744. #define LEGIC_CARD_MEMSIZE 1024 static uint8_t* cardmem; -/* -The new tracelog.. - // Traceformat: - // 32 bits timestamp (little endian) - // 16 bits duration (little endian) - // 16 bits data length (little endian, Highest Bit used as readerToTag flag) - // y Bytes data - // x Bytes parity (one byte per 8 bytes data) +static void frame_append_bit(struct legic_frame * const f, uint8_t bit) { + // Overflow, won't happen + if (f->bits >= 31) return; + + f->data |= (bit << f->bits); + f->bits++; +} + +static void frame_clean(struct legic_frame * const f) { + f->data = 0; + f->bits = 0; +} + +// Prng works when waiting in 99.1us cycles. +// and while sending/receiving in bit frames (100, 60) +/*static void CalibratePrng( uint32_t time){ + // Calculate Cycles based on timer 100us + uint32_t i = (time - sendFrameStop) / 100 ; + + // substract cycles of finished frames + int k = i - legic_prng_count()+1; + + // substract current frame length, rewind to beginning + if ( k > 0 ) + legic_prng_forward(k); +} */ - + /* Generate Keystream */ -static uint32_t get_key_stream(int skip, int count) -{ +uint32_t get_key_stream(int skip, int count) { uint32_t key = 0; int i; @@ -102,8 +153,7 @@ static uint32_t get_key_stream(int skip, int count) legic_prng_bc += prng_timer->TC_CV; // reset the prng timer. - prng_timer->TC_CCR = AT91C_TC_SWTRG; - while(prng_timer->TC_CV > 1) ; + ResetTimer(prng_timer); /* If skip == -1, forward prng time based */ if(skip == -1) { @@ -137,100 +187,75 @@ static uint32_t get_key_stream(int skip, int count) /* Send a frame in tag mode, the FPGA must have been set up by * LegicRfSimulate */ -static void frame_send_tag(uint16_t response, int bits, int crypt) -{ - /* Bitbang the response */ - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; - AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; - AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; - - /* Use time to crypt frame */ - if(crypt) { - legic_prng_forward(2); /* TAG_TIME_WAIT -> shift by 2 */ - int key = 0; - for(int i = 0; i < bits; i++) { - key |= legic_prng_get_bit() << i; - legic_prng_forward(1); - } - response = response ^ key; - } +void frame_send_tag(uint16_t response, uint8_t bits, uint8_t crypt) { + /* Bitbang the response */ + LOW(GPIO_SSC_DOUT); + AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; + AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; - /* Wait for the frame start */ - //while(timer->TC_CV < (TAG_TIME_WAIT - 30)) ; - WAIT( TAG_TIME_WAIT - 30) - - uint8_t bit = 0; - for(int i = 0; i < bits; i++) { - int nextbit = timer->TC_CV + TAG_TIME_BIT; - bit = response & 1; - response >>= 1; - - if (bit) - AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; - else - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; - - //while(timer->TC_CV < nextbit) ; - WAIT(nextbit) - } - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; -} + /* Use time to crypt frame */ + if(crypt) { + legic_prng_forward(2); /* TAG_FRAME_WAIT -> shift by 2 */ + response ^= legic_prng_get_bits(bits); + } -// Starts Clock and waits until its reset -static void ResetClock(void){ - timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG; - while(timer->TC_CV > 1) ; + /* Wait for the frame start */ + WaitUS( TAG_FRAME_WAIT ); + + uint8_t bit = 0; + for(int i = 0; i < bits; i++) { + + bit = response & 1; + response >>= 1; + + if (bit) + HIGH(GPIO_SSC_DOUT); + else + LOW(GPIO_SSC_DOUT); + + WaitUS(100); + } + LOW(GPIO_SSC_DOUT); } /* Send a frame in reader mode, the FPGA must have been set up by * LegicRfReader */ -static void frame_send_rwd(uint32_t data, int bits){ +void frame_sendAsReader(uint32_t data, uint8_t bits){ - ResetClock(); - int starttime = 0, pause_end = 0, bit = 0, bit_end = 0; + uint32_t starttime = GET_TICKS, send = 0; + uint16_t mask = 1; + uint8_t prngstart = legic_prng_count() ; - for(int i = 0; iTC_CV; - pause_end = starttime + RWD_TIME_PAUSE; - bit = data & 1; - data >>= 1; - - if(bit ^ legic_prng_get_bit()) - bit_end = starttime + RWD_TIME_1; - else - bit_end = starttime + RWD_TIME_0; - - - /* RWD_TIME_PAUSE time off, then some time on, so that the complete bit time is - * RWD_TIME_x, where x is the bit to be transmitted */ - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; - - WAIT( pause_end ) - - AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; - - legic_prng_forward(1); /* bit duration is longest. use this time to forward the lfsr */ - - WAIT( bit_end ) + // xor lsfr onto data. + send = data ^ legic_prng_get_bits(bits); + + for (; mask < BITMASK(bits); mask <<= 1) { + if (send & mask) { + COIL_PULSE(RWD_TIME_1); + } else { + COIL_PULSE(RWD_TIME_0); + } } - /* One final pause to mark the end of the frame */ - pause_end = timer->TC_CV + RWD_TIME_PAUSE; - - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; - - WAIT(pause_end) + // Final pause to mark the end of the frame + COIL_PULSE(0); - AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; - - /* Reset the timer, to measure time until the start of the tag frame */ - ResetClock(); + sendFrameStop = GET_TICKS; + uint8_t cmdbytes[] = { + bits, + BYTEx(data, 0), + BYTEx(data, 1), + 0x00, + 0x00, + prngstart, + legic_prng_count() + }; + LogTrace(cmdbytes, sizeof(cmdbytes), starttime, sendFrameStop, NULL, TRUE); } /* Receive a frame from the card in reader emulation mode, the FPGA and - * timer must have been set up by LegicRfReader and frame_send_rwd. + * timer must have been set up by LegicRfReader and frame_sendAsReader. * * The LEGIC RF protocol from card to reader does not include explicit * frame start/stop information or length information. The reader must @@ -243,112 +268,140 @@ static void frame_send_rwd(uint32_t data, int bits){ * for edges. Count the edges in each bit interval. If they are approximately * 0 this was a 0-bit, if they are approximately equal to the number of edges * expected for a 212kHz subcarrier, this was a 1-bit. For timing we use the - * timer that's still running from frame_send_rwd in order to get a synchronization + * timer that's still running from frame_sendAsReader in order to get a synchronization * with the frame that we just sent. * * FIXME: Because we're relying on the hysteresis to just do the right thing * the range is severely reduced (and you'll probably also need a good antenna). * So this should be fixed some time in the future for a proper receiver. */ -static void frame_receive_rwd(struct legic_frame * const f, int bits, int crypt) -{ - uint32_t the_bit = 1; /* Use a bitmask to save on shifts */ - uint32_t data = 0; - int i, old_level = 0, edges = 0; - int next_bit_at = TAG_TIME_WAIT; - - if(bits > 32) bits = 32; +static void frame_receiveAsReader(struct legic_frame * const f, uint8_t bits) { + frame_clean(f); + if ( bits > 32 ) return; + + uint8_t i = bits, edges = 0; + uint16_t lsfr = 0; + uint32_t the_bit = 1, next_bit_at = 0, data; + + int old_level = 0, level = 0; + AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; - - /* we have some time now, precompute the cipher - * since we cannot compute it on the fly while reading */ + + // calibrate the prng. + // legic_prng_forward(2); + + // precompute the cipher + uint8_t prngstart = legic_prng_count() ; - if(crypt) { - for(i=0; iTC_CV < next_bit_at) { - int level = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN); - if(level != old_level) - edges++; + uint8_t adjust = 0; + while ( GET_TICKS < next_bit_at) { + + level = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN); + + if (level != old_level) + ++edges; + old_level = level; - } - next_bit_at += TAG_TIME_BIT; + + if(edges > 20 && adjust == 0) { + next_bit_at -= 15; + adjust = 1; + } + } + + next_bit_at += TAG_BIT_PERIOD; - // We expect 42 edges - if(edges > 20 && edges < 60) { + // We expect 42 edges == ONE + //if (edges > 20 && edges < 64) + if ( edges > 20 ) data ^= the_bit; - } - the_bit <<= 1; + + the_bit <<= 1; } + // output f->data = data; f->bits = bits; - - // Reset the timer, to synchronize the next frame - ResetClock(); -} - -static void frame_append_bit(struct legic_frame * const f, int bit) { - // Overflow, won't happen - if (f->bits >= 31) return; - - f->data |= (bit << f->bits); - f->bits++; -} - -static void frame_clean(struct legic_frame * const f) { - f->data = 0; - f->bits = 0; + + uint8_t cmdbytes[] = { + bits, + BYTEx(data,0), + BYTEx(data,1), + BYTEx(data, 0) ^ BYTEx(lsfr,0), + BYTEx(data, 1) ^ BYTEx(lsfr,1), + prngstart, + legic_prng_count() + }; + LogTrace(cmdbytes, sizeof(cmdbytes), starttime, GET_TICKS, NULL, FALSE); } // Setup pm3 as a Legic Reader -static uint32_t perform_setup_phase_rwd(int iv) { - /* Switch on carrier and let the tag charge for 1ms */ - AT91C_BASE_PIOA->PIO_SODR = GPIO_SSC_DOUT; - SpinDelay(20); // was 1ms before. - - /* no keystream yet */ +static uint32_t setup_phase_reader(uint8_t iv) { + + // Switch on carrier and let the tag charge for 1ms + HIGH(GPIO_SSC_DOUT); + WaitUS(1000); + + ResetTicks(); + + // no keystream yet legic_prng_init(0); + + // send IV handshake + frame_sendAsReader(iv, 7); - // IV - frame_send_rwd(iv, 7); + // Now both tag and reader has same IV. Prng can start. legic_prng_init(iv); - frame_clean(¤t_frame); - frame_receive_rwd(¤t_frame, 6, 1); + frame_receiveAsReader(¤t_frame, 6); - // we wait anyways - legic_prng_forward(3); + // fixed delay before sending ack. + WaitTicks(366); // 244us + legic_prng_forward(1); //240us / 100 == 2.4 iterations - WAIT_387 - - frame_send_rwd(0x39, 6); - + // Send obsfuscated acknowledgment frame. + // 0x19 = 0x18 MIM22, 0x01 LSB READCMD + // 0x39 = 0x38 MIM256, MIM1024 0x01 LSB READCMD + switch ( current_frame.data ) { + case 0x0D: frame_sendAsReader(0x19, 6); break; + case 0x1D: + case 0x3D: frame_sendAsReader(0x39, 6); break; + default: break; + } return current_frame.data; } static void LegicCommonInit(void) { - + FpgaDownloadAndGo(FPGA_BITSTREAM_HF); - SetAdcMuxFor(GPIO_MUXSEL_HIPKD); - FpgaSetupSsc(); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX); + SetAdcMuxFor(GPIO_MUXSEL_HIPKD); /* Bitbang the transmitter */ - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; + LOW(GPIO_SSC_DOUT); AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; @@ -358,22 +411,25 @@ static void LegicCommonInit(void) { clear_trace(); set_tracing(TRUE); - - setup_timer(); - crc_init(&legic_crc, 4, 0x19 >> 1, 0x5, 0); + + StartTicks(); } -/* Switch off carrier, make sure tag is reset */ +// Switch off carrier, make sure tag is reset static void switch_off_tag_rwd(void) { - AT91C_BASE_PIOA->PIO_CODR = GPIO_SSC_DOUT; - SpinDelay(10); + LOW(GPIO_SSC_DOUT); + WaitUS(200); WDT_HIT(); + Dbprintf("Exit Switch_off_tag_rwd"); } -/* calculate crc for a legic command */ -static int LegicCRC(int byte_index, int value, int cmd_sz) { - crc_clear(&legic_crc); +// calculate crc4 for a legic READ command +// 5,8,10 address size. +static uint32_t legic4Crc(uint8_t legicCmd, uint16_t byte_index, uint8_t value, uint8_t cmd_sz) { + crc_clear(&legic_crc); + //uint32_t temp = (value << cmd_sz) | (byte_index << 1) | legicCmd; + //crc_update(&legic_crc, temp, cmd_sz + 8 ); crc_update(&legic_crc, 1, 1); /* CMD_READ */ crc_update(&legic_crc, byte_index, cmd_sz-1); crc_update(&legic_crc, value, 8); @@ -382,46 +438,29 @@ static int LegicCRC(int byte_index, int value, int cmd_sz) { int legic_read_byte(int byte_index, int cmd_sz) { - int byte = 0, calcCrc = 0, crc = 0; - int cmd = 1 | (byte_index << 1); - - uint8_t cmdbytes[2] = {cmd && 0xff, (cmd >> 8 ) & 0xFF}; - uint32_t starttime = timer->TC_CV, endtime = 0; + // (us)| ticks + // ------------- + // 330 | 495 + // 460 | 690 + // 258 | 387 + // 244 | 366 + WaitTicks(387); + legic_prng_forward(4); // 460 / 100 = 4.6 iterations - WAIT_387 + uint8_t byte = 0, crc = 0, calcCrc = 0; + uint32_t cmd = (byte_index << 1) | LEGIC_READ; - // send - frame_send_rwd(cmd, cmd_sz); + frame_sendAsReader(cmd, cmd_sz); + frame_receiveAsReader(¤t_frame, 12); - // log - endtime = timer->TC_CV; - LogTrace(cmdbytes, 2, starttime, endtime, NULL, TRUE); - - // clean - frame_clean(¤t_frame); - - starttime = timer->TC_CV; - - // read - frame_receive_rwd(¤t_frame, 12, 1); - - // log - endtime = timer->TC_CV; - cmdbytes[0] = current_frame.data & 0xff; - cmdbytes[1] = (current_frame.data >> 8) & 0xFF; - LogTrace(cmdbytes, 2, starttime, endtime, NULL, FALSE); - - byte = current_frame.data & 0xff; - calcCrc = LegicCRC(byte_index, byte, cmd_sz); - crc = (current_frame.data >> 8); + byte = BYTEx(current_frame.data, 0); + calcCrc = legic4Crc(LEGIC_READ, byte_index, byte, cmd_sz); + crc = BYTEx(current_frame.data, 1); if( calcCrc != crc ) { Dbprintf("!!! crc mismatch: expected %x but got %x !!!", calcCrc, crc); return -1; } - - // we wait anyways - legic_prng_forward(4); return byte; } @@ -431,10 +470,10 @@ int legic_read_byte(int byte_index, int cmd_sz) { * - forward the prng based on the timing */ //int legic_write_byte(int byte, int addr, int addr_sz, int PrngCorrection) { -int legic_write_byte(int byte, int addr, int addr_sz) { +int legic_write_byte(uint8_t byte, uint16_t addr, uint8_t addr_sz) { //do not write UID, CRC at offset 0-4. - if(addr <= 0x04) return 0; + if (addr <= 4) return 0; // crc crc_clear(&legic_crc); @@ -443,121 +482,120 @@ int legic_write_byte(int byte, int addr, int addr_sz) { crc_update(&legic_crc, byte, 8); uint32_t crc = crc_finish(&legic_crc); + uint32_t crc2 = legic4Crc(LEGIC_WRITE, addr, byte, addr_sz+1); + if ( crc != crc2 ) + Dbprintf("crc is missmatch"); + // send write command uint32_t cmd = ((crc <<(addr_sz+1+8)) //CRC |(byte <<(addr_sz+1)) //Data |(addr <<1) //Address - |(0x00 <<0)); //CMD = W + | LEGIC_WRITE); //CMD = Write + uint32_t cmd_sz = addr_sz+1+8+4; //crc+data+cmd legic_prng_forward(2); /* we wait anyways */ - while(timer->TC_CV < 387) ; /* ~ 258us */ + WaitUS(TAG_FRAME_WAIT); - frame_send_rwd(cmd, cmd_sz); + frame_sendAsReader(cmd, cmd_sz); -// wllm-rbnt doesnt have these -// AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; -// AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; + // wllm-rbnt doesnt have these + AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; + AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; // wait for ack int t, old_level = 0, edges = 0; int next_bit_at = 0; - while(timer->TC_CV < 387) ; /* ~ 258us */ + WaitUS(TAG_FRAME_WAIT); - for( t = 0; t < 80; t++) { + for( t = 0; t < 80; ++t) { edges = 0; - next_bit_at += TAG_TIME_BIT; + next_bit_at += TAG_BIT_PERIOD; while(timer->TC_CV < next_bit_at) { int level = (AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN); - if(level != old_level) { + if(level != old_level) edges++; - } + old_level = level; } if(edges > 20 && edges < 60) { /* expected are 42 edges */ int t = timer->TC_CV; - int c = t / TAG_TIME_BIT; + int c = t / TAG_BIT_PERIOD; - ResetClock(); + ResetTimer(timer); legic_prng_forward(c); return 0; } } - ResetClock(); + ResetTimer(timer); return -1; } int LegicRfReader(int offset, int bytes, int iv) { - // ice_legic_setup(); - // ice_legic_select_card(); - // return 0; - - int byte_index = 0, cmd_sz = 0, card_sz = 0; - - iv = (iv <= 0 ) ? SESSION_IV : iv; + uint16_t byte_index = 0; + uint8_t cmd_sz = 0, isOK = 1; + int card_sz = 0; LegicCommonInit(); - if ( MF_DBGLEVEL >= 2) DbpString("setting up legic card"); - - uint32_t tag_type = perform_setup_phase_rwd(iv); - - //we lose to mutch time with dprintf + uint32_t tag_type = setup_phase_reader(iv); + switch_off_tag_rwd(); - + switch(tag_type) { case 0x0d: - if ( MF_DBGLEVEL >= 2) DbpString("MIM22 card found, reading card ..."); + if ( MF_DBGLEVEL >= 2) DbpString("MIM22 card found, reading card"); cmd_sz = 6; card_sz = 22; break; case 0x1d: - if ( MF_DBGLEVEL >= 2) DbpString("MIM256 card found, reading card ..."); + if ( MF_DBGLEVEL >= 2) DbpString("MIM256 card found, reading card"); cmd_sz = 9; card_sz = 256; break; case 0x3d: - if ( MF_DBGLEVEL >= 2) DbpString("MIM1024 card found, reading card ..."); + if ( MF_DBGLEVEL >= 2) DbpString("MIM1024 card found, reading card"); cmd_sz = 11; card_sz = 1024; break; default: - if ( MF_DBGLEVEL >= 1) Dbprintf("Unknown card format: %x",tag_type); - return -1; + if ( MF_DBGLEVEL >= 1) Dbprintf("Unknown card format: %x", tag_type); + isOK = 0; + goto OUT; + break; } - if(bytes == -1) + if (bytes == -1) bytes = card_sz; - if(bytes+offset >= card_sz) + if (bytes + offset >= card_sz) bytes = card_sz - offset; - perform_setup_phase_rwd(iv); - - legic_prng_forward(2); - + // Start setup and read bytes. + setup_phase_reader(iv); + LED_B_ON(); - while(byte_index < bytes) { - int r = legic_read_byte(byte_index+offset, cmd_sz); - if(r == -1 || BUTTON_PRESS()) { - switch_off_tag_rwd(); - LEDsoff(); - if ( MF_DBGLEVEL >= 2) DbpString("operation aborted"); - return -1; + while (byte_index < bytes) { + int r = legic_read_byte(byte_index + offset, cmd_sz); + + if (r == -1 || BUTTON_PRESS()) { + if ( MF_DBGLEVEL >= 3) DbpString("operation aborted"); + isOK = 0; + goto OUT; } - cardmem[byte_index] = r; + cardmem[++byte_index] = r; WDT_HIT(); - byte_index++; } +OUT: + WDT_HIT(); switch_off_tag_rwd(); LEDsoff(); - - if ( MF_DBGLEVEL >= 1) Dbprintf("Card read, use 'hf legic decode' or"); - if ( MF_DBGLEVEL >= 1) Dbprintf("'data hexsamples %d' to view results", (bytes+7) & ~7); + uint8_t len = (bytes & 0x3FF); + cmd_send(CMD_ACK,isOK,len,0,cardmem,len); return 0; } @@ -565,7 +603,7 @@ int LegicRfReader(int offset, int bytes, int iv) { int byte_index=0; LED_B_ON(); - perform_setup_phase_rwd(SESSION_IV); + setup_phase_reader(iv); //legic_prng_forward(2); while(byte_index < bytes) { int r; @@ -604,42 +642,40 @@ int LegicRfReader(int offset, int bytes, int iv) { void LegicRfWriter(int offset, int bytes, int iv) { - int byte_index = 0, addr_sz = 0; - - iv = (iv <=0 ) ? SESSION_IV : iv; + int byte_index = 0, addr_sz = 0; LegicCommonInit(); if ( MF_DBGLEVEL >= 2) DbpString("setting up legic card"); - uint32_t tag_type = perform_setup_phase_rwd(iv); + uint32_t tag_type = setup_phase_reader(iv); switch_off_tag_rwd(); switch(tag_type) { case 0x0d: if(offset+bytes > 22) { - Dbprintf("Error: can not write to 0x%03.3x on MIM22", offset+bytes); + Dbprintf("Error: can not write to 0x%03.3x on MIM22", offset + bytes); return; } addr_sz = 5; - if ( MF_DBGLEVEL >= 2) Dbprintf("MIM22 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset+bytes); + if ( MF_DBGLEVEL >= 2) Dbprintf("MIM22 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset + bytes); break; case 0x1d: if(offset+bytes > 0x100) { - Dbprintf("Error: can not write to 0x%03.3x on MIM256", offset+bytes); + Dbprintf("Error: can not write to 0x%03.3x on MIM256", offset + bytes); return; } addr_sz = 8; - if ( MF_DBGLEVEL >= 2) Dbprintf("MIM256 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset+bytes); + if ( MF_DBGLEVEL >= 2) Dbprintf("MIM256 card found, writing 0x%02.2x - 0x%02.2x ...", offset, offset + bytes); break; case 0x3d: if(offset+bytes > 0x400) { - Dbprintf("Error: can not write to 0x%03.3x on MIM1024", offset+bytes); + Dbprintf("Error: can not write to 0x%03.3x on MIM1024", offset + bytes); return; } addr_sz = 10; - if ( MF_DBGLEVEL >= 2) Dbprintf("MIM1024 card found, writing 0x%03.3x - 0x%03.3x ...", offset, offset+bytes); + if ( MF_DBGLEVEL >= 2) Dbprintf("MIM1024 card found, writing 0x%03.3x - 0x%03.3x ...", offset, offset + bytes); break; default: Dbprintf("No or unknown card found, aborting"); @@ -647,9 +683,9 @@ void LegicRfWriter(int offset, int bytes, int iv) { } LED_B_ON(); - perform_setup_phase_rwd(iv); + setup_phase_reader(iv); + int r = 0; while(byte_index < bytes) { - int r; //check if the DCF should be changed if ( ((byte_index+offset) == 0x05) && (bytes >= 0x02) ) { @@ -666,7 +702,7 @@ void LegicRfWriter(int offset, int bytes, int iv) { r = legic_write_byte(cardmem[byte_index+offset], byte_index+offset, addr_sz); } - if((r != 0) || BUTTON_PRESS()) { + if ((r != 0) || BUTTON_PRESS()) { Dbprintf("operation aborted @ 0x%03.3x", byte_index); switch_off_tag_rwd(); LEDsoff(); @@ -683,14 +719,12 @@ void LegicRfWriter(int offset, int bytes, int iv) { void LegicRfRawWriter(int address, int byte, int iv) { int byte_index = 0, addr_sz = 0; - - iv = (iv <= 0) ? SESSION_IV : iv; LegicCommonInit(); if ( MF_DBGLEVEL >= 2) DbpString("setting up legic card"); - uint32_t tag_type = perform_setup_phase_rwd(iv); + uint32_t tag_type = setup_phase_reader(iv); switch_off_tag_rwd(); @@ -727,9 +761,8 @@ void LegicRfRawWriter(int address, int byte, int iv) { Dbprintf("integer value: %d address: %d addr_sz: %d", byte, address, addr_sz); LED_B_ON(); - perform_setup_phase_rwd(iv); - //legic_prng_forward(2); - + setup_phase_reader(iv); + int r = legic_write_byte(byte, address, addr_sz); if((r != 0) || BUTTON_PRESS()) { @@ -755,21 +788,19 @@ static void frame_handle_tag(struct legic_frame const * const f) LED_C_ON(); - prng_timer->TC_CCR = AT91C_TC_SWTRG; - while(prng_timer->TC_CV > 1) ; + // Reset prng timer + ResetTimer(prng_timer); legic_prng_init(f->data); - frame_send_tag(0x3d, 6, 1); /* 0x3d^0x26 = 0x1b */ + frame_send_tag(0x3d, 6, 1); /* 0x3d^0x26 = 0x1B */ legic_state = STATE_IV; legic_read_count = 0; legic_prng_bc = 0; legic_prng_iv = f->data; - /* TIMEOUT */ - ResetClock(); - - //while(timer->TC_CV < 280); - WAIT(280) + + ResetTimer(timer); + WaitUS(280); return; } @@ -780,14 +811,11 @@ static void frame_handle_tag(struct legic_frame const * const f) if((f->bits == 6) && (f->data == xored)) { legic_state = STATE_CON; - /* TIMEOUT */ - ResetClock(); - - //while(timer->TC_CV < 200); - WAIT(200) - + ResetTimer(timer); + WaitUS(200); return; - } else { + + } else { legic_state = STATE_DISCON; LED_C_OFF(); Dbprintf("iv: %02x frame: %02x key: %02x xored: %02x", legic_prng_iv, f->data, local_key, xored); @@ -801,7 +829,7 @@ static void frame_handle_tag(struct legic_frame const * const f) int key = get_key_stream(2, 11); //legic_phase_drift, 11); int addr = f->data ^ key; addr = addr >> 1; int data = BigBuf[addr]; - int hash = LegicCRC(addr, data, 11) << 8; + int hash = legic4Crc(LEGIC_READ, addr, data, 11) << 8; BigBuf[OFFSET_LOG+legic_read_count] = (uint8_t)addr; legic_read_count++; @@ -810,13 +838,9 @@ static void frame_handle_tag(struct legic_frame const * const f) frame_send_tag(hash | data, 12, 1); - /* TIMEOUT */ - ResetClock(); - + ResetTimer(timer); legic_prng_forward(2); - //while(timer->TC_CV < 180); - WAIT(180) - + WaitUS(180); return; } } @@ -912,7 +936,7 @@ void LegicRfSimulate(int phase, int frame, int reqresp) AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN; AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN; - setup_timer(); + //setup_timer(); crc_init(&legic_crc, 4, 0x19 >> 1, 0x5, 0); int old_level = 0; @@ -967,10 +991,6 @@ void LegicRfSimulate(int phase, int frame, int reqresp) LEDsoff(); } -//----------------------------------------------------------------------------- -//----------------------------------------------------------------------------- - - //----------------------------------------------------------------------------- // Code up a string of octets at layer 2 (including CRC, we don't generate // that here) so that they can be transmitted to the reader. Doesn't transmit @@ -1203,18 +1223,16 @@ static struct { // } -static void UartReset() -{ - Uart.byteCntMax = MAX_FRAME_SIZE; +static void UartReset() { + Uart.byteCntMax = 3; Uart.state = STATE_UNSYNCD; Uart.byteCnt = 0; Uart.bitCnt = 0; Uart.posCnt = 0; - memset(Uart.output, 0x00, MAX_FRAME_SIZE); + memset(Uart.output, 0x00, 3); } -// static void UartInit(uint8_t *data) -// { +// static void UartInit(uint8_t *data) { // Uart.output = data; // UartReset(); // } @@ -1450,7 +1468,7 @@ static void DemodReset() { Demod.bitCount = 0; Demod.thisBit = 0; Demod.shiftReg = 0; - memset(Demod.output, 0x00, MAX_FRAME_SIZE); + memset(Demod.output, 0x00, 3); } static void DemodInit(uint8_t *data) { @@ -1644,20 +1662,19 @@ int ice_legic_select_card() uint8_t wakeup[] = { 0x7F }; uint8_t getid[] = {0x19}; - legic_prng_init(SESSION_IV); + //legic_prng_init(SESSION_IV); // first, wake up the tag, 7bits CodeAndTransmitLegicAsReader(wakeup, sizeof(wakeup), 7); GetSamplesForLegicDemod(1000, TRUE); - // frame_clean(¤t_frame); - //frame_receive_rwd(¤t_frame, 6, 1); + //frame_receiveAsReader(¤t_frame, 6, 1); legic_prng_forward(1); /* we wait anyways */ //while(timer->TC_CV < 387) ; /* ~ 258us */ - //frame_send_rwd(0x19, 6); + //frame_sendAsReader(0x19, 6); CodeAndTransmitLegicAsReader(getid, sizeof(getid), 8); GetSamplesForLegicDemod(1000, TRUE); @@ -1710,7 +1727,7 @@ void ice_legic_setup() { // Signal field is on with the appropriate LED LED_D_ON(); FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD); - SpinDelay(200); + SpinDelay(20); // Start the timer //StartCountSspClk();