X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/f86d6b557af096460adcb596a6e829e5900e0e76..27882d378be348c9bf68b741f993de0ea2001ab8:/armsrc/hitag2.c

diff --git a/armsrc/hitag2.c b/armsrc/hitag2.c
index c565511c..dd0211da 100644
--- a/armsrc/hitag2.c
+++ b/armsrc/hitag2.c
@@ -340,7 +340,7 @@ static void hitag2_handle_reader_command(byte_t* rx, const size_t rxlen, byte_t*
 				
 				// Unknown command
 				default:
-					Dbprintf("Uknown command: %02x %02x",rx[0],rx[1]);
+					Dbprintf("Unknown command: %02x %02x",rx[0],rx[1]);
 					return;
 				break;
 			}
@@ -993,7 +993,7 @@ void SimulateHitagTag(bool tag_mem_supplied, byte_t* data) {
 	
 	// Set up simulator mode, frequency divisor which will drive the FPGA
 	// and analog mux selection.
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT | FPGA_LF_EDGE_DETECT_READER_FIELD);
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
 	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
 	SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
 	RELAY_OFF();
@@ -1203,6 +1203,7 @@ void ReaderHitag(hitag_function htf, hitag_data* htd) {
 			bQuiet = false;
 			bCrypto = false;
 			bAuthenticating = false;
+			bQuitTraceFull = true;
 		} break;
 		default: {
 			Dbprintf("Error, unknown function: %d",htf);
@@ -1331,6 +1332,8 @@ void ReaderHitag(hitag_function htf, hitag_data* htd) {
 		// we need to wait (T_Wait2 + half_tag_period) when the last was a 'one'.
 		// All timer values are in terms of T0 units
 		while(AT91C_BASE_TC0->TC_CV < T0*(t_wait+(HITAG_T_TAG_HALF_PERIOD*lastbit)));
+			
+			//Dbprintf("DEBUG: Sending reader frame");
 		
 		// Transmit the reader frame
 		hitag_reader_send_frame(tx,txlen);
@@ -1360,7 +1363,9 @@ void ReaderHitag(hitag_function htf, hitag_data* htd) {
 		bSkip = true;
 		tag_sof = reset_sof;
 		response = 0;
-		
+			//Dbprintf("DEBUG: Waiting to receive frame");
+		uint32_t errorCount = 0;
+
 		// Receive frame, watch for at most T0*EOF periods
 		while (AT91C_BASE_TC1->TC_CV < T0*HITAG_T_WAIT_MAX) {
 			// Check if falling edge in tag modulation is detected
@@ -1376,19 +1381,29 @@ void ReaderHitag(hitag_function htf, hitag_data* htd) {
 				// Capture tag frame (manchester decoding using only falling edges)
 				if(ra >= HITAG_T_EOF) {
 					if (rxlen != 0) {
-						//DbpString("wierd1?");
+						//Dbprintf("DEBUG: Wierd1");
 					}
 					// Capture the T0 periods that have passed since last communication or field drop (reset)
 					// We always recieve a 'one' first, which has the falling edge after a half period |-_|
 					response = ra-HITAG_T_TAG_HALF_PERIOD;
 				} else if(ra >= HITAG_T_TAG_CAPTURE_FOUR_HALF) {
 					// Manchester coding example |-_|_-|-_| (101)
+
+					//need to test to verify we don't exceed memory...
+					//if ( ((rxlen+2) / 8) > HITAG_FRAME_LEN) {
+					//	break;
+					//}
 					rx[rxlen / 8] |= 0 << (7-(rxlen%8));
 					rxlen++;
 					rx[rxlen / 8] |= 1 << (7-(rxlen%8));
 					rxlen++;
 				} else if(ra >= HITAG_T_TAG_CAPTURE_THREE_HALF) {
 					// Manchester coding example |_-|...|_-|-_| (0...01)
+					
+					//need to test to verify we don't exceed memory...
+					//if ( ((rxlen+2) / 8) > HITAG_FRAME_LEN) {
+					//	break;
+					//}
 					rx[rxlen / 8] |= 0 << (7-(rxlen%8));
 					rxlen++;
 					// We have to skip this half period at start and add the 'one' the second time 
@@ -1400,6 +1415,11 @@ void ReaderHitag(hitag_function htf, hitag_data* htd) {
 					bSkip = !bSkip;
 				} else if(ra >= HITAG_T_TAG_CAPTURE_TWO_HALF) {
 					// Manchester coding example |_-|_-| (00) or |-_|-_| (11)
+
+					//need to test to verify we don't exceed memory...
+					//if ( ((rxlen+2) / 8) > HITAG_FRAME_LEN) {
+					//	break;
+					//}
 					if (tag_sof) {
 						// Ignore bits that are transmitted during SOF
 						tag_sof--;
@@ -1409,22 +1429,27 @@ void ReaderHitag(hitag_function htf, hitag_data* htd) {
 						rxlen++;
 					}
 				} else {
+						//Dbprintf("DEBUG: Wierd2");
+						errorCount++;
 					// Ignore wierd value, is to small to mean anything
 				}
 			}
-
+			//if we saw over 100 wierd values break it probably isn't hitag...
+			if (errorCount >100) break;
 			// We can break this loop if we received the last bit from a frame
 			if (AT91C_BASE_TC1->TC_CV > T0*HITAG_T_EOF) {
 				if (rxlen>0) break;
 			}
 		}
 	}
+	//Dbprintf("DEBUG: Done waiting for frame");
+	
 	LED_B_OFF();
 	LED_D_OFF();
 	AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;
 	AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 	//Dbprintf("frame received: %d",frame_count);
-  //DbpString("All done");
-  cmd_send(CMD_ACK,bSuccessful,0,0,(byte_t*)tag.sectors,48);
+	//DbpString("All done");
+	cmd_send(CMD_ACK,bSuccessful,0,0,(byte_t*)tag.sectors,48);
 }