X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/fb22897415bd3892374bb46012cf4e9d5c4cf965..69f42a0593bcb5b52fabe358668358390b4af056:/armsrc/fpgaloader.c diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c index a2c9d1e4..1deb5b7d 100644 --- a/armsrc/fpgaloader.c +++ b/armsrc/fpgaloader.c @@ -158,9 +158,7 @@ void FpgaSetupSsc(void) //----------------------------------------------------------------------------- bool FpgaSetupSscDma(uint8_t *buf, int len) { - if (buf == NULL) { - return false; - } + if (buf == NULL) return false; AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; // Disable DMA Transfer AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) buf; // transfer to this memory address @@ -168,11 +166,15 @@ bool FpgaSetupSscDma(uint8_t *buf, int len) AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) buf; // next transfer to same memory address AT91C_BASE_PDC_SSC->PDC_RNCR = len; // ... with same number of bytes AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN; // go! - - return true; + + return true; } +//---------------------------------------------------------------------------- +// Uncompress (inflate) the FPGA data. Returns one decompressed byte with +// each call. +//---------------------------------------------------------------------------- static int get_from_fpga_combined_stream(z_streamp compressed_fpga_stream, uint8_t *output_buffer) { if (fpga_image_ptr == compressed_fpga_stream->next_out) { // need more data @@ -180,12 +182,11 @@ static int get_from_fpga_combined_stream(z_streamp compressed_fpga_stream, uint8 compressed_fpga_stream->avail_out = OUTPUT_BUFFER_LEN; fpga_image_ptr = output_buffer; int res = inflate(compressed_fpga_stream, Z_SYNC_FLUSH); - if (res != Z_OK) { + if (res != Z_OK) Dbprintf("inflate returned: %d, %s", res, compressed_fpga_stream->msg); - } - if (res < 0) { + + if (res < 0) return res; - } } uncompressed_bytes_cnt++; @@ -193,7 +194,11 @@ static int get_from_fpga_combined_stream(z_streamp compressed_fpga_stream, uint8 return *fpga_image_ptr++; } - +//---------------------------------------------------------------------------- +// Undo the interleaving of several FPGA config files. FPGA config files +// are combined into one big file: +// 288 bytes from FPGA file 1, followed by 288 bytes from FGPA file 2, etc. +//---------------------------------------------------------------------------- static int get_from_fpga_stream(int bitstream_version, z_streamp compressed_fpga_stream, uint8_t *output_buffer) { while((uncompressed_bytes_cnt / FPGA_INTERLEAVE_SIZE) % FPGA_BITSTREAM_MAX != (bitstream_version - 1)) { @@ -208,18 +213,19 @@ static int get_from_fpga_stream(int bitstream_version, z_streamp compressed_fpga static voidpf fpga_inflate_malloc(voidpf opaque, uInt items, uInt size) { - Dbprintf("zlib requested %d bytes", items*size); return BigBuf_malloc(items*size); } static void fpga_inflate_free(voidpf opaque, voidpf address) { - Dbprintf("zlib frees memory"); - BigBuf_free_keep_EM(); + BigBuf_free(); BigBuf_Clear_ext(false); } +//---------------------------------------------------------------------------- +// Initialize decompression of the respective (HF or LF) FPGA stream +//---------------------------------------------------------------------------- static bool reset_fpga_stream(int bitstream_version, z_streamp compressed_fpga_stream, uint8_t *output_buffer) { uint8_t header[FPGA_BITSTREAM_FIXED_HEADER_SIZE]; @@ -234,7 +240,7 @@ static bool reset_fpga_stream(int bitstream_version, z_streamp compressed_fpga_s compressed_fpga_stream->zalloc = &fpga_inflate_malloc; compressed_fpga_stream->zfree = &fpga_inflate_free; - inflateInit2(compressed_fpga_stream, 15); + inflateInit2(compressed_fpga_stream, 0); fpga_image_ptr = output_buffer; @@ -268,7 +274,7 @@ static void DownloadFPGA_byte(unsigned char w) static void DownloadFPGA(int bitstream_version, int FpgaImageLen, z_streamp compressed_fpga_stream, uint8_t *output_buffer) { - Dbprintf("DownloadFPGA(len: %d)", FpgaImageLen); + //Dbprintf("DownloadFPGA(len: %d)", FpgaImageLen); int i=0; @@ -330,8 +336,6 @@ static void DownloadFPGA(int bitstream_version, int FpgaImageLen, z_streamp comp DownloadFPGA_byte(b); } - Dbprintf("%d bytes loaded into FPGA", i); - // continue to clock FPGA until ready signal goes high i=100000; while ( (i--) && ( !(AT91C_BASE_PIOA->PIO_PDSR & GPIO_FPGA_DONE ) ) ) { @@ -402,19 +406,22 @@ static int bitparse_find_section(int bitstream_version, char section_name, unsig } -//----------------------------------------------------------------------------- -// Find out which FPGA image format is stored in flash, then call DownloadFPGA -// with the right parameters to download the image -//----------------------------------------------------------------------------- +//---------------------------------------------------------------------------- +// Check which FPGA image is currently loaded (if any). If necessary +// decompress and load the correct (HF or LF) image to the FPGA +//---------------------------------------------------------------------------- void FpgaDownloadAndGo(int bitstream_version) { z_stream compressed_fpga_stream; - uint8_t output_buffer[OUTPUT_BUFFER_LEN]; + uint8_t output_buffer[OUTPUT_BUFFER_LEN] = {0x00}; // check whether or not the bitstream is already loaded if (downloaded_bitstream == bitstream_version) return; + // make sure that we have enough memory to decompress + BigBuf_free(); BigBuf_Clear_ext(false); + if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer)) { return; } @@ -426,22 +433,32 @@ void FpgaDownloadAndGo(int bitstream_version) } inflateEnd(&compressed_fpga_stream); - + + // free eventually allocated BigBuf memory + BigBuf_free(); BigBuf_Clear_ext(false); } +//----------------------------------------------------------------------------- +// Gather version information from FPGA image. Needs to decompress the begin +// of the respective (HF or LF) image. +// Note: decompression makes use of (i.e. overwrites) BigBuf[]. It is therefore +// advisable to call this only once and store the results for later use. +//----------------------------------------------------------------------------- void FpgaGatherVersion(int bitstream_version, char *dst, int len) { unsigned int fpga_info_len; - char tempstr[40]; + char tempstr[40] = {0x00}; z_stream compressed_fpga_stream; - uint8_t output_buffer[OUTPUT_BUFFER_LEN]; + uint8_t output_buffer[OUTPUT_BUFFER_LEN] = {0x00}; dst[0] = '\0'; - if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer)) { + // ensure that we can allocate enough memory for decompression: + BigBuf_free(); BigBuf_Clear_ext(false); + + if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer)) return; - } if(bitparse_find_section(bitstream_version, 'a', &fpga_info_len, &compressed_fpga_stream, output_buffer)) { for (uint16_t i = 0; i < fpga_info_len; i++) { @@ -487,8 +504,9 @@ void FpgaGatherVersion(int bitstream_version, char *dst, int len) strncat(dst, tempstr, len-1); } - inflateEnd(&compressed_fpga_stream); + strncat(dst, "\n", len-1); + inflateEnd(&compressed_fpga_stream); } @@ -539,3 +557,16 @@ void SetAdcMuxFor(uint32_t whichGpio) HIGH(whichGpio); } + +void Fpga_print_status(void) { + Dbprintf("Fgpa"); + switch(downloaded_bitstream) { + case FPGA_BITSTREAM_HF: Dbprintf(" mode....................HF"); break; + case FPGA_BITSTREAM_LF: Dbprintf(" mode....................LF"); break; + default: Dbprintf(" mode....................%d", downloaded_bitstream); break; + } +} + +int FpgaGetCurrent() { + return downloaded_bitstream; +}