From: edouard@lafargue.name Date: Wed, 15 Apr 2009 08:09:06 +0000 (+0000) Subject: Added LF frequency adjustments from d18c7db, cleaned up code, X-Git-Tag: v1.0.0~612 X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/commitdiff_plain/30f2a7d38fd35b2427a7eb42e1cd75fb1105f927 Added LF frequency adjustments from d18c7db, cleaned up code, typo fixes in iso14443a code, added the missing "tools" directory, added initial elements for online/offline detection for commands. --- diff --git a/armsrc/appmain.c b/armsrc/appmain.c index 30312754..bb733fef 100644 --- a/armsrc/appmain.c +++ b/armsrc/appmain.c @@ -87,8 +87,10 @@ void AcquireRawAdcSamples125k(BOOL at134khz) memset(dest,0,n); if(at134khz) { + FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_134_KHZ); } else { + FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_125_KHZ); } @@ -121,7 +123,7 @@ void AcquireRawAdcSamples125k(BOOL at134khz) //----------------------------------------------------------------------------- // Read an ADC channel and block till it completes, then return the result -// in ADC units (0 to 1023). Also a routine to average sixteen samples and +// in ADC units (0 to 1023). Also a routine to average 32 samples and // return that. //----------------------------------------------------------------------------- static int ReadAdc(int ch) @@ -152,6 +154,29 @@ static int AvgAdc(int ch) return (a + 15) >> 5; } + +/* + * Sweeps the useful LF range of the proxmark from + * 46.8kHz (divisor=255) to 600kHz (divisor=19) and + * reads the voltage in the antenna: the result is a graph + * which should clearly show the resonating frequency of your + * LF antenna ( hopefully around 90 if it is tuned to 125kHz!) + */ +void SweepLFrange() +{ + BYTE *dest = (BYTE *)BigBuf; + int i; + + // clear buffer + memset(BigBuf,0,sizeof(BigBuf)); + + FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER); + for (i=255; i>19; i--) { + FpgaSendCommand(FPGA_CMD_SET_DIVISOR, i); + SpinDelay(20); + dest[i] = (137500 * AvgAdc(4)) >> 18; + } +} void MeasureAntennaTuning(void) { @@ -164,6 +189,7 @@ void MeasureAntennaTuning(void) UsbCommand c; // Let the FPGA drive the low-frequency antenna around 125 kHz. + FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_125_KHZ); SpinDelay(20); vLf125 = AvgAdc(4); @@ -172,6 +198,7 @@ void MeasureAntennaTuning(void) vLf125 = (137500 * vLf125) >> 10; // Let the FPGA drive the low-frequency antenna around 134 kHz. + FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_134_KHZ); SpinDelay(20); vLf134 = AvgAdc(4); @@ -207,7 +234,7 @@ void SimulateTagLowFrequency(int period) PIO_OUTPUT_DISABLE = (1 << GPIO_SSC_CLK); #define SHORT_COIL() LOW(GPIO_SSC_DOUT) -#define OPEN_COIL() HIGH(GPIO_SSC_DOUT) +#define OPEN_COIL() HIGH(GPIO_SSC_DOUT) i = 0; for(;;) { @@ -345,6 +372,7 @@ static void CmdHIDdemodFSK(void) int m=0, n=0, i=0, idx=0, found=0, lastval=0; DWORD hi=0, lo=0; + FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER | FPGA_LF_READER_USE_125_KHZ); // Connect the A/D to the peak-detected low-frequency path. @@ -448,7 +476,7 @@ static void CmdHIDdemodFSK(void) dest[i++]=dest[idx-1]; dest[i++]=dest[idx-1]; break; - // When a logic 0 is immediately followed by the start of the next transmisson + // When a logic 0 is immediately followed by the start of the next transmisson // (special pattern) a pattern of 4 bit duration lengths is created. case 4: dest[i++]=dest[idx-1]; @@ -573,20 +601,19 @@ void UsbPacketReceived(BYTE *packet, int len) break; case CMD_READER_ISO_15693: - ReaderIso15693(c->ext1); + ReaderIso15693(c->ext1); break; case CMD_SIMTAG_ISO_15693: - SimTagIso15693(c->ext1); + SimTagIso15693(c->ext1); break; - case CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_14443: AcquireRawAdcSamplesIso14443(c->ext1); break; case CMD_READER_ISO_14443a: - ReaderIso14443a(c->ext1); + ReaderIso14443a(c->ext1); break; case CMD_SNOOP_ISO_14443: @@ -656,6 +683,14 @@ void UsbPacketReceived(BYTE *packet, int len) LCDReset(); break; + case CMD_SWEEP_LF: + SweepLFrange(); + break; + + case CMD_SET_LF_DIVISOR: + FpgaSendCommand(FPGA_CMD_SET_DIVISOR, c->ext1); + break; + case CMD_LCD: LCDSend(c->ext1); break; diff --git a/armsrc/apps.h b/armsrc/apps.h index e09c8357..84dd8fe2 100644 --- a/armsrc/apps.h +++ b/armsrc/apps.h @@ -19,6 +19,7 @@ extern BYTE ToSend[]; extern DWORD BigBuf[]; /// fpga.c +void FpgaSendCommand(WORD cmd, WORD v); void FpgaWriteConfWord(BYTE v); void FpgaDownloadAndGo(void); void FpgaSetupSsc(void); @@ -26,6 +27,9 @@ void SetupSpi(int mode); void FpgaSetupSscDma(BYTE *buf, int len); void SetAdcMuxFor(int whichGpio); +// Definitions for the FPGA commands. +#define FPGA_CMD_SET_CONFREG (1<<12) +#define FPGA_CMD_SET_DIVISOR (2<<12) // Definitions for the FPGA configuration word. #define FPGA_MAJOR_MODE_LF_READER (0<<5) #define FPGA_MAJOR_MODE_LF_SIMULATOR (1<<5) diff --git a/armsrc/fpga.c b/armsrc/fpga.c index 2bcade28..059fc82a 100644 --- a/armsrc/fpga.c +++ b/armsrc/fpga.c @@ -53,7 +53,7 @@ void SetupSpi(int mode) ( 1 << 24) | // Delay between Consecutive Transfers (32 MCK periods) ( 1 << 16) | // Delay Before SPCK (1 MCK period) ( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud - ( 0 << 4) | // Bits per Transfer (8 bits) + ( 8 << 4) | // Bits per Transfer (16 bits) ( 0 << 3) | // Chip Select inactive after transfer ( 1 << 1) | // Clock Phase data captured on leading edge, changes on following edge ( 0 << 0); // Clock Polarity inactive state is logic 0 @@ -185,15 +185,25 @@ void FpgaDownloadAndGo(void) LED_D_OFF(); } +//----------------------------------------------------------------------------- +// Send a 16 bit command/data pair to the FPGA. +// The bit format is: C3 C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 +// where C is the 4 bit command and D is the 12 bit data +//----------------------------------------------------------------------------- +void FpgaSendCommand(WORD cmd, WORD v) +{ + SetupSpi(SPI_FPGA_MODE); + while ((SPI_STATUS & SPI_STATUS_TX_EMPTY) == 0); // wait for the transfer to complete + SPI_TX_DATA = SPI_CONTROL_LAST_TRANSFER | cmd | v; // send the data +} //----------------------------------------------------------------------------- // Write the FPGA setup word (that determines what mode the logic is in, read -// vs. clone vs. etc.). +// vs. clone vs. etc.). This is now a special case of FpgaSendCommand() to +// avoid changing this function's occurence everywhere in the source code. //----------------------------------------------------------------------------- void FpgaWriteConfWord(BYTE v) { - SetupSpi(SPI_FPGA_MODE); - while ((SPI_STATUS & SPI_STATUS_TX_EMPTY) == 0); // wait for the transfer to complete - SPI_TX_DATA = SPI_CONTROL_LAST_TRANSFER | v; // send the data + FpgaSendCommand(FPGA_CMD_SET_CONFREG, v); } //----------------------------------------------------------------------------- diff --git a/armsrc/fpgaimg.c b/armsrc/fpgaimg.c index e69de29b..7e01dc19 100644 --- a/armsrc/fpgaimg.c +++ b/armsrc/fpgaimg.c @@ -0,0 +1,10541 @@ +// Generated by rbt2c.pl, do not edit! + +//// Xilinx ASCII Bitstream +//// Created by Bitstream K.31 +//// Design name: fpga-placed.ncd +//// Architecture: spartan2 +//// Part: 2s30vq100 +//// Date: Thu Apr 09 16:25:33 2009 +//// Bits: 336768 + +#include + +const DWORD FpgaImage[] = { + 0xffffffff, + 0xaa995566, + 0x30008001, + 0x00000007, + 0x30016001, + 0x00000008, + 0x30012001, + 0x00803f2d, + 0x3000c001, + 0x00000000, + 0x30008001, + 0x00000009, + 0x30002001, + 0x00000000, + 0x30008001, + 0x00000001, + 0x30004000, + 0x50002463, + 0x00121000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000480, + 0x00000000, + 0x00121000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000480, + 0x00000000, + 0x10030000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x001000c0, + 0x00000000, + 0x00020000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000080, + 0x00000000, + 0x00120000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000480, + 0x00000000, + 0x00120000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00100480, + 0x00000000, + 0x00120000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00100480, + 0x00000000, + 0xef100060, + 0x00180006, + 0x00018000, + 0x60001800, + 0x060001a8, + 0x0062005a, + 0x80166001, + 0xd82fc400, + 0x00000000, + 0xc005fd00, + 0xfe203320, + 0x0fc003f2, + 0x40fc8033, + 0x602cc203, + 0x3c00fc40, + 0x37c02ce0, + 0x03300070, + 0x00000000, + 0x8010ed40, + 0xbbc12220, + 0x0b8802e0, + 0x80bb000a, + 0x4008a402, + 0x3cc0b8e0, + 0x23d808e6, + 0x0be00430, + 0x00000000, + 0x8805cc90, + 0xb2902000, + 0x0b0012c0, + 0x04b32880, + 0x40080386, + 0x0c24b064, + 0x28d20b24, + 0x82230170, + 0x00000000, + 0xc015ac01, + 0xbb812205, + 0x0b8022e2, + 0x29bb8022, + 0x08889106, + 0x2c00b802, + 0x28c00ba0, + 0x02f00460, + 0x00000000, + 0x0015ec00, + 0xf80032b0, + 0x8f9603e2, + 0x00f9c030, + 0x720c9483, + 0x2c00f8f0, + 0x3ec08fa0, + 0x23100470, + 0x00000000, + 0xe001bc00, + 0xff003fa1, + 0x8ff403f8, + 0x00fd003f, + 0xe00ff003, + 0xfc00fc80, + 0xb7c00ce0, + 0x03f80060, + 0x00000000, + 0x4010ac00, + 0xf0103e86, + 0x4e9201ed, + 0x05f940ba, + 0x400c20c3, + 0xec00c240, + 0x32c00e20, + 0x23100420, + 0x00000000, + 0xc8053c00, + 0xbbc42ec0, + 0x089c80ed, + 0x14b9412a, + 0x8008b602, + 0xfc008a00, + 0xa3c00de0, + 0x02320040, + 0x00000000, + 0xe0054c10, + 0xb0c82cf0, + 0x082802c8, + 0x00b90828, + 0x80080002, + 0x8c008004, + 0x20c08a20, + 0x02380050, + 0x00000000, + 0x00011e04, + 0xb4802fe0, + 0x085812db, + 0x40bf8029, + 0x65085806, + 0xde008590, + 0x20e009e8, + 0x02080040, + 0x00000000, + 0x68080c00, + 0xf3003c10, + 0x0c2103c8, + 0x40b3003a, + 0x802c0003, + 0xac04ca10, + 0x70c00e20, + 0x03120200, + 0x00000000, + 0x401dbc04, + 0xff003d80, + 0x2be003fc, + 0x40f7003f, + 0x000fd003, + 0xfd20df10, + 0x3fd00f60, + 0x03d00660, + 0x00000000, + 0xa805ec4c, + 0xf8003ec0, + 0x0ca083e2, + 0x08cb0030, + 0x800ca013, + 0xee88c902, + 0x32f00ca2, + 0x032a0070, + 0x00000000, + 0x48119c00, + 0xb4002dc0, + 0x087002d8, + 0x040700a1, + 0xc0287002, + 0xdc008500, + 0x21c88a65, + 0x02120460, + 0x00000000, + 0xc0009e80, + 0xb7812f20, + 0x487812fe, + 0x00078021, + 0xa0096802, + 0xde038788, + 0x28e4096a, + 0x0a300020, + 0x00000000, + 0x4814cc00, + 0xb3802cf2, + 0x083e52cf, + 0x008b3022, + 0xa5093a42, + 0xcc008300, + 0x28c00b20, + 0x02120430, + 0x00000000, + 0xe815a808, + 0xfe803fa8, + 0x0cac03f8, + 0x82cec033, + 0x800dee03, + 0xe800ce00, + 0xba800de0, + 0x033a0460, + 0x00000000, + 0x4800e000, + 0xf8113e10, + 0x2f0103e0, + 0x20f8403e, + 0x000e8403, + 0xe000f800, + 0x36000e80, + 0x03d20030, + 0x00000000, + 0x0810e400, + 0xf9803e48, + 0x0cb40366, + 0x00c9a032, + 0x400c9203, + 0x2400f908, + 0x32400f90, + 0x03020430, + 0x00000000, + 0x80046400, + 0xb9c92c60, + 0x089c0225, + 0x40b9c022, + 0x40089c02, + 0x2400b900, + 0xa2400b10, + 0x0a200010, + 0x00000000, + 0x18052400, + 0xb9202e40, + 0x28908265, + 0x00ab0022, + 0x40181002, + 0x2400b100, + 0x22410b90, + 0x02060040, + 0x00000000, + 0x08140500, + 0xb1002ec0, + 0x08100205, + 0x00b14020, + 0x50281282, + 0x4440b168, + 0x20480b93, + 0x02020100, + 0x00000000, + 0xb80d6200, + 0xf8803e00, + 0x0c880360, + 0x00e200b2, + 0x000ca20b, + 0x0020f020, + 0x320c0f02, + 0x832e0350, + 0x00000000, + 0x9815e700, + 0xfd403d40, + 0x0fb403de, + 0x10fd803f, + 0x400fd282, + 0xa400fd20, + 0x3e4c0fd2, + 0x03e60670, + 0x00000000, + 0x1805e400, + 0xc9003e40, + 0x0c5003e4, + 0x00cd0033, + 0x400cd003, + 0x240ac900, + 0x32400c90, + 0x03060070, + 0x00000000, + 0x3810e000, + 0x88003a00, + 0x08800260, + 0x0088a08a, + 0x200a8042, + 0x20008800, + 0x22000880, + 0x028e0430, + 0x00000000, + 0x0805c400, + 0x01802a40, + 0x081002c4, + 0x04838902, + 0x4a08100a, + 0x04008100, + 0x20400810, + 0x02020170, + 0x00000000, + 0x1811a402, + 0x89002a40, + 0x28984244, + 0x00810022, + 0x500ab082, + 0x24008900, + 0x22400890, + 0x42860460, + 0x00000000, + 0xa014a400, + 0xc9003a62, + 0x0c9c12e7, + 0x42c98432, + 0x400c9923, + 0x2408c900, + 0x32400890, + 0x03280470, + 0x00000000, + 0x28008408, + 0xfb203ac4, + 0x0f90036c, + 0x00f9c03e, + 0x400f1043, + 0xe400f190, + 0xbe402f10, + 0x03ca0060, + 0x00000000, + 0x2810a000, + 0xf8003e12, + 0x0f880321, + 0x20f88032, + 0x002c8403, + 0x0000c800, + 0xb2000c80, + 0x030a0420, + 0x00000000, + 0x28042800, + 0xbac02ca0, + 0x0be0822a, + 0x21fe00a1, + 0x8008e18a, + 0x28008a00, + 0x22800da0, + 0x028a0040, + 0x00000000, + 0x28054c00, + 0xb2186cf0, + 0x0b38120f, + 0x00b30028, + 0x80083c02, + 0x0c069304, + 0x22c00830, + 0x024a0050, + 0x00000000, + 0x20011cc0, + 0x37002dc2, + 0x0b68021c, + 0x00a60229, + 0x80087006, + 0x0c809712, + 0x21c00970, + 0x02e80040, + 0x00000000, + 0x28081e00, + 0xf7803de2, + 0x0f78031e, + 0x00bd803b, + 0xa00ce803, + 0x1e00dfa2, + 0x30e00c3b, + 0x036b0200, + 0x00000000, + 0x081dac00, + 0xbb403e48, + 0x8ba00be8, + 0x00f80036, + 0x800fa003, + 0xec806b40, + 0x3edc0fb2, + 0x03820660, + 0x00000000, + 0x4005fe00, + 0xffc03360, + 0x0ce803fb, + 0x08c780b3, + 0xa004f803, + 0xff24ffc4, + 0x33f40df8, + 0x83000070, + 0x00000000, + 0xa8019c00, + 0xb7002150, + 0x8d4202d8, + 0x40860021, + 0x800d7003, + 0x9c00bf10, + 0x21cc08f0, + 0x0a2a0060, + 0x00000000, + 0x00109c00, + 0xb50021c2, + 0x086006d4, + 0x008d4023, + 0x82086002, + 0xdc00b700, + 0x24c01970, + 0x02000020, + 0x00000000, + 0x6014ec00, + 0xb3d020c0, + 0x092402c2, + 0x20801020, + 0xb0091002, + 0x8c10b340, + 0x24c00830, + 0x02080430, + 0x00000000, + 0xa815bc00, + 0xfa4032a0, + 0x0cb483ec, + 0x22cb0033, + 0xb00c9a03, + 0xfc00ff10, + 0xb7c00d70, + 0x032a0460, + 0x00000000, + 0x8000ec00, + 0xfb013ed8, + 0x0fa401ec, + 0x00fa003e, + 0x800f9483, + 0xec00fb00, + 0x38c00fb0, + 0x03e00030, + 0x00000000, + 0x0110fc00, + 0xcb0933e8, + 0x8fc093fc, + 0x00fd0033, + 0x820dc803, + 0xfc00ff00, + 0x3fc00cf0, + 0x03004430, + 0x00000000, + 0x81046c18, + 0x83002240, + 0x0b8a02ef, + 0x00b40029, + 0x80088102, + 0xec00bb00, + 0x2ec00db0, + 0x02204010, + 0x00000000, + 0x80056c00, + 0x8b0026c0, + 0x0bb802ed, + 0x80b98022, + 0x80099006, + 0xec00bb00, + 0x2ec009b0, + 0x02200040, + 0x00000000, + 0x08000c00, + 0x830424c0, + 0x4b0002cc, + 0x00b8802a, + 0x80080002, + 0xcc00b300, + 0x2cc009b0, + 0x02020100, + 0x00000000, + 0x00006c00, + 0xc900b6c0, + 0x0f8003cc, + 0x00ba0032, + 0x800da003, + 0xfc04ff04, + 0x3fc10cf0, + 0x03000150, + 0x00000000, + 0xa015fc02, + 0xff0039c0, + 0x0fc003fc, + 0x00ff003d, + 0x800fc003, + 0xfc00ff00, + 0x3fc00ff0, + 0x03e80670, + 0x00000000, + 0xc005fc00, + 0xce103308, + 0x2cc00330, + 0x80dc2033, + 0x400ce803, + 0x7e00f780, + 0x33f00fec, + 0x03300070, + 0x00000000, + 0x8010ef00, + 0x8b10a230, + 0x088c0222, + 0x00888022, + 0x6008a802, + 0x0c00b922, + 0x20c00b22, + 0x02a00430, + 0x00000000, + 0x8805cc42, + 0x8220a004, + 0x08241205, + 0x10901020, + 0x44880002, + 0xcc00b308, + 0xa0c80b32, + 0x02a20170, + 0x00000000, + 0xc015ac00, + 0x8b002202, + 0x28a08224, + 0x40880822, + 0x40088802, + 0xac81b900, + 0x22c00bb0, + 0x02b00460, + 0x00000000, + 0x4015cc00, + 0xc6003310, + 0x0cc40332, + 0x00dc5033, + 0x802c2a03, + 0xef80f340, + 0x32480fa1, + 0x03900470, + 0x00000000, + 0xe001bc00, + 0xff00bd04, + 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0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, + 0x30008001, + 0x00000005, + 0x3000a001, + 0x00000000, + 0x30000001, + 0x0000c17d, + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000, +}; + +const DWORD FpgaImageLen = sizeof(FpgaImage) / sizeof(FpgaImage[0]); + diff --git a/armsrc/iso14443.c b/armsrc/iso14443.c index 2a079fdb..2579b053 100644 --- a/armsrc/iso14443.c +++ b/armsrc/iso14443.c @@ -6,7 +6,7 @@ //----------------------------------------------------------------------------- #include #include "apps.h" -#include "..\common\iso14443_crc.c" +#include "../common/iso14443_crc.c" //static void GetSamplesFor14443(BOOL weTx, int n); diff --git a/armsrc/iso14443a.c b/armsrc/iso14443a.c index a687d877..0957d051 100644 --- a/armsrc/iso14443a.c +++ b/armsrc/iso14443a.c @@ -5,7 +5,7 @@ //----------------------------------------------------------------------------- #include #include "apps.h" -#include "..\common\iso14443_crc.c" +#include "../common/iso14443_crc.c" typedef enum { SEC_D = 1, @@ -1686,7 +1686,7 @@ void ReaderIso14443a(DWORD parameter) // OK we have selected at least at cascade 1, lets see if first byte of UID was 0x88 in // which case we need to make a cascade 2 request and select - this is a long UID - if (receivedAnswer[0] = 0x88) + if (receivedAnswer[0] == 0x88) { // Do cascade level 2 stuff /////////////////////////////////////////////////////////////////// diff --git a/doc/CHANGES.TXT b/doc/CHANGES.TXT index f927c6a2..815d0cf1 100644 --- a/doc/CHANGES.TXT +++ b/doc/CHANGES.TXT @@ -1,3 +1,24 @@ +################ +## 2009/04/09 ## +################ +winsrc/gui.cpp + Changes to PaintGraph to create X axis labels that are snapped to a power of two (useful when analysing low freq tags + with cycle times that are a power of two). Also small changes to keep the X axis labels fixed within the graph window + as the width of the graph window is resized. +armsrc/apps.h + New defines for FPGA commands FPGA_CMD_SET_CONFREG, FPGA_CMD_SET_DIVISOR_REG +armsrc/appmain.c + +armsrc/fpga.c + FpgaWriteConfWord(data) is now a special case of FpgaSendCommand(FPGA_CMD_SET_CONFREG, data) to avoid changing every + source file containing FpgaWriteConfWord() +fpga/fpga.v + Changes to the serial conf word, now takes a 4 bit command and 12 bit data code +fpga/lo_read.v + Significant changes to lo_read, it now can be configured with a divisor value to produce a configurable drive clock + for the antenna. + Recompiled FPGA code + ################ ## 2009/04/09 ## ################ diff --git a/fpga/fpga.v b/fpga/fpga.v index cbebc395..2a226946 100644 --- a/fpga/fpga.v +++ b/fpga/fpga.v @@ -21,7 +21,7 @@ `include "util.v" module fpga( - spck, miso, mosi, ncs, + spcki, miso, mosi, ncs, pck0i, ck_1356meg, ck_1356megb, pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4, adc_d, adc_clk, adc_noe, @@ -29,7 +29,7 @@ module fpga( cross_hi, cross_lo, dbg ); - input spck, mosi, ncs; + input spcki, mosi, ncs; output miso; input pck0i, ck_1356meg, ck_1356megb; output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4; @@ -40,11 +40,16 @@ module fpga( input cross_hi, cross_lo; output dbg; +//assign pck0 = pck0i; IBUFG #(.IOSTANDARD("DEFAULT") ) pck0b( .O(pck0), .I(pck0i) ); -//assign pck0 = pck0i; +//assign spck = spcki; + IBUFG #(.IOSTANDARD("DEFAULT") ) spckb( + .O(spck), + .I(spcki) + ); //----------------------------------------------------------------------------- // The SPI receiver. This sets up the configuration word, which the rest of // the logic looks at to determine how to connect the A/D and the coil @@ -52,7 +57,8 @@ module fpga( // to the configuration bits, for use below. //----------------------------------------------------------------------------- -reg [7:0] conf_word_shift; +reg [15:0] shift_reg; +reg [7:0] divisor; reg [7:0] conf_word; // We switch modes between transmitting to the 13.56 MHz tag and receiving @@ -60,15 +66,18 @@ reg [7:0] conf_word; // glitching, or else we will glitch the transmitted carrier. always @(posedge ncs) begin - conf_word <= conf_word_shift; + case(shift_reg[15:12]) + 4'b0001: conf_word <= shift_reg[7:0]; + 4'b0010: divisor <= shift_reg[7:0]; + endcase end always @(posedge spck) begin if(~ncs) begin - conf_word_shift[7:1] <= conf_word_shift[6:0]; - conf_word_shift[0] <= mosi; + shift_reg[15:1] <= shift_reg[14:0]; + shift_reg[0] <= mosi; end end @@ -110,7 +119,7 @@ lo_read lr( lr_ssp_frame, lr_ssp_din, ssp_dout, lr_ssp_clk, cross_hi, cross_lo, lr_dbg, - lo_is_125khz + lo_is_125khz, divisor ); lo_simulate ls( diff --git a/fpga/lo_read.v b/fpga/lo_read.v index 9c3edb22..d7b45cb5 100644 --- a/fpga/lo_read.v +++ b/fpga/lo_read.v @@ -1,6 +1,6 @@ //----------------------------------------------------------------------------- // The way that we connect things in low-frequency read mode. In this case -// we are generating the 134 kHz or 125 kHz carrier, and running the +// we are generating the 134 kHz or 125 kHz carrier, and running the // unmodulated carrier at that frequency. The A/D samples at that same rate, // and the result is serialized. // @@ -14,7 +14,7 @@ module lo_read( ssp_frame, ssp_din, ssp_dout, ssp_clk, cross_hi, cross_lo, dbg, - lo_is_125khz + lo_is_125khz, divisor ); input pck0, ck_1356meg, ck_1356megb; output pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4; @@ -25,6 +25,7 @@ module lo_read( input cross_hi, cross_lo; output dbg; input lo_is_125khz; + input [7:0] divisor; // The low-frequency RFID stuff. This is relatively simple, because most // of the work happens on the ARM, and we just pass samples through. The @@ -38,65 +39,39 @@ module lo_read( // 125 kHz by dividing by a further factor of (8*12*2), or ~134 kHz by // dividing by a factor of (8*11*2) (for 136 kHz, ~2% error, tolerable). -reg [3:0] pck_divider; -reg clk_lo; - -always @(posedge pck0) -begin - if(lo_is_125khz) - begin - if(pck_divider == 4'd11) - begin - pck_divider <= 4'd0; - clk_lo = !clk_lo; - end - else - pck_divider <= pck_divider + 1; - end - else - begin - if(pck_divider == 4'd10) - begin - pck_divider <= 4'd0; - clk_lo = !clk_lo; - end - else - pck_divider <= pck_divider + 1; - end -end - -reg [2:0] carrier_divider_lo; - -always @(posedge clk_lo) -begin - carrier_divider_lo <= carrier_divider_lo + 1; -end - -assign pwr_lo = carrier_divider_lo[2]; - -// This serializes the values returned from the A/D, and sends them out -// over the SSP. - reg [7:0] to_arm_shiftreg; +reg [7:0] pck_divider; +reg [6:0] ssp_divider; +reg ant_lo; -always @(posedge clk_lo) +always @(posedge pck0) begin - if(carrier_divider_lo == 3'b000) - to_arm_shiftreg <= adc_d; - else - to_arm_shiftreg[7:1] <= to_arm_shiftreg[6:0]; + if(pck_divider == 8'd0) + begin + pck_divider <= divisor[7:0]; + ant_lo = !ant_lo; + if(ant_lo == 1'b0) + begin + ssp_divider <= 7'b0011111; + to_arm_shiftreg <= adc_d; + end + end + else + begin + pck_divider <= pck_divider - 1; + if(ssp_divider[6] == 1'b0) + begin + if (ssp_divider[1:0] == 1'b11) to_arm_shiftreg[7:1] <= to_arm_shiftreg[6:0]; + ssp_divider <= ssp_divider - 1; + end + end end -assign ssp_clk = clk_lo; -assign ssp_frame = (carrier_divider_lo == 3'b001); assign ssp_din = to_arm_shiftreg[7]; - -// The ADC converts on the falling edge, and our serializer loads when -// carrier_divider_lo == 3'b000. -assign adc_clk = ~carrier_divider_lo[2]; - +assign ssp_clk = pck_divider[1]; +assign ssp_frame = ~ssp_divider[5]; assign pwr_hi = 1'b0; - +assign pwr_lo = ant_lo; +assign adc_clk = ~ant_lo; assign dbg = adc_clk; - endmodule diff --git a/fpga/testbed_lo_read.v b/fpga/testbed_lo_read.v index 11908d77..f7712832 100644 --- a/fpga/testbed_lo_read.v +++ b/fpga/testbed_lo_read.v @@ -1,5 +1,5 @@ +`include "lo_read_org.v" `include "lo_read.v" - /* pck0 - input main 24Mhz clock (PLL / 4) [7:0] adc_d - input data from A/D converter @@ -29,6 +29,7 @@ module testbed_lo_read; reg pck0; reg [7:0] adc_d; reg lo_is_125khz; + reg [15:0] divisor; wire pwr_lo; wire adc_clk; @@ -47,38 +48,61 @@ module testbed_lo_read; wire cross_hi; wire dbg; - lo_read #(5,200) dut( + lo_read_org #(5,10) dut1( .pck0(pck0), - .ck_1356meg(ck_1356meg), - .ck_1356megb(ck_1356megb), - .pwr_lo(pwr_lo), - .pwr_hi(pwr_hi), - .pwr_oe1(pwr_oe1), - .pwr_oe2(pwr_oe2), - .pwr_oe3(pwr_oe3), - .pwr_oe4(pwr_oe4), + .ck_1356meg(ack_1356meg), + .ck_1356megb(ack_1356megb), + .pwr_lo(apwr_lo), + .pwr_hi(apwr_hi), + .pwr_oe1(apwr_oe1), + .pwr_oe2(apwr_oe2), + .pwr_oe3(apwr_oe3), + .pwr_oe4(apwr_oe4), .adc_d(adc_d), .adc_clk(adc_clk), - .ssp_frame(ssp_frame), - .ssp_din(ssp_din), - .ssp_dout(ssp_dout), - .ssp_clk(ssp_clk), - .cross_hi(cross_hi), - .cross_lo(cross_lo), - .dbg(dbg), + .ssp_frame(assp_frame), + .ssp_din(assp_din), + .ssp_dout(assp_dout), + .ssp_clk(assp_clk), + .cross_hi(across_hi), + .cross_lo(across_lo), + .dbg(adbg), .lo_is_125khz(lo_is_125khz) ); - integer idx, i; + lo_read #(5,10) dut2( + .pck0(pck0), + .ck_1356meg(bck_1356meg), + .ck_1356megb(bck_1356megb), + .pwr_lo(bpwr_lo), + .pwr_hi(bpwr_hi), + .pwr_oe1(bpwr_oe1), + .pwr_oe2(bpwr_oe2), + .pwr_oe3(bpwr_oe3), + .pwr_oe4(bpwr_oe4), + .adc_d(adc_d), + .adc_clk(badc_clk), + .ssp_frame(bssp_frame), + .ssp_din(bssp_din), + .ssp_dout(bssp_dout), + .ssp_clk(bssp_clk), + .cross_hi(bcross_hi), + .cross_lo(bcross_lo), + .dbg(bdbg), + .lo_is_125khz(lo_is_125khz), + .divisor(divisor) + ); + + integer idx, i, adc_val=8; // main clock always #5 pck0 = !pck0; - //new A/D value available from ADC on positive edge task crank_dut; begin @(posedge adc_clk) ; - adc_d = $random; + adc_d = adc_val; + adc_val = (adc_val *2) + 53; end endtask @@ -87,19 +111,13 @@ module testbed_lo_read; // init inputs pck0 = 0; adc_d = 0; - - // simulate 4 A/D cycles at 134Khz - lo_is_125khz=0; - for (i = 0 ; i < 4 ; i = i + 1) begin - crank_dut; - end + lo_is_125khz = 1; + divisor=255; //min 19, 95=125Khz, max 255 // simulate 4 A/D cycles at 125Khz - lo_is_125khz=1; - for (i = 0 ; i < 4 ; i = i + 1) begin + for (i = 0 ; i < 8 ; i = i + 1) begin crank_dut; end $finish; end - endmodule // main diff --git a/include/usb_cmd.h b/include/usb_cmd.h index 6f3c03d8..540c15d1 100644 --- a/include/usb_cmd.h +++ b/include/usb_cmd.h @@ -44,6 +44,8 @@ typedef struct { #define CMD_SIMULATE_TAG_125K 0x0207 #define CMD_HID_DEMOD_FSK 0x0208 // ## New command: demodulate HID tag ID #define CMD_HID_SIM_TAG 0x0209 // ## New command: simulate HID tag by ID +#define CMD_SET_LF_DIVISOR 0x020A +#define CMD_SWEEP_LF 0x020B // For the 13.56 MHz tags #define CMD_ACQUIRE_RAW_ADC_SAMPLES_ISO_15693 0x0300 @@ -58,7 +60,6 @@ typedef struct { #define CMD_SNOOP_ISO_14443a 0x0383 // ## New snoop command #define CMD_SIMULATE_TAG_ISO_14443a 0x0384 // ## New command: Simulate tag 14443a #define CMD_READER_ISO_14443a 0x0385 // ## New command to act like a 14443a reader - #define CMD_SIMULATE_MIFARE_CARD 0x0386 // For measurements of the antenna tuning @@ -67,5 +68,6 @@ typedef struct { // For direct FPGA control #define CMD_FPGA_MAJOR_MODE_OFF 0x0500 // ## FPGA Control +#define CMD_TEST 0x0501 #endif diff --git a/tools/merge-srec.pl b/tools/merge-srec.pl new file mode 100644 index 00000000..852a96b8 --- /dev/null +++ b/tools/merge-srec.pl @@ -0,0 +1,18 @@ +# merge the code that initially executes out of flash with the RAM image + +($flashFile, $ramFile) = @ARGV; + +open(FLASH, $flashFile) or die "$flashFile: $!\n"; + +while() { + print if /^S3/; +} + +open(RAM, $ramFile) or die "$ramFile: $!\n"; + +while() { + if(/^S3(..)(........)(.*)/) { + $addr = sprintf('%08X', hex($2) - 0x00200000 + 0x200); + print "S3$1$addr$3\n"; + } +} diff --git a/tools/rbt2c.pl b/tools/rbt2c.pl new file mode 100644 index 00000000..949c9ae9 --- /dev/null +++ b/tools/rbt2c.pl @@ -0,0 +1,39 @@ +#!/usr/bin/perl + +# This tool converts a Xilinx xxx.rbt FPGA bitstream to a table that will +# compile as C source code. The output format is DWORDs, MSB first. + +print "// Generated by rbt2c.pl, do not edit!\n\n"; + +for(1..7) { + chomp($_ = <>); + print "//// $_\n"; +} + +print < + +const DWORD FpgaImage[] = { +EOT + +while(<>) { + chomp; + $v = 0; + for $b (split(//, $_)) { + $v <<= 1; + if($b eq '1') { + $v |= 1; + } elsif($b ne '0') { + die; + } + } + printf("\t0x%08x,\n", $v); +} + +print < out.s19\n"; +} + +while(<>) { + chomp; + + if(/^S0/) { + next; + } + if(/^S7/) { + print "$_\n"; + next; + } + + if(not /^S3(..)(........)(.*)(..)$/) { + die "bad S record at line $.\n"; + } + + $data = $3; + $checksum = $4; + + print "S3$1$2"; + while($data =~ m#(..)(..)(..)(..)#g) { + print "$4$3$2$1"; + } + print "$checksum\n"; +} diff --git a/winsrc/command.cpp b/winsrc/command.cpp index 62614242..f947f45c 100644 --- a/winsrc/command.cpp +++ b/winsrc/command.cpp @@ -1598,6 +1598,7 @@ static void Cmdaskdemod(char *str) { * routine, feel free to improve... * * 1st argument: clock rate (as number of samples per clock rate) + * Typical values can be 64, 32, 128... */ static void Cmdmanchesterdemod(char *str) { int i; @@ -1605,18 +1606,23 @@ static void Cmdmanchesterdemod(char *str) { int lastval; int lc = 0; int bitidx = 0; - int bitidx2; + int bit2idx = 0; sscanf(str, "%i", &clock); int tolerance = clock/4; - /* Holds the decoded bitstream. */ - int BitStream[MAX_GRAPH_TRACE_LEN*2]; - int BitStream2[MAX_GRAPH_TRACE_LEN]; + /* Holds the decoded bitstream: each clock period contains 2 bits */ + /* later simplified to 1 bit after manchester decoding. */ + /* Add 10 bits to allow for noisy / uncertain traces without aborting */ + /* int BitStream[GraphTraceLen*2/clock+10]; */ + + /* But it does not work if compiling on WIndows: therefore we just allocate a */ + /* large array */ + int BitStream[MAX_GRAPH_TRACE_LEN]; /* Detect first transition */ - /* Lo-Hi (arbitrary) */ + /* Lo-Hi (arbitrary) */ for(i=1;i (GraphTraceLen*2/clock+8) ) { + PrintToScrollback("Error: the clock you gave is probably wrong, aborting."); + return; + } // Then switch depending on lc length: // Tolerance is 1/4 of clock rate (arbitrary) - if ((lc-clock/2) < tolerance) { - // Short pulse + if (abs(lc-clock/2) < tolerance) { + // Short pulse : either "1" or "0" BitStream[bitidx++]=GraphBuffer[i-1]; - } else if ((lc-clock) < tolerance) { - // Long pulse + } else if (abs(lc-clock) < tolerance) { + // Long pulse: either "11" or "00" BitStream[bitidx++]=GraphBuffer[i-1]; BitStream[bitidx++]=GraphBuffer[i-1]; } else { @@ -1649,39 +1661,41 @@ static void Cmdmanchesterdemod(char *str) { } // At this stage, we now have a bitstream of "01" ("1") or "10" ("0"), parse it into final decoded bitstream - for (bitidx2 = 0; bitidx2255)) { + PrintToScrollback("divisor must be between 19 and 255"); + } else { + SendCommand(&c, FALSE); + PrintToScrollback("Divisor set, expected freq=%dHz", 12000000/(c.ext1+1)); + } +} + +static void CmdSweepLF(char *str) +{ + UsbCommand c; + c.cmd = CMD_SWEEP_LF; + SendCommand(&c, FALSE); +} + + typedef void HandlerFunction(char *cmdline); @@ -1863,6 +1903,8 @@ static struct { "lcdreset", CmdLcdReset, "Hardware reset LCD", "lcd", CmdLcd, "Send command/data to LCD", "test", CmdTest, "Placeholder command for testing new code", + "setlfdivisor", CmdSetDivisor, "Drive LF antenna at 12Mhz/(divisor+1)", + "sweeplf", CmdSweepLF, "Sweep through LF freq range and store results in buffer", "quit", CmdQuit, "quit program" }; diff --git a/winsrc/gui.cpp b/winsrc/gui.cpp index e4e530b3..05f05e1a 100644 --- a/winsrc/gui.cpp +++ b/winsrc/gui.cpp @@ -64,6 +64,7 @@ void ExecCmd(char *cmd) } int CommandFinished; +int offset = 64; static void ResizeCommandWindow(void) { @@ -122,8 +123,8 @@ static void PaintGraph(HDC hdc) SelectObject(hdc, WhitePen); - MoveToEx(hdc, r.left + 40, r.top, NULL); - LineTo(hdc, r.left + 40, r.bottom); + MoveToEx(hdc, r.left + offset, r.top, NULL); + LineTo(hdc, r.left + offset, r.bottom); int zeroHeight = r.top + (r.bottom - r.top) / 2; SelectObject(hdc, GreyPen); @@ -131,7 +132,7 @@ static void PaintGraph(HDC hdc) LineTo(hdc, r.right, zeroHeight); int startMax = - (GraphTraceLen - (int)((r.right - r.left - 40) / GraphPixelsPerPoint)); + (GraphTraceLen - (int)((r.right - r.left - offset) / GraphPixelsPerPoint)); if(startMax < 0) { startMax = 0; } @@ -151,7 +152,7 @@ static void PaintGraph(HDC hdc) if(fabs((double)GraphBuffer[i]) > absYMax) { absYMax = (int)fabs((double)GraphBuffer[i]); } - int x = 40 + (int)((i - GraphStart)*GraphPixelsPerPoint); + int x = offset + (int)((i - GraphStart)*GraphPixelsPerPoint); if(x > r.right) { break; } @@ -163,12 +164,15 @@ static void PaintGraph(HDC hdc) SetBkColor(hdc, RGB(0, 0, 0)); // number of points that will be plotted - int span = (int)((r.right - r.left) / GraphPixelsPerPoint); - // one label every 100 pixels, let us say - int labels = (r.right - r.left - 40) / 100; + double span = (int)((r.right - r.left) / GraphPixelsPerPoint); + + // one label every offset pixels, let us say + int labels = (r.right - r.left - offset) / offset; if(labels <= 0) labels = 1; - int pointsPerLabel = span / labels; + // round to nearest power of 2 + int pointsPerLabel = (int)(log(span / labels)/log(2.0)); if(pointsPerLabel <= 0) pointsPerLabel = 1; + pointsPerLabel = (int)pow(2.0,pointsPerLabel); int yMin = INT_MAX; int yMax = INT_MIN; @@ -179,7 +183,7 @@ static void PaintGraph(HDC hdc) if(i >= GraphTraceLen) { break; } - int x = 40 + (int)((i - GraphStart)*GraphPixelsPerPoint); + int x = offset + (int)((i - GraphStart)*GraphPixelsPerPoint); if(x > r.right + GraphPixelsPerPoint) { break; } @@ -212,8 +216,8 @@ static void PaintGraph(HDC hdc) if(((i - GraphStart) % pointsPerLabel == 0) && i != GraphStart) { SelectObject(hdc, WhitePen); - MoveToEx(hdc, x, zeroHeight - 3, NULL); - LineTo(hdc, x, zeroHeight + 3); + MoveToEx(hdc, x, zeroHeight - 8, NULL); + LineTo(hdc, x, zeroHeight + 8); char str[100]; sprintf(str, "+%d", (i - GraphStart)); @@ -244,9 +248,9 @@ static void PaintGraph(HDC hdc) } char str[100]; - sprintf(str, "@%d max=%d min=%d mean=%d n=%d/%d dt=%d [%.3f]", + sprintf(str, "@%d max=%d min=%d mean=%d n=%d/%d dt=%d [%.3f] zoom=%.3f", GraphStart, yMax, yMin, yMean, n, GraphTraceLen, - CursorBPos - CursorAPos, (CursorBPos - CursorAPos)/CursorScaleFactor); + CursorBPos - CursorAPos, (CursorBPos - CursorAPos)/CursorScaleFactor, GraphPixelsPerPoint); TextOut(hdc, 50, r.bottom - 20, str, strlen(str)); } @@ -277,28 +281,28 @@ static LRESULT CALLBACK case WM_KEYDOWN: switch(wParam) { case VK_DOWN: - if(GraphPixelsPerPoint <= 50) { + if(GraphPixelsPerPoint <= 8) { GraphPixelsPerPoint *= 2; } break; case VK_UP: - if(GraphPixelsPerPoint >= 0.02) { + if(GraphPixelsPerPoint >= 0.01) { GraphPixelsPerPoint /= 2; } break; case VK_RIGHT: - if(GraphPixelsPerPoint < 20) { - GraphStart += (int)(20 / GraphPixelsPerPoint); + if(GraphPixelsPerPoint < 16) { + GraphStart += (int)(16 / GraphPixelsPerPoint); } else { GraphStart++; } break; case VK_LEFT: - if(GraphPixelsPerPoint < 20) { - GraphStart -= (int)(20 / GraphPixelsPerPoint); + if(GraphPixelsPerPoint < 16) { + GraphStart -= (int)(16 / GraphPixelsPerPoint); } else { GraphStart--; } @@ -314,7 +318,7 @@ nopaint: case WM_LBUTTONDOWN: case WM_RBUTTONDOWN: { int x = LOWORD(lParam); - x -= 40; + x -= offset; x = (int)(x / GraphPixelsPerPoint); x += GraphStart; if(msg == WM_LBUTTONDOWN) {