From: etmatrix Date: Mon, 2 Nov 2015 08:08:21 +0000 (+0100) Subject: - Correct little distraction on fpga/Makefile X-Git-Tag: v2.3.0~21^2~1 X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/commitdiff_plain/82d589348c4ffaccc669ca17b24aa8f231b44861?ds=sidebyside;hp=--cc - Correct little distraction on fpga/Makefile - New patch from pwpiwi works very well for hi_sniffer.v - Restored previous fpga_lf.bit --- 82d589348c4ffaccc669ca17b24aa8f231b44861 diff --git a/fpga/Makefile b/fpga/Makefile index e58d6fc4..2f93e741 100644 --- a/fpga/Makefile +++ b/fpga/Makefile @@ -5,11 +5,11 @@ clean: $(DELETE) *.bgn *.drc *.ncd *.ngd *_par.xrpt *-placed.* *-placed_pad.* *_usage.xml xst_hf.srp xst_lf.srp $(DELETE) *.map *.ngc *.xrpt *.pcf *.rbt *_auto_* *.bld *.mrp *.ngm *.unroutes *_summary.xml netlist.lst xst -fpga_hf.ngc: fpga_hf.v fpga.ucf xst_hf.scr util.v hi_simulate.v hi_read_tx.v hi_read_rx_xcorr.v hi_iso14443a.v +fpga_hf.ngc: fpga_hf.v fpga.ucf xst_hf.scr util.v hi_simulate.v hi_read_tx.v hi_read_rx_xcorr.v hi_iso14443a.v hi_sniffer.v $(DELETE) $@ $(XILINX_TOOLS_PREFIX)xst -ifn xst_hf.scr -fpga_lf.ngc: fpga_lf.v fpga.ucf xst_lf.scr util.v clk_divider.v lo_edge_detect.v lo_read.v lo_passthru.v lp20khz_1MSa_iir_filter.v min_max_tracker.v lf_edge_detect.v hi_sniffer.v +fpga_lf.ngc: fpga_lf.v fpga.ucf xst_lf.scr util.v clk_divider.v lo_edge_detect.v lo_read.v lo_passthru.v lp20khz_1MSa_iir_filter.v min_max_tracker.v lf_edge_detect.v $(DELETE) $@ $(XILINX_TOOLS_PREFIX)xst -ifn xst_lf.scr diff --git a/fpga/fpga_hf.bit b/fpga/fpga_hf.bit index eea2083b..6e6b9794 100644 Binary files a/fpga/fpga_hf.bit and b/fpga/fpga_hf.bit differ diff --git a/fpga/fpga_lf.bit b/fpga/fpga_lf.bit index 6a16e7bf..bd4d821b 100644 Binary files a/fpga/fpga_lf.bit and b/fpga/fpga_lf.bit differ diff --git a/fpga/hi_sniffer.v b/fpga/hi_sniffer.v index f9d8ba93..3a989ce6 100644 --- a/fpga/hi_sniffer.v +++ b/fpga/hi_sniffer.v @@ -1,4 +1,3 @@ - module hi_sniffer( pck0, ck_1356meg, ck_1356megb, pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4, @@ -19,59 +18,40 @@ module hi_sniffer( input xcorr_is_848, snoop, xcorr_quarter_freq; // not used. // We are only snooping, all off. -assign pwr_hi = 1'b0;// ck_1356megb & (~snoop); +assign pwr_hi = 1'b0; +assign pwr_lo = 1'b0; assign pwr_oe1 = 1'b0; assign pwr_oe2 = 1'b0; assign pwr_oe3 = 1'b0; assign pwr_oe4 = 1'b0; -reg ssp_clk = 1'b0; reg ssp_frame; -reg adc_clk; reg [7:0] adc_d_out = 8'd0; -reg [7:0] ssp_cnt = 8'd0; -reg [7:0] pck_divider = 8'd0; -reg ant_lo = 1'b0; -reg bit_to_send = 1'b0; - -always @(ck_1356meg, pck0) // should synthetisize to a mux.. - begin - adc_clk = ck_1356meg; - ssp_clk = ~ck_1356meg; - end +reg [2:0] ssp_cnt = 3'd0; -reg [7:0] cnt_test = 8'd0; // test +assign adc_clk = ck_1356meg; +assign ssp_clk = ~ck_1356meg; -always @(posedge pck0) +always @(posedge ssp_clk) begin - ant_lo <= 1'b0; -end + if(ssp_cnt[2:0] == 3'd7) + ssp_cnt[2:0] <= 3'd0; + else + ssp_cnt <= ssp_cnt + 1; -always @(posedge ssp_clk) // ~1356 (hf) -begin - if(ssp_cnt[7:0] == 8'd255) // SSP counter for divides. - ssp_cnt[7:0] <= 8'd0; - else - ssp_cnt <= ssp_cnt + 1; - - if((ssp_cnt[2:0] == 3'b000) && !ant_lo) // To set frame length + if(ssp_cnt[2:0] == 3'b000) // set frame length begin - adc_d_out[7:0] = adc_d; // disable for test - bit_to_send = adc_d_out[0]; - ssp_frame <= 1'b1; + adc_d_out[7:0] <= adc_d; + ssp_frame <= 1'b1; end - else + else begin - adc_d_out[6:0] = adc_d_out[7:1]; - adc_d_out[7] = 1'b0; // according to old lf_read.v comment prevents gliches if not set. - bit_to_send = adc_d_out[0]; - ssp_frame <= 1'b0; + adc_d_out[7:0] <= {1'b0, adc_d_out[7:1]}; + ssp_frame <= 1'b0; end -end -assign ssp_din = bit_to_send && !ant_lo;//bit_to_send && !ant_lo; // && .. not needed i guess? +end -assign pwr_lo = ant_lo; - +assign ssp_din = adc_d_out[0]; endmodule