From: pwpiwi Date: Fri, 6 Mar 2015 06:39:34 +0000 (+0100) Subject: fix: (issue #72) LF simulation didn't work with lo_edge_detect.v X-Git-Tag: v2.0.0-rc2 X-Git-Url: https://git.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/commitdiff_plain/e3bd08d346dfd610c2cb710589af89c91015d2d0 fix: (issue #72) LF simulation didn't work with lo_edge_detect.v --- diff --git a/fpga/fpga_lf.bit b/fpga/fpga_lf.bit index 51b0681c..bd4d821b 100644 Binary files a/fpga/fpga_lf.bit and b/fpga/fpga_lf.bit differ diff --git a/fpga/lo_edge_detect.v b/fpga/lo_edge_detect.v index dc97fc6f..bb130157 100644 --- a/fpga/lo_edge_detect.v +++ b/fpga/lo_edge_detect.v @@ -35,10 +35,12 @@ wire tag_modulation = ssp_dout & !lf_field; wire reader_modulation = !ssp_dout & lf_field & pck_divclk; // No logic, straight through. -assign pwr_oe1 = 1'b0; // not used in LF mode +assign pwr_oe1 = 1'b0; // not used in LF mode +assign pwr_oe3 = 1'b0; // base antenna load = 33 Ohms +// when modulating, add another 33 Ohms and 10k Ohms in parallel: assign pwr_oe2 = tag_modulation; -assign pwr_oe3 = tag_modulation; -assign pwr_oe4 = tag_modulation; +assign pwr_oe4 = tag_modulation; + assign ssp_clk = cross_lo; assign pwr_lo = reader_modulation; assign pwr_hi = 1'b0;