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we have pci device
[raggedstone] / heartbeat / source / pfs.v
CommitLineData
95764a11 1module pfs2 (clk, a, b);
2 input clk;
3 input a;
4 output b;
5 reg b;
6
7 always @(posedge clk)
8 begin
9 b <= a;
10 end
11endmodule
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